HEF4024B. 1. General description. 2. Features and benefits. 3. Applications. 4. Ordering information. 7-stage binary counter

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Transcription:

Rev. 7 18 November 2011 Product data sheet 1. General description 2. Features and benefits 3. Applications The is a 7-stage binary ripple counter with a clock input (CP), and overriding asynchronous master reset input (MR) and seven fully buffered parallel outputs (0 to 6). The counter advances on the HIGH to LOW transition of CP. A HIGH on MR clears all counter stages and forces all outputs LOW, independent of CP. Each counter stage is a static toggle flip-flop. It operates over a recommended V DD power supply range of 3 V to 15 V referenced to V SS (usually ground). Unused inputs must be connected to V DD, V SS, or another input. Tolerant of slow clock rise and fall time Fully static operation 5 V, 10 V, and 15 V parametric ratings Standardized symmetrical output characteristics Specified from 40 C to +85 C Complies with JEDEC standard JESD 13-B Frequency dividers Time delay circuits 4. Ordering information Table 1. Ordering information All types operate from 40 C to +85 C Type number Package Name Description Version P DIP14 plastic dual in-line package; 14 leads (300 mil) SOT27-1 T SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1

5. Functional diagram 6 3 7-STAGE COUNTER 5 4 3 2 1 0 4 5 6 9 11 12 1 2 CP MR 12 0 11 1 9 2 6 3 5 4 4 5 6 3 CP 1 MR 2 001aab908 001aab906 Fig 1. Functional diagram Fig 2. Logic symbol CP T FF 1 T FF 2 T FF 3 T FF 4 T FF 5 T FF 6 T FF 7 RD RD RD RD RD RD RD MR 0 1 2 3 4 5 6 001aab909 Fig 3. Logic diagram All information provided in this document is subject to legal disclaimers. NXP B.V. 2011. All rights reserved. Product data sheet Rev. 7 18 November 2011 2 of 14

6. Pinning information 6.1 Pinning CP 1 14 V DD MR 2 13 n.c. 6 3 12 0 5 4 11 1 4 5 10 n.c. 3 6 9 2 V SS 7 8 n.c. 001aak329 Fig 4. Pin configuration 6.2 Pin description Table 2. Pin description Symbol Pin Description CP 1 clock input (HIGH to LOW edge-triggered) MR 2 master reset input V SS 7 ground (0 V) n.c. 8, 10, 13 not connected 0 to 6 12, 11, 9, 6, 5, 4, 3, buffered parallel outputs V DD 14 supply voltage 7. Functional description Table 3. Functional table [1] Input Output CP MR 0 to 6 L no change L count X H L [1] H = HIGH voltage level; L = LOW voltage level; X = don t care; = positive-going transition; = negative-going transition. All information provided in this document is subject to legal disclaimers. NXP B.V. 2011. All rights reserved. Product data sheet Rev. 7 18 November 2011 3 of 14

8. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit V DD supply voltage 0.5 +18 V I IK input clamping current V I < 0.5 V or V I >V DD + 0.5 V - 10 ma V I input voltage 0.5 V DD + 0.5 V I OK output clamping current V O < 0.5 V or V O >V DD + 0.5 V - 10 ma I I/O input/output current - 10 ma I DD supply current - 50 ma T stg storage temperature 65 +150 C T amb ambient temperature in free air 40 +85 C P tot total power dissipation T amb 40 C to +85 C DIP14 package [1] - 750 mw SO14 package [2] - 500 mw P power dissipation per output - 100 mw [1] For DIP14 package: P tot derates linearly with 12 mw/k above 70 C. [2] For SO14 package: P tot derates linearly with 8 mw/k above 70 C. 9. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter Conditions Min Max Unit V DD supply voltage 3 15 V V I input voltage 0 V DD V T amb ambient temperature in free air 40 +85 C t/ V input transition rise and fall rate V DD = 5 V - 3.75 s/v V DD = 10 V - 0.5 s/v V DD = 15 V - 0.08 s/v 10. Static characteristics Table 6. Static characteristics V SS = 0 V; V I = V SS or V DD ; unless otherwise specified. Symbol Parameter Conditions V DD T amb = 40 C T amb = 25 C T amb = 85 C Unit Min Max Min Max Min Max V IH HIGH-level input voltage I O < 1 A 5 V 3.5-3.5-3.5 - V 10 V 7.0-7.0-7.0 - V 15 V 11.0-11.0-11.0 - V V IL LOW-level input voltage I O < 1 A 5 V - 1.5-1.5-1.5 V 10 V - 3.0-3.0-3.0 V 15 V - 4.0-4.0-4.0 V All information provided in this document is subject to legal disclaimers. NXP B.V. 2011. All rights reserved. Product data sheet Rev. 7 18 November 2011 4 of 14

Table 6. Static characteristics continued V SS = 0 V; V I = V SS or V DD ; unless otherwise specified. Symbol Parameter Conditions V DD T amb = 40 C T amb = 25 C T amb = 85 C Unit Min Max Min Max Min Max V OH HIGH-level output voltage I O < 1 A 5 V 4.95-4.95-4.95 - V 10 V 9.95-9.95-9.95 - V 15 V 14.95-14.95-14.95 - V V OL LOW-level output voltage I O < 1 A 5 V - 0.05-0.05-0.05 V 10 V - 0.05-0.05-0.05 V 15 V - 0.05-0.05-0.05 V I OH HIGH-level output current V O = 2.5 V 5 V - 1.7-1.4-1.1 ma V O = 4.6 V 5 V - 0.52-0.44-0.36 ma V O = 9.5 V 10 V - 1.3-1.1-0.9 ma V O = 13.5 V 15 V - 3.6-3.0-2.4 ma I OL LOW-level output current V O = 0.4 V 5 V 0.52-0.44-0.36 - ma V O = 0.5 V 10 V 1.3-1.1-0.9 - ma V O = 1.5 V 15 V 3.6-3.0-2.4 - ma I I input leakage current 15 V - 0.3-0.3-1.0 A I DD supply current I O = 0 A 5 V - 20-20 - 30 A 10 V - 40-40 - 60 A 15 V - 80-80 - 120 A C I input capacitance - - - - 7.5 - - pf 11. Dynamic characteristics Table 7. Dynamic characteristics V SS = 0 V; T amb = 25 C; for test circuit see Figure 6; unless otherwise specified. Symbol Parameter Conditions V DD Extrapolation formula [1] Min Typ Max Unit t PHL HIGH to LOW CP 0; 5 V 73 ns + (0.55 ns/pf)c L - 100 200 ns propagation delay see Figure 5 10 V 29 ns + (0.23 ns/pf)c L - 40 75 ns 15 V 17 ns + (0.16 ns/pf)c L - 25 50 ns n n + 1; 5 V 33 ns + (0.55 ns/pf)c L - 60 120 ns see Figure 5 10 V 14 ns + (0.23 ns/pf)c L - 25 50 ns 15 V 12 ns + (0.16 ns/pf)c L - 20 40 ns MR n; 5 V 93 ns + (0.55 ns/pf)c L - 120 240 ns see Figure 5 10 V 34 ns + (0.23 ns/pf)c L - 45 90 ns 15 V 22 ns + (0.16 ns/pf)c L - 30 60 ns t PLH LOW to HIGH CP 0; 5 V 78 ns + (0.55 ns/pf)c L - 105 210 ns propagation delay see Figure 5 10 V 34 ns + (0.23 ns/pf)c L - 45 85 ns 15 V 22 ns + (0.16 ns/pf)c L - 30 60 ns n n + 1 5 V 23 ns + (0.55 ns/pf)c L - 50 100 ns see Figure 5 10 V 9 ns + (0.23 ns/pf)c L - 20 40 ns 15 V 7 ns + (0.16 ns/pf)c L - 15 30 ns All information provided in this document is subject to legal disclaimers. NXP B.V. 2011. All rights reserved. Product data sheet Rev. 7 18 November 2011 5 of 14

Table 7. Dynamic characteristics continued V SS = 0 V; T amb = 25 C; for test circuit see Figure 6; unless otherwise specified. Symbol Parameter Conditions V DD Extrapolation formula [1] Min Typ Max Unit t t transition time see Figure 5 5 V [2] 10 ns + (1.00 ns/pf)c L - 60 120 ns t W pulse width CP HIGH; minimum width see Figure 5 [1] The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (C L in pf). [2] t t is the same as t TLH and t THL. MR HIGH; minimum width see Figure 5 t rec recovery time MR; see Figure 5 f max maximum frequency CP input; J = K = HIGH; see Figure 5 10 V 9 ns + (0.42 ns/pf)c L - 30 60 ns 15 V 6 ns + (0.28 ns/pf)c L - 20 40 ns 5 V 60 30 - ns 10 V 30 15 - ns 15 V 20 10 - ns 5 V 80 40 - ns 10 V 35 20 - ns 15 V 25 15 - ns 5 V 20 10 - ns 10 V 15 5 - ns 15 V 15 5 - ns 5 V 5 10 - MHz 10 V 13 25 - MHz 15 V 18 35 - MHz Table 8. Dynamic power dissipation P D P D can be calculated from the formulas shown. V SS = 0 V; t r = t f 20 ns; T amb = 25 C. Symbol Parameter V DD Typical formula for P D ( W) Where: P D dynamic power 5 V P D = 500 f i + (f o C L ) V 2 DD f i = input frequency in MHz; dissipation 10 V P D = 2100 f i + (f o C L ) V 2 DD f o = output frequency in MHz; 15 V P D = 5200 f i + (f o C L ) V 2 DD C L = output load capacitance in pf; V DD = supply voltage in V; (f o C L ) = sum of the outputs. All information provided in this document is subject to legal disclaimers. NXP B.V. 2011. All rights reserved. Product data sheet Rev. 7 18 November 2011 6 of 14

12. Waveforms MR input V M t W t rec 1/f max CP input V M t PHL t PLH t W t PHL 0 or n output V M t TLH t THL 001aab910 Fig 5. V OH and V OL are typical output voltages levels that occur with the output load. Measurement points are given in Table 9. Waveforms showing propagation delays for MR to n and CP to 0, minimum MR and CP pulse widths and recovery time for MR. Table 9. Measurement points Supply voltage Input Output V DD V M V M 5 V to 15 V 0.5V DD 0.5V DD All information provided in this document is subject to legal disclaimers. NXP B.V. 2011. All rights reserved. Product data sheet Rev. 7 18 November 2011 7 of 14

V I negative pulse 0 V 90 % V M 10 % t W V M 10 % 90 % t f t r t r t f V I positive pulse 0 V 10 % 90 % V M t W 90 % V M 10 % 001aaj781 a. Input waveforms V DD G V I DUT V O RT CL 001aag182 b. Test circuit Fig 6. Test data is given in Table 10. Definitions for test circuit: DUT = Device Under Test. C L = load capacitance including jig and probe capacitance. R T = termination resistance should be equal to the output impedance Z o of the pulse generator. Test circuit for measuring switching times Table 10. Test data Supply voltage Input Load V DD V I t r, t f C L 5 V to 15 V V SS or V DD 20 ns 50 pf All information provided in this document is subject to legal disclaimers. NXP B.V. 2011. All rights reserved. Product data sheet Rev. 7 18 November 2011 8 of 14

13. Package outline DIP14: plastic dual in-line package; 14 leads (300 mil) SOT27-1 D M E seating plane A 2 A L A 1 Z 14 e b b 1 8 w M c (e ) 1 M H pin 1 index E 1 7 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. A 1 A 2 (1) (1) min. max. b b 1 c D E e e 1 L M E M H 4.2 0.51 3.2 0.17 0.02 0.13 1.73 1.13 0.068 0.044 0.53 0.38 0.021 0.015 0.36 0.23 0.014 0.009 19.50 18.55 0.77 0.73 6.48 6.20 0.26 0.24 2.54 7.62 0.1 0.3 3.60 3.05 0.14 0.12 8.25 7.80 0.32 0.31 10.0 8.3 0.39 0.33 w 0.254 0.01 (1) Z max. 2.2 0.087 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE SOT27-1 050G04 MO-001 SC-501-14 99-12-27 03-02-13 Fig 7. Package outline SOT27-1 (DIP14) All information provided in this document is subject to legal disclaimers. NXP B.V. 2011. All rights reserved. Product data sheet Rev. 7 18 November 2011 9 of 14

SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 D E A X c y H E v M A Z 14 8 pin 1 index A 2 A 1 (A ) 3 θ A L p 1 7 L e b p w M detail X 0 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 0.25 1.75 0.10 0.069 0.010 0.004 A 1 A 2 A 3 b p c D (1) E (1) e H (1) E L L p v w y Z 1.45 1.25 0.057 0.049 0.25 0.01 0.49 0.36 0.019 0.014 0.25 0.19 0.0100 0.0075 8.75 8.55 0.35 0.34 4.0 3.8 0.16 0.15 1.27 6.2 5.8 0.244 0.228 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 0.05 1.05 0.041 1.0 0.4 0.039 0.016 0.7 0.6 0.028 0.024 0.25 0.25 0.1 0.01 0.01 0.004 θ 0.7 0.3 o 8 o 0.028 0 0.012 OUTLINE VERSION REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE SOT108-1 076E06 MS-012 99-12-27 03-02-19 Fig 8. Package outline SOT108-1 (SO14) All information provided in this document is subject to legal disclaimers. NXP B.V. 2011. All rights reserved. Product data sheet Rev. 7 18 November 2011 10 of 14

14. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes v.7 20111118 Product data sheet - v.6 Modifications: Legal pages updated. Changes in General description and Features and benefits. Table 1, description below table title: +125 C changed to +85 C. v.6 20111010 Product data sheet - v.5 v.5 20091109 Product data sheet - v.4 v.4 20090902 Product data sheet - _CNV v.3 _CNV v.3 19950101 Product specification - _CNV v.2 _CNV v.2 19950101 Product specification - - All information provided in this document is subject to legal disclaimers. NXP B.V. 2011. All rights reserved. Product data sheet Rev. 7 18 November 2011 11 of 14

15. Legal information 15.1 Data sheet status Document status [1][2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet ualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term short data sheet is explained in section Definitions. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 15.2 Definitions Draft The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 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This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer s own risk. Applications Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer s applications and products planned, as well as for the planned application and use of customer s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer s applications or products, or the application or use by customer s third party customer(s). Customer is responsible for doing all necessary testing for the customer s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer s third party customer(s). NXP does not accept any liability in this respect. Limiting values Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. All information provided in this document is subject to legal disclaimers. NXP B.V. 2011. All rights reserved. Product data sheet Rev. 7 18 November 2011 12 of 14

Non-automotive qualified products Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors specifications such use shall be solely at customer s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors standard warranty and NXP Semiconductors product specifications. 15.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 16. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com All information provided in this document is subject to legal disclaimers. NXP B.V. 2011. All rights reserved. Product data sheet Rev. 7 18 November 2011 13 of 14

17. Contents 1 General description...................... 1 2 Features and benefits.................... 1 3 Applications............................ 1 4 Ordering information..................... 1 5 Functional diagram...................... 2 6 Pinning information...................... 3 6.1 Pinning............................... 3 6.2 Pin description......................... 3 7 Functional description................... 3 8 Limiting values.......................... 4 9 Recommended operating conditions........ 4 10 Static characteristics..................... 4 11 Dynamic characteristics.................. 5 12 Waveforms............................. 7 13 Package outline......................... 9 14 Revision history........................ 11 15 Legal information....................... 12 15.1 Data sheet status...................... 12 15.2 Definitions............................ 12 15.3 Disclaimers........................... 12 15.4 Trademarks........................... 13 16 Contact information..................... 13 17 Contents.............................. 14 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section Legal information. NXP B.V. 2011. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 18 November 2011 Document identifier:

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