University of BRISTOL. Department of Physics. Final year project. MAPS (Monolithic Active Pixel Sensors) Degree: Physics MSci (F303) May 10, 2011

Similar documents
Development of a Radiation Hard CMOS Monolithic Pixel Sensor

Classification of Solids

Lecture 2. Introduction to semiconductors Structures and characteristics in semiconductors

Study of Edgeless TimePix Pixel Devices. Dylan Hsu Syracuse University 4/30/2014

Lecture 2. Introduction to semiconductors Structures and characteristics in semiconductors. Fabrication of semiconductor sensor

Semiconductor Detectors

Lecture 2. Introduction to semiconductors Structures and characteristics in semiconductors

Lecture 8. Detectors for Ionizing Particles

Lecture 12: MOS Capacitors, transistors. Context

Digital Calorimetry for Future Linear Colliders. Tony Price University of Birmingham University of Birmingham PPE Seminar 13 th November 2013

Lecture Notes 2 Charge-Coupled Devices (CCDs) Part I. Basic CCD Operation CCD Image Sensor Architectures Static and Dynamic Analysis

Dark Current Limiting Mechanisms in CMOS Image Sensors

Thermal Resistance Measurement

Semiconductor X-Ray Detectors. Tobias Eggert Ketek GmbH

CMS Note Mailing address: CMS CERN, CH-1211 GENEVA 23, Switzerland

1 Name: Student number: DEPARTMENT OF PHYSICS AND PHYSICAL OCEANOGRAPHY MEMORIAL UNIVERSITY OF NEWFOUNDLAND. Fall :00-11:00

Peter Fischer, ziti, Universität Heidelberg. Silicon Detectors & Readout Electronics

Development of Radiation Hard Si Detectors

Semiconductor Physics Problems 2015

Control of the fabrication process for the sensors of the CMS Silicon Strip Tracker. Anna Macchiolo. CMS Collaboration

Components of a generic collider detector

Lecture 16: Circuit Pitfalls

Lecture 0: Introduction

ELEN0037 Microelectronic IC Design. Prof. Dr. Michael Kraft

Digital Electronics Part II - Circuits

ECE 340 Lecture 39 : MOS Capacitor II

Charge sharing in silicon pixel detectors

Radiation Detector 2016/17 (SPA6309)

Chapter 2. Design and Fabrication of VLSI Devices

Current mechanisms Exam January 27, 2012

Semiconductor Physics fall 2012 problems

ATLAS New Small Wheel Phase I Upgrade: Detector and Electronics Performance Analysis

1) CMOS-Sensors for vertex-detectors 2) CMOS-Sensors for X-ray imaging 3) Sensor with a 3-T-preamplifier 4) Sensor with nearly full depletion

Device 3D. 3D Device Simulator. Nano Scale Devices. Fin FET

Luminosity measurement in ATLAS with Diamond Beam Monitor

Engineering 2000 Chapter 8 Semiconductors. ENG2000: R.I. Hornsey Semi: 1

Silicon Detectors. Particle Physics

Quiz #1 Practice Problem Set

CMPEN 411 VLSI Digital Circuits. Lecture 03: MOS Transistor

ATLAS E-M Calorimeter Resolution and Neural Network Based Particle Classification

Identifying Particle Trajectories in CMS using the Long Barrel Geometry

16EC401 BASIC ELECTRONIC DEVICES UNIT I PN JUNCTION DIODE. Energy Band Diagram of Conductor, Insulator and Semiconductor:

Energetic particles and their detection in situ (particle detectors) Part II. George Gloeckler

COURSE OUTLINE. Introduction Signals and Noise Filtering Sensors: PD5 Avalanche PhotoDiodes. Sensors, Signals and Noise 1

CALICE Si-W EM Calorimeter: Preliminary Results of the Testbeams 2006

AIM AIM. Study of Rare Interactions. Discovery of New High Mass Particles. Energy 500GeV High precision Lots of events (high luminosity) Requirements

Digital Integrated Circuits A Design Perspective. Semiconductor. Memories. Memories

MOSFET: Introduction

Test setup, APDs,, preamps Calibration procedure Gain monitoring with LED Beam test results Future R&D options

An Overview of the analysis of two dimensional back illuminated GaAs MESFET

CMS Note Mailing address: CMS CERN, CH-1211 GENEVA 23, Switzerland

Lecture 18. New gas detectors Solid state trackers

n N D n p = n i p N A

Chem 481 Lecture Material 3/20/09

E18 DR. Giorgio Mussi 14/12/2018

Practical 1P4 Energy Levels and Band Gaps

DEPFET sensors development for the Pixel Detector of BELLE II

KINGS COLLEGE OF ENGINEERING DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING QUESTION BANK

Lecture 16: Circuit Pitfalls

ADVANCED UNDERGRADUATE LABORATORY EXPERIMENT 20. Semiconductor Resistance, Band Gap, and Hall Effect

Lecture 12: MOSFET Devices

ESE 570: Digital Integrated Circuits and VLSI Fundamentals

Aspects of radiation hardness for silicon microstrip detectors

The ATLAS Silicon Microstrip Tracker

Photon Instrumentation. First Mexican Particle Accelerator School Guanajuato Oct 6, 2011

Status Report: Charge Cloud Explosion

Semiconductor Memories

The Devices. Jan M. Rabaey

EEE4106Z Radiation Interactions & Detection

(a) (b) Fig. 1 - The LEP/LHC tunnel map and (b) the CERN accelerator system.

8.1 Drift diffusion model

EE382M-14 CMOS Analog Integrated Circuit Design

Practical 1P4 Energy Levels and Band Gaps

Solid State Detectors

Chapter 4 Field-Effect Transistors

Semiconductor-Detectors

Radiation Effects on Electronics. Dr. Brock J. LaMeres Associate Professor Electrical & Computer Engineering Montana State University

Section 12: Intro to Devices

3.1 Introduction to Semiconductors. Y. Baghzouz ECE Department UNLV

Semi-Conductors insulators semi-conductors N-type Semi-Conductors P-type Semi-Conductors

ESE 570: Digital Integrated Circuits and VLSI Fundamentals

MOS Capacitors ECE 2204

Supplementary Figure 1: Micromechanical cleavage of graphene on oxygen plasma treated Si/SiO2. Supplementary Figure 2: Comparison of hbn yield.

Lecture 3: CMOS Transistor Theory

Student Projects for

Fundamentals of the Metal Oxide Semiconductor Field-Effect Transistor

A study of silicon sensor for ILD ECAL

LECTURE 3 MOSFETS II. MOS SCALING What is Scaling?

Designing Information Devices and Systems II A. Sahai, J. Roychowdhury, K. Pister Discussion 1A

Lecture 7 MOS Capacitor

Low Power VLSI Circuits and Systems Prof. Ajit Pal Department of Computer Science and Engineering Indian Institute of Technology, Kharagpur

Review Energy Bands Carrier Density & Mobility Carrier Transport Generation and Recombination

UNIVERSITY OF CALIFORNIA College of Engineering Department of Electrical Engineering and Computer Sciences. Fall Exam 1

Digital Integrated Circuits A Design Perspective

Development of High-Z Semiconductor Detectors and Their Applications to X-ray/gamma-ray Astronomy

nmos IC Design Report Module: EEE 112

The Devices. Digital Integrated Circuits A Design Perspective. Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic. July 30, 2002

Search for a Z at an e + e - Collider Thomas Walker

ATLAS EXPERIMENT : HOW THE DATA FLOWS. (Trigger, Computing, and Data Analysis)

Impact of parametric mismatch and fluctuations on performance and yield of deep-submicron CMOS technologies. Philips Research, The Netherlands

Transcription:

University of BRISTOL Department of Physics Final year project MAPS (Monolithic Active Pixel Sensors) Author: Richard Webster Degree: Physics MSci (F303) Supervisors: Dr. Joel Goldstein Project Number: PP1016 Word Count: 10078 May 10, 2011 H H Wills Physics Laboratory, University of Bristol, Tyndall Avenue, Bristol, BS8 1TL

Declaration The program used in this project was initially adapted from code provided by Jaap Velthuis, however the majority of the code used in the it was made by Chris Lucas and myself. Chris and I took it in turns to write sections of the program and it is difficult to distinguish which parts where written by who. We extensively used the ROOT software package developed at CERN to produce histograms of our data and used the OptoDAQ software produced by Dr David Cussans to collect data. The Poisson analysis of the summed frames was mainly worked on by Chris. All the data presented in this report was produced and analysed by us using the system described in the main body of this report. Our project supervisor Dr Joel Goldstein and Jaap Velthuis aided us with the interpretation of some of the results and who gave advice as to what to look for next.

Abstract With every decade higher energies are being used to probe further the understanding of physical concepts, yielding new theories and particles. It is necessary therefore for the technology of detectors to advance in order to provide the data required to prove and disprove these theories. This undergraduate MSci Project used a prototype FORTIS 1.1 detector, which has been designed in the R&D phase of the ILC, to characterise response of the detector to radiation. This was achieved using an Iron-55 γ-ray source. The project found that the 18µm detector used collects 19% more charge than the 12µm detector used, this was unexpected as the extra 50% of collection volume was expected to yield a 19% increase in the charge deposited. The noise of the detector is dependent on ktc noise when soft reset is used, but not when hard reset is used. And that the detector does not perform well when the soft reset is used due to a high number of lagging pixels.

Acknowledgments I would like to thank Chris Lucas my project partner who remained optimistic throughout this project, who made an invaluable contribution to this project and who taught me how to use a Mac. Also I would like to thank all of the academic staff of the Particle Physics Group who helped me with this project, specifically Dr Joel Goldstein and Dr Jaap Velthuis for their continued knowledge and suggestions, Dr David Cussans for his expert knowledge on electronics and the OptoDAQ system, Steve Nash who provided an LED to allow us to do the PTC analysis and Richard Head for his ability to make a mount for a radioactive source in an hour.

Contents 1 Introduction 6 1.1 Pixel Detectors in Particle Physics.......................... 6 1.2 SPiDeR......................................... 6 1.3 FORTIS......................................... 7 1.4 Future of Pixel Detectors............................... 7 1.5 Objectives........................................ 7 2 Detailed Background 9 2.1 MAPS.......................................... 9 2.2 CMOS.......................................... 11 2.3 RTS Noise........................................ 11 2.4 ktc Noise........................................ 11 2.5 Reset Noise....................................... 12 2.6 FORTIS......................................... 12 2.7 Charge losses in Silicon................................ 14 2.8 Iron-55.......................................... 14 3 Experimental Method 15 3.1 Calibration....................................... 15 3.2 Blocked Pixels..................................... 18 3.3 Cluster Finding Algorithms.............................. 18 3.4 Temperature Control.................................. 19 3.5 Lagging Pixels..................................... 19 4 Results 21 4.1 Differences Between Hard and Soft Reset...................... 21 4.1.1 Lagging Pixels................................. 21 4.1.2 Noise...................................... 21 4.1.3 Clusters..................................... 22 4.2 Comparison of 12µm and 18µm Detectors...................... 23 4.2.1 Noise...................................... 23 4.2.2 Summed Frames................................ 23 4.2.3 Clusters..................................... 24 4.2.4 Description of Tail in Clusters........................ 25 4.2.5 Sharing of Charge............................... 27 4.3 Temperature Noise Dependence............................ 29 2

5 Discussion 30 5.1 Calibration....................................... 30 5.1.1 Blocked Pixels................................. 30 5.1.2 Gain Calibration................................ 30 5.1.3 Substructures.................................. 31 5.2 Clusters......................................... 31 5.2.1 Peaks...................................... 31 5.2.2 Tail....................................... 31 5.2.3 Charge Sharing................................. 31 5.2.4 Summed Frames................................ 31 5.3 Possible Fabrication Errors.............................. 32 5.4 Temperature Dependence Investigation........................ 33 5.4.1 Noise...................................... 33 5.4.2 Temperature.................................. 33 5.4.3 Erroneous Points................................ 33 6 Conclusion 34 Appendices 34 A Method of Least Squares 35 B Program used for Data Analysis 37 B.1 getdata.c........................................ 37 B.2 getdata.h........................................ 40 B.3 getblocked.c...................................... 52 References 58

List of Figures 1.1 Picture of the FORTIS sensor............................. 7 2.1 Cross section of a MAPS sensor with the substrate, epitaxial layer and charge collection diode. Note here there is a deep p-well so the n-well of the PMOS transistor does not collect charge............................ 9 2.2 Schematic of the 3 transistor architecture....................... 10 2.3 Schematic of the 4 transistor architecture with the extra transfer gate transistor. 10 2.4 Figure showing the structure of a NMOS transistor [9]............... 11 2.5 A typical noise distribution showing the tail present because of RTS noise.... 12 2.6 The substructures present in the FORTIS 1.1 detector................ 13 3.1 Figure shows the average pixel reading of a frame, can see an increase in values in the first 100 frames.................................. 16 3.2 The PTC curve of a single pixel............................ 17 3.3 PTC curves from all the pixels in the detector, used to determine a range for the Least Squares Method.................................. 17 3.4 Gain distribution of all the pixels present in the device............... 18 3.5 Time Evolution of the signal detected in a row. The x axis shows the frame, the y axis is the row number and the z axis is the signal to noise collected in a row. a) shows the ideal situation and b) shows a lagging pixel, note that you can see an exponential decrease in the charge for the lagging pixel............. 19 4.1 The noise distributions for C2 on the 12µm detector using soft reset....... 22 4.2 The noise distributions for C2 on the 12µm detector using hard reset....... 22 4.3 Cluster distributions for a)hard reset and b)soft reset mode............ 23 4.4 Comparison of noise in the a) 12µm and b) 18µm detectors............ 23 4.5 Pixels of a frame summed, for the 18µm detector.................. 24 4.6 Pixels of a frame summed, for the 12µm detector................... 24 4.7 Comparison of cluster distributions in the 12µm and 18µm detectors....... 25 4.8 Histograms showing the effect that increasing the noise cut has on decreasing the left most peak...................................... 26 4.9 Positions of hits in the tail, calculated using the Centre of Mass Method..... 26 4.10 Example of a typical cluster from the tail...................... 26 4.11 Clusters found from the dynamic cluster finding algorithm with a) 4 pixels, b) 5 pixels, c) 6 pixels and d) 7 pixels............................ 27 4.12 Positions in the detector of the seeds from the tail. This shows a uniform spread 27 4.13 Containment diagram for the 18µm detector..................... 28 4.14 Containment diagram for the 12µm detector..................... 28 4.15 Relation of temperature and noise for the a)soft reset and b) hard reset..... 29 4

5.1 Comparison of the poisson statistics and the data found from figure 4.5..... 32

Chapter 1 Introduction Imaging devices are used in all aspects of daily life, they are present in cameras, mobile phones, CCTV and medical imaging. These imaging devices usually use either CCD or CMOS silicon pixel detectors and come in all shapes and sizes. The beauty of using a silicon detector is that due to its semi-conducting properties it can collect energy from photons and charged particles over a wide range of energies. It is such properties which make silicon detectors an attractive prospect for use in particle physics. 1.1 Pixel Detectors in Particle Physics Aside from the uses of CMOS detectors in everyday life they are increasingly common in the design of particle detectors as they can be used in the particle tracker or in the electromagnetic calorimeter. Particle trackers, also known as vertex detectors, are placed close to the beam pipe of the accelerator and are the first detector used to track the path the particle takes. This is achieved by placing the detectors in concentric rings around beam pipe and using vertex algorithms on the data to separate out the tracks produced by passing particles. Silicon detectors are well suited to this application as a particle will be effected by any amount of matter it encounters, due to the ability to create thin silicon devices which reduces the mass of the detector system. The electromagnetic calorimeters are placed further out from the particle trackers and are used to collect the electromagnetic radiation, from this the energy of the electromagnetic radiation can be determined. The first pixel detectors were developed in the 1990 s, these were vertex detectors designed in the R&D process of the LHC and other experiments. The DELPHI experiment at the LEP was the first to use a silicon detector in a colliding beam experiment [7], and were employed as a particle trackers. Modern Particle detectors such as CMS and ATLAS at CERN also use particle trackers situated close to the beam pipe. 1.2 SPiDeR SPiDeR is a collaboration between the Rutherford Appleton Laboratories (RAL) and the Universities of Bristol, London and Birmingham [13]. It s aim is to produce the next generation of silicon pixel detectors for use in particle physics, and has produced prototypes including TPAC, FORTIS and CHERWELL. TPAC is an electromagnetic calorimeter and has a near 100% fill factor [1], whereas FORTIS and CHERWELL were designed for use as particle trackers, and CHERWELL is a successor to FORTIS. 6

1.3 FORTIS Figure 1.1: Picture of the FORTIS sensor The FORTIS (4T Test Image Sensor), figure 1.1, detector was designed and made by the SPiDeR collaboration and is intended for use as a particle tracker required to have a low power consumption, high granularity and low noise. It uses a four transistor architecture and comes in two variations 1.0 and 1.1. FORTIS 1.0 has twelve substructures mainly consisting of geometric differences such as diode size, pixel pitch (6 µm, 15 µm, 30 µm and 45 µm) and size of source follower transistor [10]. FORTIS 1.1 has been made with two epitaxial layer thickness, these being 12µm and 18µm. There were some problems with the 1.0 iteration due to fabrication errors and FORTIS 1.1 was designed to correct the errors and offered some additional improvements such as a low noise implant. 1.4 Future of Pixel Detectors The next generation of pixel detectors are currently being designed and tested for use in the ILC, the International Linear Collider, experiment. The ILC is currently in th research and development phase and is a linear electron positron collider of energies up to 1TeV [2]. It is hoped that new physics will emerge from such a collider including supersymmetry, the Higgs Boson and evidence for new dimensions. This will be accomplished by using higher energies and greater luminosities than are currently in use. With higher energies and greater luminosities comes the need for detectors which are required to be fast and inexpensive simultaneously. They are also required to have higher granularity to better determine position, this will be achieved using small pixels pitches. Current pixel detectors will soon be inadequate to deal with such requirements and so new types of detectors are necessary. SPiDeR is involved in the R&D process of the ILC and is developing vertex trackers such as FORTIS as part of this process. 1.5 Objectives The objectives of this project are to investigate the effect which increasing the epitaxial layer thickness of the FORTIS device has on the charge sharing, the charge collection and the noise of the detector. This will be achieved using a Iron-55 γ-ray source to inject charge into the detector.

This project also includes an investigation into the relationship between the noise and the temperature of the detector and a comparison of the noise which occurs when two voltages are used to reset the collection diodes.

Chapter 2 Detailed Background 2.1 MAPS Monolithic Active Pixel Sensors are CMOS pixel detectors built onto a single substrate of silicon [12]. The basic structure of a MAPS device is shown in Figure 2.1, the main components are the substrate, the epitaxial layer and the charge collection diode. When a MIP passes through the epitaxial layer it deposits some of its energy in the form of electron hole pairs. When Photons travel through, if they interact with the silicon they will deposit all of their energy, again in the form of electron hole pairs. The electrons then travels by thermal diffusion and drift to the depletion region of the collection diode where it is counted [11]. Figure 2.1: Cross section of a MAPS sensor with the substrate, epitaxial layer and charge collection diode. Note here there is a deep p-well so the n-well of the PMOS transistor does not collect charge. Using MAPS in particle physics is particularly advantageous over other technologies such as CCD because of the high granularity i.e. small pixel sizes which can be achieved, they have low power consumption as the only time the pixel draws power is during the read out phase and they have a relatively low cost of manufacture due to the well known CMOS fabrication technology [4]. However there are some disadvantages. The epitaxial layer is thin (generally 10-20µm) so there is not a lot of energy deposited by a passing MIP as typically a MIP will deposit 80 electron hole pairs in 1µm of Silicon. If photons interact in the epitaxial layer they deposit all of their energy, this is more likely to occur if the epitaxial layer is thicker. Also 9

as the main charge movement type is diffusion this increases the time between a charge being deposited and it being collected at the diode, this also means that charge is spread between neighbouring pixels. The n-wells of the PMOS transistors parasitically collect charge, this means that not all the charge is collected at the collection diode however the PMOS transistors can not be removed without seriously impeding the ability of the readout electronics [1]. FORTIS attempts to overcome the problem of parasitic charge collection by introducing a deep p-well below the PMOS transistors, this is known as INMAPS. Figure 2.2: Schematic of the 3 transistor architecture. The simplest form of a MAPS is the three transistor (3T) architecture as shown in figure 2.2. These three transistors are the reset transistor, the source follower transistor and the row select transistor. First the diode is reset using the reset transistor, this involves. Charge is collected at the diode over a set integration time, after this time the row select transistor is turned on and the signal is read out to the external circuitry. and this process is then repeated. It should be noted that in this architecture the diode is simultaneously the charge collection area and the charge reading node. The SPiDeR collaboration has developed an improvement on this the four transistor architecture (4T). Figure 2.3: Schematic of the 4 transistor architecture with the extra transfer gate transistor. In the 4T architecture (figure 2.3) there is an extra transistor, the transfer gate (TX), there is also a floating diffusion node and it should be noted that the collection diode is held at a set voltage (the pinning voltage) so that the diode is fully depleted this reduces the noise in the charge transfer. In this set up the pinned collection diode collects charge when the transfer gate is closed. When the transfer gate is opened the charge is transferred to the Floating diffusion node which can then be read by the row select transistor and the pinned collection diode is reset. One of the main advantages of the 4T architecture is that there are separate nodes for charge collection and for charge readout. Because of this it is possible to reduce the ktc noise (noise from thermal fluctuations) by employing the technique of Correlated Double Sampling (CDS). CDS is where a reading is taken when the transfer gate is closed, i.e. whilst charge is being collected, and the second reading is the reading of the charge. By the subtraction of the

first reading from the second the ktc noise can be removed. 2.2 CMOS CMOS, or Complimentary Metal Oxide Semiconductor, describes a device which incorporates both NMOS and PMOS transistors in the design. In a MAPS CMOS detector NMOS and PMOS transistors are used to circuitry to be placed above the epitaxial layer of the detector. A MOS transistor is one of the most common transistors, they operate like a switch controlled by a a metal plate. A schematic of a MOS is shown in figure 2.4. The structure is a doped source and an identically doped drain which are separated by an oppositely doped substrate, this provides isolation between the source and drain. The gate is separated from the source and drain by an insulator and in MOS transistors this is a silicon oxide. NMOS transistors have n-doped silicon as the source and drain and are surrounded by p-doped silicon. PMOS are similar but the source and drain are p-doped and the surrounding silicon is n-doped. Figure 2.4: Figure showing the structure of a NMOS transistor [9] The processes involved in the operation of a MOS transistor are as follows [9]. Charge is collected in the source, if the gate is closed, i.e. the gate voltage V G = 0, charge will continue to collect at the source. The gate can be opened, this is achieved by a supplying a voltage greater than the threshold voltage, V T to the gate. This allows charge to flow across the gate to the drain, due to a high electric field across the. Thus the transistors can be used as switches to transfer charge from one area of the pixel to another and eventually be read out, also using transistors. 2.3 RTS Noise RTS noise is an effect which occurs because of the interface between the oxide and the semiconductor in MOS transistors. At this interface the difference in the lattices of the two materials causes traps to be formed. These traps capture and release electrons which increases the noise of present because of the transistor. This is more present in smaller transistors and is noticed by a tail in the noise distribution, see figure 2.5. 2.4 ktc Noise ktc noise is due to thermal fluctuations which causes the number of electrons counted to vary. This ktc noise is described by equation 2.1, where k is the Boltzmann constant, T is the temperature of the device and C is the total capacitance of the pixel [14]. This capacitance arises because the transistors in the pixel are essentially two plates of metal with a dielectric material with a voltage across the two plates, creating a device with a capacitance.

Figure 2.5: A typical noise distribution showing the tail present because of RTS noise σ ktc = kt C (2.1) 2.5 Reset Noise Due to the operational mode of the 4T when the collection diode is reset this will transfer some noise from the reset transistor, which is dependent on the capacitance of the transistor, and thus the voltage used to reset the pixel [8]. It is therefore evident that if a higher voltage is used to reset a collection diode this will increase the amount of noise in the detector. There are two voltages which can be used to reset the FORTIS detector a soft reset, which uses 3.3V and a hard reset which uses 5V. Using the hard reset will therefore increase the noise of the detector. 2.6 FORTIS The FORTIS detector has been designed to reduce the noise of the detector, the cross talk (or charge sharing) and increase the charge collection efficiency. It has 151,806 pixels in an area of 0.517cm 2 and the integration time of the detector is 250ms. FORTIS 1.1 is an upgrade to FORTIS 1.0, there were a couple of improvements made to FORTIS 1.1 which were aimed at increasing the charge collection efficiency [3], these improvements address the issues concerning MAPS use in particle detection. FORTIS 1.1 has been built with the addition of a deep p-well, this is placed underneath PMOS transistor as the n-well of the PMOS transistor parasitically attracts charge away from the collection diode. With the deep p-well all charge is only collected by the charge collection diode thus improving the charge collection efficiency. FORTIS 1.1 has also been built on both high resistivity epitaxial layer. A high resistivity epitaxial layer increases the charge collection efficiency as the depletion region of the collection diode reaches further into the silicon, this means that charge carriers produced by a MIP passing through will be transported by drift rather than diffusion. This difference will result in less charge sharing between neighbouring pixels as there will be less diffusion of charge carriers to neighbouring pixels. Every care has been taken in the design of FORTIS to reduce noise, however it is nearly impossible to eliminate all noise. The ability to use the Correlated Double sampling technique vastly reduces noise i.e. the ktc noise, as does the introduction of the p-well. The residual noise can is dominated by the dark current shot noise and the noise generated by the source

follower transistor. The dark current shot noise is a thermal process that shows a Poisson distribution and is therefore easy to recognise [15]. This noise is generated by most components in the device so is extremely difficult to eliminate. The noise generated by defects in the source follower transistor carriers are trapped and released in the defects and this generates some noise, this is also called Random telegraph noise. Figure 2.6: The substructures present in the FORTIS 1.1 detector. The FORTIS detector has been designed as a prototype detector and as such has 12 substructures which vary the geometry of each pixel which will enable the effects of these changes to be investigated. The locations of the substructures on the detector are shown in figure 2.6, these are labelled A1, A2, B1, B2, C1-C4, D1-D3, D1 BIN and E1. The differences between substructures are variations in pixel pitch, variation of the width to length ratio of the source follower transistor with a fixed width and with a fixed length, the geometry of the active pixel area and the collection diode area. The A1 and A2 have been shown not to work, but vary the pixel pitch, between 6µm and 15µm. B1 and B2 have a pitch of 15µm, B1 and B2 vary by the geometry of the active area of the pixel, B1 is a rectangle and B2 is L-shaped. C1-C4 have a variation in the width to length ratio of the source follower transistor and have a pixel pitch of 15µm. D1-D3 have a pixel pitch of 30µm, these also have increasing diode area to pixel area ratio. D1 BIN, takes four 15µm pixels and combines them with one read out circuitry with an effective 30µm pixel pitch E1 has a 45µm pixel pitch. The variation in the geometry of the source follower transistor aims to look at the RTS noise, which may vary with this geometry [5].

2.7 Charge losses in Silicon In a semiconductor such as silicon when charge moves there is a possibility that charge carriers, such as electrons and holes will recombine, this is where an electron in the conduction band falls to the valence band the energy this releases is dissipated as heat. There also the possibility of a charge carrier encountering a defect in the semiconductor [6], if this occurs then the carrier becomes trapped and will not be collected by the collection diode of the detector. This is dependent on the purity of the silicon used in the fabrication of the device. Either of these situations could cause some charge not to be collected by the collection diode of the device and will result in a broadening of peaks in charge distributions. When energy is deposited in the silicon some of this will be absorbed and create electron hole pairs, the detector is then able to count the number of electrons generated, however some of this energy will be absorbed as phonons. These phonons, which dissipate energy as thermal fluctuations cause some of the energy deposited not to be counted in the detector and lead to a broadening of peaks in charge distributions. 2.8 Iron-55 The Iron-55 source used in the experiment emits two γ-rays, these have energies of 5900keV and 6490keV produced in a ratio of 1 to 0.11 respectively. The average number of electron hole pairs deposited is given by equation 2.2, where N is the average number of electron hole pairs produced, E is the energy of the of particles deposited and 3.6eV is the amount of energy required to create an electron hole pairs in silicon. This leads to an average number of electrons hole pairs which will be deposited of 1638 and 1802 for the 5900keV and 6490keV respectively. N = E 3.6eV (2.2)

Chapter 3 Experimental Method The equipment used can be separated into three parts, the detector, the read-out system and analysis software. The detectors we used were two FORTIS 1.1 MAPS, varying only in the thickness of the epitaxial layer, one had a thickness of 12µm the other a thickness of 18µm, these have been discussed previously. The read-out system comprised of a data acquisition board, DAQ and a Camera Stack. The detector sits in the camera stack which allows communication between the detector and the DAQ and in turn the DAQ board read out this to the computer in the form of a raw binary file. The Camera stack used was reused from a previous detector, the MI 3 elena detector, made by aspect Systems, this can be used because the chip outputs are similar [3]. The DAQ system used was an OptoDAQ board which was directly linked to a computer by an optical fibre and controlled by software on the computer. This software allowed various settings to be chosen for a particular run including the area of the detector to examine, this was done using vector files which are specific to the detector and allow single regions (i.e. C2) or multiple regions (i.e. C1, C2, C3 and C4) of the detector to be used. The software also allows for the number of buffers taken to be varied, a buffer is an amount of data stored by the DAQ board which when this is reached the data is sent to the computer, thus it is possible to vary the time a particular run lasted by varying the number of buffers to take. Each buffer is an average of 4.6MB and takes around 10s to be filled. Finally the OptoDAQ produces a binary output file which we were then able to use for analysis. The output file takes the form of a header, which contains no useful information, and the data. The data is split up into frames which correspond to one integration of the detector. Each frame contains ADC counts for each pixel contained in the frame. A program was written to allow this data to be taken from the file on a frame by frame basis this was then able to analysed. There were numerous effects which needed to be taken into account including Pedestals and Noise, Common Mode, Bad Pixels, potentially lagging pixels and these were accounted for by the program. Analysis was done using the ROOT software package as this enabled histograms to be plotted and manipulated. 3.1 Calibration The first step of calibration was to determine pedestals for each pixel. Each pixel has it s own zero point known as a pedestal, this is the point where under no illumination the ADC values of a pixel center around, there is some fluctuation around this point, the noise of the detector. By plotting the distribution of these fluctuations one obtains a Gaussian distribution, from this the pedestal is determined to be the average value of the distribution and the noise is the standard deviation of this distribution. Pedestal values are subtracted from the ADC count to 15

zero each pixel. Noise values can be used to determine weather an event has occurred in a pixel, by calculating the Signal to Noise ratio and taking any values greater than 10 to be an event. Due to electrical surges and other fluctuations in the detector there is a feature called Common Mode, this is where the ADC readings from particular frames all rise and fall together. This was compensated for by taking the average pixel reading in a frame and taking the standard deviation of the resulting distribution, those frames which had averages greater or less than 5 standard deviations were ignored to remove the effect of this common mode. When the detector is in use there is a build up of residual charge, this is due to pixels not being reset fully, and this causes a gradual increase in the ADC count over time. This is due to a failure to completely reset the charge in a pixel to it s pedestal between frames. The result of this build up of residual charge over the course of a data collection run is a gradual increase in ADC values. The technique used to counteract this effect was to take the mean ADC count of a frame, then take the mean of this over all frames. By then taking the difference between the this value and the average of a particular frame a correction factor for each frame can be obtained to counteract this effect. This is then divided by the number of pixels and subtracted from each pixel reading. In order to take events into account, which will increase the mean reading of a pixel, a cluster finding algorithm was used to find events, these pixels were then ignored from the calculation of the mean reading of a frame. Figure 3.1: Figure shows the average pixel reading of a frame, can see an increase in values in the first 100 frames. When the detector is not in use the collection diodes still collect charge, this means that when the detector is next used this charge needs to be reset before pixels return to their pedestals. Figure 3.1 shows the average pixel reading of a frame, it can be seen that in the first 100 frames the mean pixel reading increases and then settles. Consequently it is necessary to ignore the first 200 frames of a particular run of the detector to compensate for this effect. The ADC count produced by the detector is an indicator of how much charge has been produced in a pixel. Each pixel has a slightly different collection diode, and as such the ADC produced by each pixel will be slightly different, this means that even if two pixels collect the same number of electrons the ADC count generated will vary from pixel to pixel. This leads to broadening of results taken used using ADC counts, also the ADC has no real physical meaning. So the gain, which can be thought of as a conversion factor from ADC to number of electrons, must be calculated for each pixel. Doing this provides results in a meaningful form and this was achieved using the Photon Transfer Curve, PTC, technique. This technique involves using a light source (a LED) to illuminate the detector at varying intensities, this is achieved by varying the voltage supplied to the LED over a range of 0-20V. The result is that when the detector is illuminated at different intensities the responses of the

signal, x, and the noise, σ, of a pixel vary in different ways, noise varies by σ = g N (where σ is the noise, g is the gain and N is the number of electrons generated) and the signal values vary by x = gn, thus when a plot of the signal against noise squared is made there is linear increase, this has a gradient is σ 2 = gx which is measured in units of e-/adc and is the gain. By multiplying the gain with the ADC the result is the signal given in electrons which allows useful measure. Figure 3.2 shows the PTC curve for one pixel, the points of note are the linear increase and the maximum. As previously mentioned the linear increase gives the gain value of a selected pixel. The maximum gives the point of full well of the collection diode, this is the point were there is no increase in noise. Figure 3.2: The PTC curve of a single pixel The gradient was found using the least squares method, see appendix A, this was done for each pixel, however as each pixel behaves differently the range of values which were used for the least squares calculation had to be determined. This was achieved by plotting all of the PTC curves on one graph, figure 3.3, and by selecting a range which suited most pixels. Then pixels which this didn t suit were then excluded from further analysis because gains for these pixels would be erroneous, this was determined by plotting a distribution of all the gains, figure 3.4. Those outside of 5 standard deviations were blocked. Figure 3.3: PTC curves from all the pixels in the detector, used to determine a range for the Least Squares Method.

Figure 3.4: Gain distribution of all the pixels present in the device. 3.2 Blocked Pixels There are a number of pixels which were found not to be performing correctly, these were blocked, and so were not taken into account in the results. Pixels were blocked if they had no noise, or the noise was outside of 5 standard deviations from the mean of the noise distribution, if the gains were outside of 5 standard deviations from the mean of the gain value distribution, or if the pixel was around the edge of the substructure. This ensured that only well behaved pixels were used in any of the results. 3.3 Cluster Finding Algorithms To do any sort of analysis of the collection of charge in the epitaxial layer we must find those pixels which have collected charge. This was done on a frame by frame basis, there were 100,000 frames used to collect data as this provides a large number of clusters to analyse. In a frame all the unblocked pixels were examined to see if they had a high signal to noise (SN) ratio. If any pixels with a SN ratio greater than 5 were found the surrounding pixels, those in the 3x3 square around it, were also examined to look for pixels with a higher SN ratio. A seed threshold of 10 times the signal to noise ratio was decided upon as this should eliminate almost all of the noise fluctuations, and still give a large number of clusters. If any pixels with a higher ratio was found in the surrounding area then the algorithm continues, however if no higher SN ratio are found then the pixel is recorded as a seed pixel. Thus by definition a seed pixel is the pixel with the highest SN ratio in the area around it. Once the seed pixels in a frame had been found then the charge deposited in a 5x5 grid around the seed pixels could be added together to give a value for the total charge deposited in that region, this value is the charge deposited in a cluster of pixels. A 5x5 area was chosen because of the inherent charge sharing in the detector, this is discussed further in section 4.2.5. There are two ways to count this charge, counting all the charge in a fixed area or only count the charge above a certain SN ratio. Both systems were used as each has its own disadvantages and a broader picture of what was occurring could be obtained by considering both. In the fixed area cluster finding algorithm an area is chosen and all the charge deposited in those pixels is counted as being part of the cluster. This is advantageous as it definitely collects all of the charge deposited, however there is also some pixels in this region which will not have collected any charge, in this case noise is also counted as part of the cluster charge. In theory these fluctuations should cancel out if their number is great enough, but there could be too few in a 5x5 area for this to happen, as all pixels have different magnitudes of noise. If only charges in the 5x5 region around a seed pixel which are above a SN ratio are used to calculate the cluster charge then this is known as a dynamic cluster, because the area chosen

changes dependent on the charge collected in the pixels. This has the advantage of selecting only relevant charges, however there is the possibility that in this case some pixels which did collect charge are excluded from the calculation of the cluster charge. Pixels in the 5x5 area which had a SN greater than 3 were chosen for inclusion in the summation of charge, this was chosen to minimise excluded pixels. Other considerations have to be taken into account, for example, if a seed pixel was found and in the surrounding 5x5 area there was a blocked pixel these seed pixels were excluded to ensure that blocked pixels were not included in any calculations. The cluster finding algorithm also excluded a border of three pixels around the edge of each substructure this ensured that no edge effects were included in the search for clusters. 3.4 Temperature Control An investigation into the effect that the temperature of the detector has on the noise fluctuations was undertaken, as stated in section 2.1, the detector should be dominated by ktc noise, which has linear dependence on temperature. To investigate this it was necessary to vary the climate which the detector was in, this was achieved using a Votsch VCL 7006, which has a temperature range of -70 C to 180 C. We only used a range of -20 C to 20 C, in steps of 5 C. 3.5 Lagging Pixels In the ideal situation a pixel will collect no charge, reading only noise, if no charge is deposited in the epitaxial layer. If some charge is deposited the charge will be collected by the collection diode and read for one frame only before the pixel is reset. However if not all the charge is reset between frames the pixel is said to be lagging, this causes charge to linger in the collection diode, this is known as pixel lag, shown in figure 3.5. The cluster finding algorithm works on a frame by frame basis, this means that when charge is deposited in a lagging pixel the charge will remain between frames if the lingering charge is above the seed threshold it will be counted as an other cluster in the succeeding frames until the charge is reset to below the seed threshold. Pixel lag is evident in the detector when a Soft Reset mode is used, this mode of reset uses 3.3V to reset the collection diode and differs from the Hard reset which uses a voltage of 5V. Figure 3.5: Time Evolution of the signal detected in a row. The x axis shows the frame, the y axis is the row number and the z axis is the signal to noise collected in a row. a) shows the ideal situation and b) shows a lagging pixel, note that you can see an exponential decrease in the charge for the lagging pixel

It was possible to separate out lagging pixel from results by devising an algorithm to do this. This algorithm works by comparing the signals from pixels between three frames. In the first frame, before an event, the pixel should have a signal below the seed cut, in the frame in which the event initially occurs the signal is above the seed cut and registers as a seed pixel. If the there is a seed in the first and second then this is a lagging pixel, if only the second frame has a signal then this is a non-lagging pixel. Using this it was possible to separate out the lagging pixels from the results and by potting the distribution to see their effect.

Chapter 4 Results This chapter is divided into three sections, the differences found with the two reset regimes, the differences between the two epitaxial layer thicknesses and a section on the relationship between temperature and noise. 4.1 Differences Between Hard and Soft Reset There are various differences found between using hard and soft reset. These include the number of lagging pixels which is greatly reduced in hard reset and the amount of noise in the detector which is increased by hard reset. When using the hard reset it was found that only the C2 substructure was functioning. For the analysis of these results the C2 substructure of the 12µm detector has been used to enable direct comparison to be drawn between the hard and soft reset, except for the results of lag, where both detectors were used. 4.1.1 Lagging Pixels The presence of lagging pixels prompted an investigation into the difference between hard and soft reset. Initial investigations found that lag was apparent in most pixels, not just a small number, also it was found that the lagging pixels were spread throughout the detector evenly. Quantitatively the number of clusters which showed lag was 40750 clusters out of 62081 clusters for the 12µm and 54530 out of 85285 clusters for the 18µm, when using soft reset. From this we can see that the two detectors are both suffering from equivalent amounts of lagging pixels and that the soft reset is not reliable for collecting data because of the lag which is present in over half the clusters. When the hard reset is used the quantitatively the number of pixels which showed lag was 530 out of 67925 clusters for the 12µm and 435 out of 86465 clusters for the 18µm, when using soft reset. From this we can see that the number of lagging pixels is reduced significantly when hard reset is used. 4.1.2 Noise Due to the increased voltage of the hard reset there should be a great increase in the noise of the detector. This was observed and is shown in figures 4.1 and 4.2, for the soft reset noise values of 18 ADC counts and for the hard reset noise values of 40 ADC counts were observed. This matches the theory of the reset noise increasing. The increase in voltage between the hard 21

and soft reset is 150%, from 3.3V to 5V for soft and hard respectively and the increase in noise is that of 220%. Figure 4.1: The noise distributions for C2 on the 12µm detector using soft reset Figure 4.2: The noise distributions for C2 on the 12µm detector using hard reset The noise distributions of figures 4.1 and 4.2 show there is a noticeable broadening on the right of the peak, this is more evident in the soft reset. This broadening is the result of random telegraph signal (RTS) noise in the detector and this is reduced when using the hard reset. 4.1.3 Clusters There is a vast difference between the two reset regimes, using the 12µm detector and comparing the cluster distributions, shown in figure 4.3. The first thing to notice is the position of the peak in the two distributions, the soft reset has a peak at 1400 and the hard reset at 1700, the iron-55 source used should show a major peak at 1600 electrons. The second thing to notice is the tails in the distributions, the soft reset has a tail before and after the peak, whereas the hard reset only has a noticeable tail before the peak. Thirdly the peak for the soft reset is broader then that for the hard reset. The difference in the peak values between hard and soft reset could be due to an incorrect gain calibration of the soft reset, this would also explain the broadening of the distribution. There were two attempts made at calibrating the soft reset detector but this did not rectify the problem, however it is likely that the gain calibration is the cause of the low peaks seen in soft reset. The low peak noticed in the soft reset, at 500 electrons, is likely to be noise from using a low seed cut, this is shown in figure 4.8 and is discussed in section 4.2.4. Charge losses in the detector could account for some of the tails produced before the peak, and also some of the broadening of the left half of the peaks. In the soft reset there is a tail after the main peak, this is unlikely to be the secondary iron-55 peak which should be at 1800

a) b) Figure 4.3: Cluster distributions for a)hard reset and b)soft reset mode electrons because of the relative distance from the main peak and it doesn t have the appearance of the tail of a distribution and so it is likely to be anomylous high readings. 4.2 Comparison of 12µm and 18µm Detectors In this section results of the 12µm and 18µm detectors are compared to find what effect the increased epitaxial layer thickness has on the charge collection of the detectors. The results in this section use a hard reset because for all the hard reset produces more noise and limits the use of different substructures to only the C2 but the results are more reliable because the lagging pixels are almost completely eliminated. 4.2.1 Noise The noise present in the two detectors is very similar, as shown in figure 4.4. By looking at the noise distribution, using a hard reset the 12µm detector has a mean noise of 40.8 ADC, whereas the 18µm detector has a mean noise of 41.1 ADC. This indicates that the difference in the noise between the two detectors is negligible and so the increased. a) b) Figure 4.4: Comparison of noise in the a) 12µm and b) 18µm detectors On the right of the peaks in figure 4.4 there is a small tail in the distribution, this is due to the RTS noise. This does not vary significantly between the two detectors. 4.2.2 Summed Frames By summing all the pixels of a frame together and then plotting the distribution of these values gives a plot shown in figure 4.5. This plot shows a first peak around 0, this peak is from the noise in the detector and is from frames which do not have any photons deposited in them. The

second peak is the iron-55 peak from when only one photon has been deposited, the following peaks come from two photons and three photons etc. Figure 4.5: Pixels of a frame summed, for the 18µm detector Figure 4.6: Pixels of a frame summed, for the 12µm detector. When the two summed frames are compared it can be seen that some of the frames for the 18µ detector have 4 photons deposited in a single frame, whereas for the 12µ detector the most number of photons deposited per frame is 3. This is due to the increased epitaxial layer. 4.2.3 Clusters By using the cluster finding algorithm and by plotting the distributions of the charge of clusters it is possible to compare the charge collection in the 12µm and 18µm detectors, these are shown in figure 4.7. To count the number of clusters the distributions were integrated over the range of the peak, from 1500 to 2000, electrons excluding the left hand tail. This gives the number of cluster found. The number of blocked pixels varies between detectors, so the number of blocked pixels needs to be taken into account when counting the number of clusters. This is achieved using equation 4.1, where N is the number of clusters found by the integration technique, b is the number of blocked pixels, 128 2 is the number of pixels of the detector used. This gives a normalised number of clusters which accounts for the number of blocked pixels in each detector.

Figure 4.7: Comparison of cluster distributions in the 12µm and 18µm detectors Normalised Number of Clusters = N ( 128 2 ) b The number of clusters found in a run of 100000 frames, which equates to about 40 minutes, was found by equation 4.1, for the 12µm detector is 99986 and for the 18µm detector is 124140. Due to the 50% increase of epitaxial layer volume the number of clusters found was expected to be 50% larger in the 18µm detector. Instead the increased volume generates 24154 more clusters or 19.45%. 4.2.4 Description of Tail in Clusters In figure 4.7, there is a noticeable tail before the peak, this was mentioned in section 4.1.3. This tail can be split up into two contributing components, noise and losses. Figure 4.7 used a signal to noise ratio of 10 to find seed pixels, if this signal to noise ratio is raised or lowered the first part of the tail decreases and increases accordingly, this is shown in figure 4.8. It can be seen that at low SN ratios there is a clear peak, which is residual noise induced by a low SN seed cut, as the SN seed cut is raised this peak diminished and when a SN of 20 is used the peak is completely removed, although this also reduces the number of clusters found. It was thought that the second contribution to the tail could be from charge losses in the epitaxial layer, when charge carriers recombine before being collected, this is shown as the left side of the peak spreads more due to less charge being collected. This is most likely if the charge is deposited further away from the diode. The corners of pixels and deep in the epitaxial layer are the furthest away from the collection diode possible. Both of these, when a centre of mass positioning algorithm is used, will be indicated as charges deposited in the corners or edges of seed pixels. The results from the centre of mass algorithm are shown in figure 4.9 where 0.5 is the edge of a pixel. From this it can be seen that only a few are from deposits in the corners or edges of the seed of pixels, with the majority of charge being collected mostly by the seed pixel. This is verified by looking at individual clusters from the tail, a typical example is shown in figure 4.10. This cluster is collected mostly by the seed pixel this pixel only collects around 400 electrons, which is 1200 less than the expected 1640 electrons for the iron-55 source used. This indicated that there are some pixels in which charge is not being fully collected, i.e. they are inefficient. 128 2 (4.1)

Figure 4.8: Histograms showing the effect that increasing the noise cut has on decreasing the left most peak. Figure 4.9: Positions of hits in the tail, calculated using the Centre of Mass Method Figure 4.10: Example of a typical cluster from the tail. The dynamic cluster finding algorithm supports this, because the algorithm only chooses the pixels in a cluster above a certain SN threshold it gives data for the number of pixels in a cluster. By looking at the cluster charge distributions from the dynamic clusters, figure 4.11 it can be seen that the majority of the tail is from clusters with less than 4 pixels. This indicates that the charge is mostly collected by the seed pixel which would result in a low charge collection if the seed pixel has an inefficient collection diode. The position of the inefficient pixels contributing to the tail is plotted in figure 4.12, this shows that they are spread uniformly throughout the detector.

a) b) c) d) Figure 4.11: Clusters found from the dynamic cluster finding algorithm with a) 4 pixels, b) 5 pixels, c) 6 pixels and d) 7 pixels. Figure 4.12: Positions in the detector of the seeds from the tail. This shows a uniform spread 4.2.5 Sharing of Charge When charge is deposited in the epitaxial layer, depending on the distance from the collection diode at which is it was deposited, the charge carriers may move by diffusion or drift. If charge is deposited lower down there is an increased likelihood that diffusion will be the main mode of transport because the charge is further from the depletion region of the collection diode, in this case the deposited charge will be spread over a number of pixels. By looking at the differences in the sharing between 12µm and 18µm a number of different effects can be observed. Figure 4.13 shows a plot, for the 18µm detector, of the charge collected in the seed pixel of a cluster

against the charge collected in the cluster minus the charge collected in the seed pixel. Figure 4.13: Containment diagram for the 18µm detector. This plot provides a great deal of insight into what is happening in the detector. For instance the graph can be compared to the equation Q = S + C where Q is the total charge deposited in a cluster, S is the charge deposited in the seed and C is the charge deposited in the rest of the cluster, this can be rearranged to give C = S + Q (or where C is the y axis and S the x axis of the plot in figure 4.13, y = x + Q). As the plot shows the projected y-intercept, or total charge collected by a cluster is in the range of 1500-1900 and a negative slope can be seen as expected. Figure 4.14: Containment diagram for the 12µm detector. The plot is a 2D histogram and shows the number of points in each bin as a range of colours, this shows that in the 18µm detector there are many pixels which have a relatively low charge in the seed pixel, but which collect the remaining charge in the cluster. This indicates a large amount of charge sharing in the 18µm detector. In comparison to the 12µm detector, which is shown in figure 4.14, more seed pixels collect greater charge, this indicates less charge sharing in the 12µm detector. This is expected as in the 12µm detector the charge must be deposited closer to the depletion region of the collection diode, meaning less sharing of charge due to the increased likelihood that the most common mode of transport in the detector is drift rather than diffusion. The distribution of charge perpendicular to the slope can be explained as charge losses in