KL Intel Huron River Platform with iscrete GFX FN / THERML EM- RIII-SOIMM RIII-SOIMM Speaker udio Jack (External MI) PG PG Head-Phone Jack SPIF PG PG ual hannel R /.V ST - H USeST PG ST - -ROM UIO OE L PG PG PG amera -MI PG R SYSTEM MEMORY ST M ST M ST M PG,,, IH US. <MH Process> Sandyridge. rpg FI FI PH MI MI ougarpoint. PG,,,,, MIX PI-E Graphics Interfaces US. PI-E PI-Express Port,, Port Port, US. Ports X X Mini PI-E ard luetooth M (nm) apilano INT_RT INT_LVS X LN p PG,,,,,, INT_HMI Mini PI-E ard X PG PG PG MHz HMI ON PG RT PG L ONN PG X ard Reader REGULTOR (R).VSUS,.VSMR_VTERM,.V.V_GPU,.V_PU REGULTOR.V_VTT,.V / VPU, VPU, V PU ore VG ore iscrete PG PG PG PG.KHz LP (WLN/ WWN) roadcom (//G LN) M/ PGE PGE JM/ PGE E IT PGE MHz -IN- ard Reader ONN PG mbient LIGHT SENSOR PG PROJET : KL Quanta omputer Inc. Size ocument Number Rev ustom LOK IGRM ate: Saturday, July, Sheet of
P IN T harger ircuit ISL VPU MXETJ VPU a HWPG(/VPU) VPU S_ON VPU O VPU O V_S V_S SYS_PWROK HWPG(ll Power GOO) PM_RM_PWRG H_PWRGOO PLTRST# Huron River VTTPWRGOO SM_RMPWROK UNOREPWRGOO RSTIN# GPU_RST# Madison GPU_RST# VPU WRST_# R K.U NSWON# HWPG(ll Power GOO) WRST# E ITE- ELY ms a b RSMST# SIO_PWRTN# PM_SLP_S# PM_SLP_S# EPWROK RSMRST# PWRTN# PLTRST# RMPWROK PH GPIO SYS_PWROK PWROK MEPWROK GPIO GPIO GPU_HOL_RST# IMVP_PWRG SYS_PWROK a GPU_PWR_EN# GFXPG_R VPU VTM VTS VR_REY VRON R ohm V_ORE V_GFX a VRON a HWPG(/VPU) a HWPG(.VSUS) a SUSON TPSREGR a.v_sus b.v_vtt LO d.vsmr_vterm OZ b HWPG(.V_VTT) VPU c.vpu_pg b._ph HWPG(ll Power GOO) O a VSUS OZ b HWPG(.V_VTT) VPU b.v O a VSUS OZ b HWPG(.V) b MINON b.v a GPU_PWR_EN# b c MX b GFXPG_V_EN a GFX_ORE.VSUS LO RT a V_GFX_PIE OZ VPU ON VPU b b b HWPG(.V) V V ON b V_PIE_PG V O.VSUS TP-H.V O a.v_ely a.v_gpu a HWPG.V_GPU elay b GPU_PWROK GFXPG_R.VSUS O.VSUS O b b.v.vpu elay c.vpu_pg PROJET : KL Quanta omputer <Project Inc. Name> Size ocument Number Rev POWER SEQUENE IGRM Saturday, July, ate: Sheet of
LK Gen(LK) / EL for Pre-ES PU_LK select(lk) SMus(LK) V R.K/J_ / EL for Pre-ES Q SM_PH_T SM_RUN_T SM_RUN_T, NK V PU_SEL PU/=MHz (default) PU/=MHz SM_PH_LK Q NK R.K/J_ SM_RUN_LK SM_RUN_LK, PROJET : KL Quanta omputer Inc. Size ocument Number Rev lock Generator ate: Saturday, July, Sheet of
MI_TXN MI_TXN MI_TXN MI_TXN MI_TXP MI_TXP MI_TXP MI_TXP MI_RXN MI_RXN MI_RXN MI_RXN MI_RXP MI_RXP MI_RXP MI_RXP FI_TXN FI_TXN FI_TXN FI_TXN FI_TXN FI_TXN FI_TXN FI_TXN FI_TXP FI_TXP FI_TXP FI_TXP FI_TXP FI_TXP FI_TXP FI_TXP FI_FSYN FI_FSYN FI_INT FI_LSYN FI_LSYN ep_omp Sandy ridge Processor (MI,PEG,FI) INT_eP_HP_Q ep_omp connect to PIN W:mils/S:mils/L: mils. ep_omp connect to PIN W:mils/S:mils/L: mils. G E F G F H E F E G E G F J J H J H F G E F U MI_RX#[] MI_RX#[] MI_RX#[] MI_RX#[] MI_RX[] MI_RX[] MI_RX[] MI_RX[] MI_TX#[] MI_TX#[] MI_TX#[] MI_TX#[] MI_TX[] MI_TX[] MI_TX[] MI_TX[] FI_TX#[] FI_TX#[] FI_TX#[] FI_TX#[] FI_TX#[] FI_TX#[] FI_TX#[] FI_TX#[] FI_TX[] FI_TX[] FI_TX[] FI_TX[] FI_TX[] FI_TX[] FI_TX[] FI_TX[] FI_FSYN FI_FSYN FI_INT FI_LSYN FI_LSYN ep_ompio ep_iompo ep_hp ep_ux ep_ux# ep_tx[] ep_tx[] ep_tx[] ep_tx[] ep_tx#[] ep_tx#[] ep_tx#[] ep_tx#[] PU-P-rPG MI Intel(R) FI ep PI EXPRESS* - GRPHIS PEG_IOMPI PEG_IOMPO PEG_ROMPO PEG_RX#[] PEG_RX#[] PEG_RX#[] PEG_RX#[] PEG_RX#[] PEG_RX#[] PEG_RX#[] PEG_RX#[] PEG_RX#[] PEG_RX#[] PEG_RX#[] PEG_RX#[] PEG_RX#[] PEG_RX#[] PEG_RX#[] PEG_RX#[] PEG_RX[] PEG_RX[] PEG_RX[] PEG_RX[] PEG_RX[] PEG_RX[] PEG_RX[] PEG_RX[] PEG_RX[] PEG_RX[] PEG_RX[] PEG_RX[] PEG_RX[] PEG_RX[] PEG_RX[] PEG_RX[] PEG_TX#[] PEG_TX#[] PEG_TX#[] PEG_TX#[] PEG_TX#[] PEG_TX#[] PEG_TX#[] PEG_TX#[] PEG_TX#[] PEG_TX#[] PEG_TX#[] PEG_TX#[] PEG_TX#[] PEG_TX#[] PEG_TX#[] PEG_TX#[] PEG_TX[] PEG_TX[] PEG_TX[] PEG_TX[] PEG_TX[] PEG_TX[] PEG_TX[] PEG_TX[] PEG_TX[] PEG_TX[] PEG_TX[] PEG_TX[] PEG_TX[] PEG_TX[] PEG_TX[] PEG_TX[] J J H K M L J J H H G G F E E J L K H H G G F F E E F E M M M L L K K J J H G E F F E M M M L L K K J J H G E F E PEG_RXN PEG_RXN PEG_RXN PEG_RXN PEG_RXN PEG_RXN PEG_RXN PEG_RXN PEG_RXN PEG_RXN PEG_RXN PEG_RXN PEG_RXN PEG_RXN PEG_RXN PEG_RXN PEG_RXP PEG_RXP PEG_RXP PEG_RXP PEG_RXP PEG_RXP PEG_RXP PEG_RXP PEG_RXP PEG_RXP PEG_RXP PEG_RXP PEG_RXP PEG_RXP PEG_RXP PEG_RXP PEG_TXN_ PEG_TXN_ PEG_TXN_ PEG_TXN_ PEG_TXN_ PEG_TXN_ PEG_TXN_ PEG_TXN_ PEG_TXN_ PEG_TXN_ PEG_TXN_ PEG_TXN_ PEG_TXN_ PEG_TXN_ PEG_TXN_ PEG_TXN_ PEG_TXP_ PEG_TXP_ PEG_TXP_ PEG_TXP_ PEG_TXP_ PEG_TXP_ PEG_TXP_ PEG_TXP_ PEG_TXP_ PEG_TXP_ PEG_TXP_ PEG_TXP_ PEG_TXP_ PEG_TXP_ PEG_TXP_ PEG_TXP_ PEG_OMP PEG_OMP connect to PIN H&J W:mils/S:mils/L: mils. PEG_OMP connect to PIN J W:mils/S:mils/L: mils. PEG_RXN[..] PEG_RXP[..],,, PLTRST#, SN_IV# N. at SN ES #.v H_SN_IV# E_PEI H_PROHOT# PM_THRMTRIP# PM_SYN H_PWRGOO.V_VTT PU_PLTRST# V_S R R R R R R TP TP /J_ /J_ /J_ K/J_ /J_ /J_ SKTO# TP_TERR# H_PROHOT#_R PM_SYN_R H_PWRGOO_R PM_RM_PWRG_R PU_PLTRST#_R Sandy ridge Processor (LK,MIS,JTG) N L N L N M P V R U PRO_SELET# SKTO# TERR# PEI PROHOT# THERMTRIP# PM_SYN UNOREPWRGOO SM_RMPWROK RESET# PU-P-rPG.V_PU LK_PLL_SSLKP_R LK_PLL_SSLKN_R SM_ROMP_ SM_ROMP_ SM_ROMP_ XP_PRY# XP_PREQ# XP_TLK XP_TMS XP_TRST# XP_TI_R XP_TO XP_RST# U.U/V_ R U V /F_ N SYS_PWROK PM_RM_PWRG_Q R /F_ IN PM_RM_PWRG R /J_ PU_PLTRST# GNOUT TSH LVGGW R R */J_ *.K/F_ MIS THERML PWR MNGEMENT V_S LOKS R MIS JTG & PM.U/V_ LK LK# PLL_REF_LK PLL_REF_LK# SM_RMRST# SM_ROMP[] SM_ROMP[] SM_ROMP[] PRY# PREQ# TK TMS TRST# TI TO R# PM#[] PM#[] PM#[] PM#[] PM#[] PM#[] PM#[] PM#[] R K P P R R P R P L T R R T P R T R R R R R R LK_PU_LKP LK_PU_LKN R Rb Rc Ra PU_RMRST# /F_./F_ /F_ SM_ROMP[] W:mils/S:mils/L: mils, SM_ROMP[] W:mils/S:mils/L: mils, SM_ROMP[] W:mils/S:mils/L: mils, R TP TP TP TP TP TP TP *IS@/J_ *IS@/J_ K/J_ PM_RM_PWRG_R SW@X V XP_RST# LK_PLL_SSLKP LK_PLL_SSLKN Ra Rb Rc IS N ohm ohm SW/UM ohm N N PM_RM_PWRG_R R *K/F_ Q *NK MINON#,, FI isable R *IS@K/F_ R R R R *IS@K/F_ *IS@/J_ *IS@/J_ *IS@/J_ FI_INT FI_FSYN FI_FSYN FI_LSYN FI_LSYN FI_FSYN can gang all these signals together and tie them with only one K resistor to GN (G V. h..). PEG x (UM Non-stuff) PEG_TXP[..] PEG_TXP_.U/V_ PEG_TXP PEG_TXN_ PEG_TXP_.U/V_ PEG_TXP PEG_TXN_ PEG_TXP_.U/V_ PEG_TXP PEG_TXN_ PEG_TXP_.U/V_ PEG_TXP PEG_TXN_ PEG_TXP_.U/V_ PEG_TXP PEG_TXN_ PEG_TXP_.U/V_ PEG_TXP PEG_TXN_ PEG_TXP_.U/V_ PEG_TXP PEG_TXN_ PEG_TXP_.U/V_ PEG_TXP PEG_TXN_ PEG_TXP_.U/V_ PEG_TXP PEG_TXN_ PEG_TXP_.U/V_ PEG_TXP PEG_TXN_ PEG_TXP_.U/V_ PEG_TXP PEG_TXN_ PEG_TXP_.U/V_ PEG_TXP PEG_TXN_ PEG_TXP_.U/V_ PEG_TXP PEG_TXN_ PEG_TXP_.U/V_ PEG_TXP PEG_TXN_ PEG_TXP_.U/V_ PEG_TXP PEG_TXN_ PEG_TXP_.U/V_ PEG_TXP PEG_TXN_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_ PEG_TXN PEG_TXN PEG_TXN PEG_TXN PEG_TXN PEG_TXN PEG_TXN PEG_TXN PEG_TXN PEG_TXN PEG_TXN PEG_TXN PEG_TXN PEG_TXN PEG_TXN PEG_TXN PEG_TXN[..] P & PEG ompensation.v_vtt.v_vtt.v_vtt R./F_ PEG_OMP PEG_IOMPI and ROMPO signals should be routed within mils typical impedance = mohms PEG_IOMPO signals should be routed within mils typical impedance =. mohms R R K_./F_ INT_eP_HP_Q ep_omp ep_ompio and IOMPO signals should be shorted near balls and routed with typical impedance < mohms Processor pull-up(pu).v_vtt H_PROHOT# R /F_ XP_TO R /J_ XP_TMS R /J_ XP_TI_R R /J_ XP_PREQ# R */J_ XP_TLK R /J_ XP_TRST# R /J_ PROJET : KL Quanta omputer Inc. Size ocument Number Rev Sandy ridge / ate: Sheet of Saturday, July,
Sandy ridge Processor (R) U U M Q[:] M S# M S# M S# M S# M RS# M WE# M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q F F G G F F G G K K K J J J J K M N N N M M N M G G K K H H J J J K J K H H L L P N L M M L P N J H L K L K J H E F V E F S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_S[] S_S[] S_S[] S_S# S_RS# S_WE# R SYSTEM MEMORY S_LK[] S_LK#[] S_KE[] S_LK[] S_LK#[] S_KE[] RSV_TP[] RSV_TP[] RSV_TP[] RSV_TP[] RSV_TP[] RSV_TP[] S_S#[] S_S#[] RSV_TP[] RSV_TP[] S_OT[] S_OT[] RSV_TP[] RSV_TP[] S_QS#[] S_QS#[] S_QS#[] S_QS#[] S_QS#[] S_QS#[] S_QS#[] S_QS#[] S_QS[] S_QS[] S_QS[] S_QS[] S_QS[] S_QS[] S_QS[] S_QS[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] V V W W K L G H H G G H G J M L M R M F K N L M R M W W W V V W W V W V W F V V M QSN M QSN M QSN M QSN M QSN M QSN M QSN M QSN M QSP M QSP M QSP M QSP M QSP M QSP M QSP M QSP M M M M M M M M M M M M M M M M M LKP M LKN M KE M LKP M LKN M KE M S# M S# M OT M OT M QSN[:] M QSP[:] M [:] M Q[:] M S# M S# M S# M S# M RS# M WE# M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q G F F G G F F G J J K K J J K K M N N N M N M M M M R P N N N P P N T T P N R R R J T T H R J H T N R T T N R T R S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_S[] S_S[] S_S[] S_S# S_RS# S_WE# R SYSTEM MEMORY S_LK[] S_LK#[] S_KE[] S_LK[] S_LK#[] S_KE[] RSV_TP[] RSV_TP[] RSV_TP[] RSV_TP[] RSV_TP[] RSV_TP[] S_S#[] S_S#[] RSV_TP[] RSV_TP[] S_OT[] S_OT[] RSV_TP[] RSV_TP[] S_QS#[] S_QS#[] S_QS#[] S_QS#[] S_QS#[] S_QS#[] S_QS#[] S_QS#[] S_QS[] S_QS[] S_QS[] S_QS[] S_QS[] S_QS[] S_QS[] S_QS[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] S_M[] E R E R T T E E E E F K N N P K P G J M N P K P T R T T T T R T R R T R R M QSN M QSN M QSN M QSN M QSN M QSN M QSN M QSN M QSP M QSP M QSP M QSP M QSP M QSP M QSP M QSP M M M M M M M M M M M M M M M M M LKP M LKN M KE M LKP M LKN M KE M S# M S# M OT M OT M QSN[:] M QSP[:] M [:] PU-P-rPG PU-P-rPG.V_SUS, R_RMRST# R K/F_ PU_RMRST#_R R K/F_ R */J_ PU_RMRST# RMRST_NTRL_PH RMRST_NTRL_E V_S R K/J_ R R /J_ */J_ Q NK.U/V_ R.K/F_ PROJET : KL Quanta omputer Inc. Size ocument Number Rev Sandy ridge / ate: Saturday, July, Sheet of
U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ Reserved *U/.V_ PU ore Power SN W: uf x uf x (Non-stuff) U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ *U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ *U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ Sandy ridge Processor (POWER) V_ORE G G G G G G G G G G F F F F F F F F F F Y Y Y Y Y Y Y Y Y Y V V V V V V V V V V U U U U U U U U U U R R R R R R R R R R P P P P P P P P P P UF V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V POWER ORE SUPPLY SENSE LINES SVI PEG N R VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VILERT# VISLK VISOUT V_SENSE VSS_SENSE VIO_SENSE VSSIO_SENSE H H G Y U P L J J J J H H H G G G F F F F E E E J J J J J J.V_VTT.V_VTT_ H_PU_SVILRT# H_PU_SVILK H_PU_SVIT PU VTT SN W:. uf x uf x (Non-stuff) U/.V_ *U/.V_ *U/.V_ U/.V_ *U/.V_ VTT_SENSE TP uf (Reserved) *U/.V_ R U/.V_ U/.V_ */short_ R R,, *U/.V_ U/.V_ U/.V_ /J_ /J_ SMR_VREF U/.V_ U/.V_ *U/.V_.V_VTT PU VPL SN W: uf/mohm x uf x uf x U/.V_ U/.V_ V_ORE V_SENSE, VSS_SENSE, R.V PU VGT SN W: uf x uf x (Reserved) V_GFX */J_ U/.V_ U/.V_ U/.V_ *U/.V_ R U/.V_ VR_REF_PU Ra U/.V_ U/.V_ U/.V_ *U/.V_ *IS@/J_ IS Ra ohm U/.V_ Sandy ridge Processor (GRPHI POWER) U/.V_ U/.V_ U/.V_ *U/.V_ SW N U/.V_ Layout note: need routing together and LERT need between LK and T H_PU_SVILK Place PU resistor close to PU H_PU_SVIT U/.V_ U/.V_ U/.V_ *U/.V_ *U/V_ R.V_VTT R /F_ T T T T T T R R R R R R P P P P P P N N N N N N M M M M M M L L L L L L K K K K K K J J J J J J H H H H H H /J_ UG PU-P-rPG R G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G VPLL VPLL VPLL Place PU resistor close to PU /J_ POWER GRPHIS.V RIL.V_VTT.V_VTT SENSE LINES S RIL R -.V RILS VREF MIS SVI LK lose to VR R./F_ VR_SVI_LK SVI T lose to VR R /F_ G_SENSE VSSXG_SENSE SM_VREF VQ VQ VQ VQ VQ VQ VQ VQ VQ VQ VQ VQ VQ VQ VQ VS VS VS VS VS VS VS VS VS_SENSE F_ VS_VI VR_SVI_T SVI LERT K K L F F F Y Y Y U U U P P P M M L J J J H H H H_F_ TP TP VR_REF_PU, VS_SEL MINON_V VR_REF_PU Note: VR_REF_PU should have mil trace width U/.V_ U/.V_ U/.V_ R R R U/.V_ U/.V_ U/.V_ K/J_ /J_ /J_ VUS_SENSE.V_SUS,, V_GFX PU MH SN W: uf/mohm x uf x U/.V_ *U/V_ U/.V_ MINON# U/.V_ V_XG_SENSE, VSS_XG_SENSE,.V_PU uf (Reserved) PU S SN W:. U/.V_ *U/.V_ uf/mohm x uf x JP POWER_JP Q O *P/V_ U/.V_ U/V/ESR_.V_PU R /J_ Q MNK-.V.U/V_.U/V_.U/V_.U/V_.V_SUS / add for Intel. Placement close to PU..V_VTT PU-P-rPG,,,,,,,, MINON Q NK R K/J_ H_PU_SVILRT# R /J_ R /J_ R /J_ VR_SVI_LERT# PROJET : KL Quanta omputer Inc. Size ocument Number Rev Sandy ridge / ate: Sheet of Saturday, July,
UH T VSS T VSS T VSS T VSS T VSS T VSS T VSS T VSS T VSS T VSS T VSS T VSS T VSS R VSS R VSS R VSS R VSS R VSS R VSS R VSS R VSS R VSS P VSS P VSS P VSS P VSS P VSS P VSS P VSS P VSS P VSS P VSS P VSS P VSS N VSS N VSS N VSS N VSS N VSS N VSS N VSS N VSS N VSS N VSS M VSS M VSS M VSS M VSS M VSS M VSS M VSS M VSS M VSS M VSS M VSS M VSS L VSS L VSS L VSS L VSS L VSS L VSS L VSS L VSS L VSS L VSS L VSS L VSS K VSS K VSS K VSS K VSS K VSS K VSS K VSS K VSS K VSS K VSS K VSS J VSS Sandy ridge Processor (GN) VSS UI VSS J VSS J VSS J T VSS VSS J T VSS VSS J T VSS VSS J T VSS VSS J T VSS VSS J T VSS VSS J T VSS VSS J T VSS VSS H T VSS VSS H T VSS VSS H P VSS VSS H P VSS VSS H P VSS VSS H P VSS VSS H P VSS VSS H P VSS VSS H N VSS VSS H N VSS VSS H N VSS VSS H N VSS VSS H N VSS VSS G N VSS VSS G N VSS VSS G N VSS VSS F N VSS VSS F N VSS VSS F M VSS VSS F L VSS VSS E L VSS VSS E L VSS VSS E L VSS VSS E L VSS VSS E L VSS VSS E L VSS VSS E L VSS VSS E L VSS VSS E L VSS VSS E L VSS VSS E K VSS VSS K VSS VSS K VSS VSS K VSS VSS J VSS VSS J VSS VSS H VSS VSS H VSS VSS H VSS VSS H VSS VSS H VSS VSS H VSS VSS H VSS VSS H VSS VSS H VSS VSS H VSS VSS H VSS VSS H VSS VSS Y H VSS VSS Y H VSS VSS Y H VSS VSS Y H VSS VSS Y H VSS VSS Y H VSS VSS W G VSS VSS W G VSS VSS W G VSS VSS W G VSS VSS W G VSS VSS W G VSS VSS W G VSS VSS W G VSS VSS W F VSS VSS W F VSS VSS U F VSS VSS U VSS U VSS U VSS U VSS U VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS F F E E E E E E E E E E E E E E E E E SMR_VREF_Q_M SMR_VREF_Q_M TP TP TP FG FG FG FG FG FG SMR_VREF_Q_M SMR_VREF_Q_M Sandy ridge Processor (RESERVE, FG) R *K/J_ / dd for Pre-ES TP R *K/J_ UE K FG[] K FG[] L FG[] L FG[] K FG[] L FG[] L FG[] M FG[] M FG[] M FG[] M FG[] M FG[] N FG[] N FG[] N FG[] M FG[] K FG[] N FG[] J G_VL_SENSE H VSSXG_VL_SENSE J V_VL_SENSE H VSS_VL_SENSE J RSV RSV F RSV F RSV F RSV RSV G RSV G RSV E RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV J RSV RSV VIO_SEL J RSV RSV PU-P-rPG RESERVE RSV L RSV G RSV E RSV K RSV W RSV T RSV M RSV J RSV T RSV J RSV H RSV G RSV R RSV T RSV T RSV P RSV R RSV RSV RSV RSV RSV RSV J RSV K V_IE_SENSE RSV T RSV T RSV R KEY H RSV N TP RSV M TP Reserved for Intel ebug For rpg socket, RSV pin should be left N PU-P-rPG PU-P-rPG Processor Strapping FG (PEG Static Lane Reversal) The FG signals have a default value of '' if not terminated on the board. Normal Operation Lane Reversed FG FG FG R R R K/F_ *K/F_ *K/F_ FG FG R R *K/F_ *K/F_ FG[:] (PIE Port ifurcation Straps) : (efault) x - evice functions and disabled : x, x - evice function enabled ; function disabled : Reserved - (evice function disabled ; function enabled) : x,x,x - evice functions and enabled FG (P Presence Strap) FG (PEG efer Training) isable; No physical P attached to ep PEG train immediately following xxreset de assertion Enable; n ext P device is connected to ep PEG wait for IOS training PROJET : KL Quanta omputer Inc. Size ocument Number Rev Sandy ridge / ate: Saturday, July, Sheet of
ougar Point (LVS,I) SUS_PWR_K_R SUSK# E_PWROK_R MI_OMP MI_RIS SUSK#_R XP_RST# PIE_WKE# XP_RST# K SYS_RESET# WKE# PIE_WKE#, SYS_PWROK PM_RM_PWRG E_PWROK RSMRST# SUS_PWR_K SIO_PWRTN#.V_VTT MI_RXN MI_RXN MI_RXN MI_RXN MI_RXP MI_RXP MI_RXP MI_RXP MI_TXN MI_TXN MI_TXN MI_TXN MI_TXP MI_TXP MI_TXP MI_TXP R R R R R R R R R./F_ /F_ /J_ */J_ /J_ */J_ /J_ /J_ SYS_PWROK_R E_PWROK_R PWROK_R PM_RM_PWRG RSMRST# /J_SUS_PWR_K_R ougar Point (MI,FI,PM) U E G G E J J W W V Y Y Y U J G H P L L K E MIRXN MIRXN MIRXN MIRXN MIRXP MIRXP MIRXP MIRXP MITXN MITXN MITXN MITXN MITXP MITXP MITXP MITXP MI_ZOMP MI_IROMP MIRIS SUSK# SYS_PWROK PWROK PWROK RMPWROK RSMRST# V V_S V_S V_S SUSWRN#/SUSPWRNK/GPIO V_S SLP_S# PWRTN# MI System Power Management FI FI_RXN FI_RXN FI_RXN FI_RXN FI_RXN FI_RXN FI_RXN FI_RXN FI_RXP FI_RXP FI_RXP FI_RXP FI_RXP FI_RXP FI_RXP FI_RXP FI_INT FI_FSYN FI_FSYN FI_LSYN FI_LSYN SWVRMEN PWROK LKRUN# / GPIO SUS_STT# / GPIO SUSLK / GPIO SLP_S# / GPIO SLP_S# SLP_# J Y E H J G G G F G E G J H W V V E N G N H F G SWVREN R LKRUN# R /J_ PH_SUSLK SLP_S# R /J_ T PWROK * /J_ T T FI_TXN FI_TXN FI_TXN FI_TXN FI_TXN FI_TXN FI_TXN FI_TXN FI_TXP FI_TXP FI_TXP FI_TXP FI_TXP FI_TXP FI_TXP FI_TXP FI_INT FI_FSYN FI_FSYN FI_LSYN FI_LSYN RSMRST# LKRUN#, LP_P# PM_SLP_S# SIO_SLP_S# SLP_# INT_RT_HSYN INT_RT_VSYN INT_LVS_LON INT_LVS_VEN INT_EILK INT_EIT INT_TXLLKOUTN INT_TXLLKOUTP R R R V INT_TXLOUTN INT_TXLOUTN INT_TXLOUTN INT_TXLOUTP INT_TXLOUTP INT_TXLOUTP INT_RT_LU INT_RT_GRE INT_RT_RE INT_LK INT_T /J_ /J_ T ohm for SW; ohm for UM R R.K/F_ INT_EILK INT_EIT T LV_IG INT_TXLLKOUTN INT_TXLLKOUTP INT_TXLOUTN INT_TXLOUTN INT_TXLOUTN INT_TXLOUTP INT_TXLOUTP INT_TXLOUTP INT_RT_LU INT_RT_GRE INT_RT_RE INT_RT_HSYN_R INT_RT_VSYN_R _IREF R K/F_.K/J_.K/J_ J M P T K T P F F E E K K N M K J N M K J F F H H F F H H F F N P T T M M M T T U L_KLTEN L_V_EN L_KLTTL L LK L T L_TRL_LK L_TRL_T LV_IG LV_VG LV_VREFH LV_VREFL LVS_LK# LVS_LK LVS_T# LVS_T# LVS_T# LVS_T# LVS_T LVS_T LVS_T LVS_T LVS_LK# LVS_LK LVS_T# LVS_T# LVS_T# LVS_T# LVS_T LVS_T LVS_T LVS_T RT_LUE RT_GREEN RT_RE RT LK RT T RT_HSYN RT_VSYN _IREF RT_IRTN ougarpoint_rp LVS RT igital isplay Interface SVO_TVLKINN SVO_TVLKINP SVO_STLLN SVO_STLLP SVO_INTN SVO_INTP SVO_TRLLK SVO_TRLT P_UXN P_UXP P_HP P_N P_P P_N P_P P_N P_P P_N P_P P_TRLLK P_TRLT P_UXN P_UXP P_HP P_N P_P P_N P_P P_N P_P P_N P_P P_TRLLK P_TRLT P_UXN P_UXP P_HP P_N P_P P_N P_P P_N P_P P_N P_P P P M M P P P M T T T V V V V U U V V P P P P T Y Y Y Y M M T T H F E F E J G INT_HMI_HP_Q P_HP_PU P_HP_PU V INT_HMI_SL INT_HMI_S INT_HMI_TXN INT_HMI_TXP INT_HMI_TXN INT_HMI_TXP INT_HMI_TXN INT_HMI_TXP INT_HMI_TXN INT_HMI_TXP INT. HMI INT. P _PRESENT R /J PRESENT_R PM_TLOW# PM_RI# H E PRESENT / GPIO SW TLOW# / GPIO V_S RI# V_S SLP_SUS# PMSYNH SLP_LN# / GPIO G P K SLP_LN# T SLP_SUS# PM_SYN R R R place close to PH /F_ /F_ INT_RT_LU INT_RT_GRE INT_HMI_HP_Q R *K/J_ Q NK INT_HMI_HP R K/J_ ougarpoint_rp R /F_ INT_RT_RE PH Pull-high/low(LG) V V_S LKRUN# R.K/J_ PM_RI# R K/J_ XP_RST# R *K/J_ PM_TLOW# R.K/J_ R *K/J_ PIE_WKE# R K/J_ RSMRST# R K/J_ SLP_LN# R *K/J_ SYS_PWROK R K/J_ SUS_PWR_K R K/J PRESENT R K/J_ PM_RM_PWRG R /F_ / hange topology; ohm PU to V_S System PWR_OK(LG) U SYS_PWROK SYS_PWROK TSH V_S *.U/V_ IMVP_PWRG E_PWROK R K/J_ V_RT R K/J_ SWVREN R *K/J_ On ie SW VR Enable High = Enable (efault) Low = isable PWROK FOR SW VPU VPU V_SW R K_ V_S *RV- VPU RV- Q PTEU R K_ Q N PWROK.U/V_ add cap to timing tune V P_HP_PU R K/J_ P_HP_PU R K/J_ Follow PG ep disable guide PROJET : KL Quanta omputer Inc. Size ocument Number Rev ougar Point / ate: Sheet of Saturday, July,
RT ircuitry(rt) mils V_SW R /J_ V_RT R */J_ V_RT_ VPU R K/J_ V_RT_ MIL T U/.V_ mils R K/J_ R K/J_ U/.V_ U/.V_ V_RT_ MIL T RT TTERY H us(lg) To Separate odec Sync by P Z_ITLK R /J_ Z_ITLK_R Z_SYN R /J_ Z_SYN_OE Z_RST# R /J_ Z_RST#_R Z_SYN_OE Z_SOUT R /J_ Z_SOUT_R Q PH JTG ebug (LG) V_S RT_RST# J *SHORT_ P SRT_RST# J *SHORT_ P V Z_SYN_R N PH(LG) P/V_ P/V_.KHZ Y R M/J_ V_RT R M/J_ SPKR Z_SIN RT_X RT_X RT_RST# SRT_RST# SM_INTRUER# PH_INVRMEN Z_ITLK_R Z_SYN_R SPKR Z_RST#_R TP Z_SOUT_R TP TP PH_JTG_TK_R PH_JTG_TMS_R PH_JTG_TI_R PH_JTG_TO_R ougar Point (H,JTG,ST) G K N L T K E G N J H K H U RTX RTX RTRST# SRTRST# INTRUER# INTVRMEN H_LK H_SYN SPKR H_RST# H_SIN H_SIN H_SIN H_SIN H_SO RT IH H_OK_EN# / GPIO H_OK_RST# / GPIO JTG_TK JTG_TMS JTG_TI JTG_TO JTG ST LP ST G V V V_S FWH / L FWH / L FWH / L FWH / L FWH / LFRME# LRQ# LRQ# / GPIO SERIRQ STRXN STRXP STTXN STTXP STRXN STRXP STTXN STTXP STRXN STRXP STTXN STTXP STRXN STRXP STTXN STTXP STRXN STRXP STTXN STTXP STRXN STRXP STTXN STTXP STIOMPO STIOMPI STROMPO E K V M M P P M M P P H H F F Y Y Y Y Y Y L_K_OFF ST_TXN_ ST_TXP_ ST_TXN_ ST_TXP_ ST_TXN_ ST_TXP_ ST_TXN_ ST_TXP_ ST_OMP LP_L, LP_L, LP_L, LP_L, LP_LFRME#, LP_RQ# L_K_OFF# IRQ_SERIRQ,.U/V_.U/V_.U/V_.U/V_ Remove ST port / R.U/V_.U/V_.U/V_.U/V_./F_.V_VTT ST_RXN ST_RXP ST_TXN ST_TXP ST_RXN ST_RXP ST_TXN ST_TXP ST_RXN ST_RXP ST_TXN ST_TXP ST_RXN ST_RXP ST_TXN ST_TXP IRQ_SERIRQ O_PRSNT# L_K_OFF# ST_T# ST SS ST H ST O EST # R R R R V.K/J_ *K/J_ K_ K_ R /F_ R /F_ R /F_ STOMPI ST_OMP R./F_ R /F_ R /F_ PH_JTG_TMS_R PH_JTG_TI_R PH_JTG_TO_R PH_JTG_TK_R R R /F_ /J_ PH Strap Table PH_SPI_LK PH_SPI_S# VPU R *K/J_ PH_SPI_SI PH_SPI_SO PH_SPI_LK PH_SPI_S# PH_SPI_S# PH_SPI_SI PH_SPI_SO T SPI_LK Y SPI_S# T SPI_S# V SPI_MOSI U SPI_MISO ougarpoint_rp SPI V V STRIS STLE# STGP / GPIO STGP / GPIO H P V P ST_RIS S_IT R /F_ ST_T# O_PRSNT# PH ual SPI (LG) PH_SPI_S# PH_SPI_LK R /J_ PH_SPI_SI R /J_ PH_SPI_SO R /J_ MXLMI-G: KEFPZ WXVSSIG: KEZPN Socket: G V U PH_SPI_LK_R E# V PH_SPI_SI_R SK PH_SPI_SO_R SI R.K/J_ SO HOL# WP# VSS *P/V_ SPI Flash Socket.U/V_ Pin Name Strap description Sampled onfiguration = efault (weak pull-down K) SPKR No reboot mode setting PWROK = Setting to No-Reboot mode GNT# / GPIO GNT# / GPIO GPIO Top-lock Swap Override oot IOS Selection [bit-] oot IOS Selection [bit-] PWROK PWROK PWROK = "top-block swap" mode = efault (weak pull-up K) INTVRMEN Integrated.V VRM enable LWYS Should be always pull-up GNT# GNT# oot Location SPI LP * V V_RT R R R SPKR PI_GNT# PH_INVRMEN efault weak pull-up on GNT/# [Need external pull-down for LP IOS] R R *K/J_ *K/J_ K/J_ *K/J_ *K/J_ S_IT S_IT V R.K/J_ H_SO Flash escriptor Security RSMRST = Override = efault (weak pull-up K) V_S R *K/J_ Z_SOUT_R F_TVS GPIO MI/FI Termination voltage On-die PLL Voltage Regulator PWROK RSMRST# = Set to Vss = Set to Vcc (weak pull-down K) = isable = Enable (efault) R R R *K/J_.K/J_.K/J_.V PLL_OVR_EN, F_TVS H_SN_IV# H_SYN On-ie PLL VR Voltage Select RSMRST = Support by.v (weak pull-down) = Support by.v V_S R K/J_ Z_SYN_R GPIO Integrated lock hip Enable RSMRST# Should be pull-down (weak pull-up K) SPI_MOSI itpm function isable PWROK = efault (weak pull-down K) = Enable V R *K/J_ PH_SPI_SI NV_LE Intel nti-theft H protection PWROK = isable (Internal pull-down kohm) PROJET : KL Quanta omputer Inc. Size ocument Number Rev ougar Point / ate: Sheet of Saturday, July,
ougar Point-M (PI,US,NVRM) ougar Point-M (PI-E,SMUS,LK) U, LK_LP_EUG LK_PI_ O_M# LK_PI_F S_IT T_IS PI_GNT# R Rev. SIO_EXT_WKE# TP TP R R R *_ /J_ /J_ /J_ PI_PIRQ# PI_PIRQ# PI_PIRQ# PI_PIRQ# GPU_HOL_RST# dgpu_selet# GPU_PWR_EN# S_IT T_IS PI_GNT# MP_PWR_TRL# O_M#_PH EXTTS_SNI_RV_PH EXTTS_SNI_RV_PH PI_PLTRST# SIO_EXT_WKE# LK_PI_F_R LK_PI_LP_R LK_PI_E_R G J H J G H H K K N H H M M Y K L M Y G E E J E F G V U Y U Y V W K K H G E E F G G K H H J K H UE TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP PIRQ# PIRQ# PIRQ# PIRQ# REQ# / GPIO REQ# / GPIO REQ# / GPIO GNT# / GPIO GNT# / GPIO GNT# / GPIO PIRQE# / GPIO PIRQF# / GPIO PIRQG# / GPIO PIRQH# / GPIO PME# PLTRST# LKOUT_PI LKOUT_PI LKOUT_PI LKOUT_PI LKOUT_PI ougarpoint_rp RSV PI V V V V V V V V V V US V_S V_S V_S V_S V_S V_S V_S V_S RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV USPN USPP USPN USPP USPN USPP USPN USPP USPN USPP USPN USPP USPN USPP USPN USPP USPN USPP USPN USPP USPN USPP USPN USPP USPN USPP USPN USPP USRIS# USRIS O# / GPIO O# / GPIO O# / GPIO O# / GPIO O# / GPIO O# / GPIO O# / GPIO O# / GPIO Y V U G T U T T T Y T V V E F V V T Y T F K H E N M L K G E L K G E K L NV_LE USP- USP USP- USP USP- USP USP- USP USP- USP USP- USP USP- USP USP- USP US_IS US_O# US_O# US_O# US_O# US_O# US_O# US_O# US_O# R TP TP TP USP- USP USP- USP USP- USP USP- USP USP- USP USP- USP USP- USP USP- USP./F_ US_O# US_O# US_O# luetooth US/eST ombo # on LVS WLN WWN US # US # US # EHI EHI PIE_RXN PIE_RXP WLN PIE_TXN PIE_TXP PIE_RXN_LN PIE_RXP_LN LN PIE_TXN_LN PIE_TXP_LN PIE_RXN_R PIE_RXP_R ard Reader PIE_TXN_R PIE_TXP_R TP TP TP TP TP TP TP TP TP TP TP TP.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_ PIELKRQ# PIELKRQ# PIELKRQ# PIE_TXN_ PIE_TXP_ PIE_TXN_ PIE_TXP_ LKOUT_PIEN LKOUT_PIEP LKOUT_PIEN LKOUT_PIEP PIELKRQ# LKOUT_PIEN LKOUT_PIEP PIELKRQ# LKOUT_PIEN LKOUT_PIEP LKOUT_PIEN LKOUT_PIEP PIELKRQ# LKOUT_PIEN LKOUT_PIEP LKOUT_PEGN LKOUT_PEGP PIELKRQ_PEG# LKOUT_PIEN LKOUT_PIEP PIELKRQ# LKOUT_PIEN LKOUT_PIEP PIELKRQ# PIE_TXN_LN_ PIE_TXP_LN_ LK_PH_ITPN_R LK_PH_ITPP_R G J V U E F Y G J V U F E Y G H Y J G U V G J Y E W Y Y Y J M V Y Y Y Y L V V L E V V T V V K K K PERN PERP PETN PETP PERN PERP PETN PETP PERN PERP PETN PETP PERN PERP PETN PETP PERN PERP PETN PETP PERN PERP PETN PETP PERN PERP PETN PETP PERN PERP PETN PETP LKOUT_PIEN LKOUT_PIEP LKOUT_PIEN LKOUT_PIEP LKOUT_PIEN LKOUT_PIEP LKOUT_PIEN LKOUT_PIEP LKOUT_PIEN LKOUT_PIEP LKOUT_PIEN LKOUT_PIEP PI-E* PIELKRQ# / GPIO PIELKRQ# / GPIO PIELKRQ# / GPIO PIELKRQ# / GPIO PIELKRQ# / GPIO PIELKRQ# / GPIO LKOUT_PEG N LKOUT_PEG P PEG LKRQ# / GPIO LKOUT_PIEN LKOUT_PIEP PIELKRQ# / GPIO LKOUT_PIEN LKOUT_PIEP PIELKRQ# / GPIO LKOUT_ITPXP_N LKOUT_ITPXP_P V_S V_S V V LOKS SMUS ontroller V_S V_S V_S V_S V_S V_S V_S V_S V_S SMLLERT# / PHHOT# / GPIO V_S SMLLK / GPIO V_S SMLT / GPIO Link V FLEX LOKS V V V SMLERT# / GPIO SMLK SMT SMLLERT# / GPIO SMLLK SMLT L_LK L_T L_RST# PEG LKRQ# / GPIO LKOUT_PEG N LKOUT_PEG P LKOUT_MI_N LKOUT_MI_P LKOUT_P_N LKOUT_P_P LKIN_MI_N LKIN_MI_P LKIN_GN_N LKIN_GN_P LKIN_OT_N LKIN_OT_P LKIN_ST_N LKIN_ST_P REFLKIN LKIN_PILOOPK XTL_IN XTL_OUT XLK_ROMP LKOUTFLEX / GPIO LKOUTFLEX / GPIO LKOUTFLEX / GPIO LKOUTFLEX / GPIO E H G E M M T P M V U M M F E J G G E K K K H V V Y K F H K SMLERT# SM_PH_LK SM_PH_T RMRST_NTRL_PH SM_ME_LK SM_ME_T SMLLERT#_R SM_ME_LK SM_ME_T L_LK L_T L_RST# PEG_LKREQ# LKOUT_PEG N LKOUT_PEG P LK_UF_PIE_GPLLN LK_UF_PIE_GPLLP LK_UF_LKN LK_UF_LKP LK_UF_REFLKN LK_UF_REFLKP LK_UF_REFSSLKN LK_UF_REFSSLKP LK_PH_M LK_PI_F XTL_IN XTL_OUT XLK_ROMP LK_FLEX R GPIO_PTH_TP TP TP TP SM_PH_LK SM_PH_T RMRST_NTRL_PH For E.V_VTT LK_PU_LKN LK_PU_LKP Mz support IS only R./F_ */J_ LK_PLL_SSLKN LK_PLL_SSLKP TP TP TP TP TP TP TP TP IS_ULE_LE# LK_M_VG RF_ON# R M/J_ Y MHz P/V_ P/V_ ougarpoint_rp GPU Power ON V GPIO_PTH_TP R.K/J_ R V *_ V PEG LK detect GPU_PWR_EN# R GPIO_PTH_TP *_ GPIO_PTH_TP, GFXON U MINON,,,,,,,, R K_ PEG_LKREQ# Q GPIO_PTH_TP TSHFU(F) Q MENE GPU_PWR_EN# SW: Stuff UM: Non-Stuff MENE Q GFXPG, MENE PLTRST#(LG) PI_PLTRST# GPU RST#(LG) V_S.U/V_ PLTRST# U TSHFU R K/J_ R *_ PLTRST# PLTRST#,,, V PI/USO# Pull-up(LG) V_S R US_O# US_O# US_O# US_O# US_O# US_O# US_O# US_O# KX V R EXTTS_SNI_RV_PH MP_PWR_TRL# EXTTS_SNI_RV_PH T_IS GPU_HOL_RST# GPU_PWR_EN# dgpu_selet# O_M# KX V WLN LK_PIE_WLNN LK_PIE_WLNP PIE_LKREQ_WLN# LN LK_PIE_LNN LK_PIE_LNP PIE_LKREQ_LN# ard Reader LK_PIE_N LK_PIE_P LK_PIE_N LK_PIE_P PIE_LKREQ_# R R _ R SW@X R _ R R R _ SW@X SW@X *SW@X LKOUT_PIEN LKOUT_PIEP PIELKRQ# LKOUT_PIEN LKOUT_PIEP PIELKRQ# LKOUT_PIEN LKOUT_PIEP LKOUT_PIEN LKOUT_PIEP PIELKRQ# SW:Rb UM:Ra LK_REQ/Strap Pin(LG) V V_S R R R R R R R R R R Ra K/J_ K/J_ K/J_ K/J_ K/J_ K/J_ K/J_ K/J_ K/J_ PEG_LKREQ# *K/J_ PIE_LKREQ_# PIELKRQ# PIE_LKREQ_LN# PIELKRQ# PIELKRQ# PIELKRQ# PIELKRQ# PIELKRQ_PEG# PIE_LKREQ_WLN# PEG_LKREQ# R Rb K/J_ SMus/Pull-up(LG),,, M_LK V_S Q NK V_S R.K/J_ SM_ME_LK R.K/J_ PLTRST# GPU_HOL_RST# R K/J_ U *TSHFU PLTRST#.U/V_ R _ GPU_RST# GPU_RST# PI_PIRQ# PI_PIRQ# PI_PIRQ# PI_PIRQ# R R R R.K/J_.K/J_.K/J_.K/J_ LK_PIE_VGN LKOUT_PEG N LK_PIE_VGP LKOUT_PEG P R SW@X SW:Stuff UM:Non-stuff MP Switch ontrol Low = MP ON MP_PWR_TRL# High = MP OFF (efault) MP_PWR_TRL# R *K/J_ LK_UF_LKN R K/J_ LK_UF_LKP R K/J_ LK_UF_PIE_GPLLN R K/J_ LK_UF_PIE_GPLLP R K/J_ LK_UF_REFLKN R K/J_ LK_UF_REFLKP R K/J_ LK_UF_REFSSLKN R K/J_ LK_UF_REFSSLKP R K/J_ LK_PH_M R K/J_ LOK TERMINTION for FIM,,, M_T V_S R K/J_ RMRST_NTRL_PH R K/J_ SMLERT# R.K/J_ SM_PH_LK R.K/J_ SM_PH_T R.K/J_ SM_ME_LK R.K/J_ SM_ME_T R K/J_ SMLLERT#_R SM_ME_T Q NK PROJET : KL Quanta omputer Inc. Size ocument Number Rev ougar Point / ate: Saturday, July, Sheet of
E_EXT_SMI# E_EXT_SI# LN_ISLE# GFXPG_R WWN_OFF#, PLL_OVR_EN T_ON# S SS, TEMP_LERT# S_GPIO E_EXT_SMI# OR_I E_EXT_SI# OR_I R _ SYSTEM_I LN_ISLE# HOST_LERT#_R ougar Point (GPIO,VSS_NTF,RSV) UF TH / GPIO V IOS_RE T SLOK / GPIO V R /J_ WWN_OFF#_R E GPIO / MEM_LE V_S GPIO E GPIO SW R /J_ PLL_OVR_EN_R P GPIO V_S STP_PI# K STP_PI# / GPIO V T_ON# K GPIO V S SS V STGP / GPIO V FI_OVRVLTG M STGP / GPIO V MFG_MOE N SLO / GPIO V GPU_PRSNT# M STOUT / GPIO V TEST_SET_UP V STOUT / GPIO V V STGP / GPIO V SV_ET GPIO V_S T MUSY# / GPIO V V TH / GPIO TH / GPIO V V TH / GPIO R.K/F_ H TH / GPIO V V TH / GPIO E TH / GPIO V V TH / GPIO OR_I GPIO V_S LN_PHY_PWR_TRL / GPIO V_S G GPIO V_S GTE P U STGP / GPIO V VSS_NTF_ GPIO PU/MIS PEI RIN# PROPWRG THRMTRIP# INIT_V# F_TVS TS_VSS TS_VSS TS_VSS TS_VSS N_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ U P Y Y T Y H K H K P G G H H J E_RIN# PH_THRMTRIP# TP R /J_ / onnected to GN G rev. SS_ETET# ST_O_PWR_EN E_GTE E_RIN# H_PWRGOO PM_THRMTRIP# F_TVS Model Reserve OR_I OR_I UM Muxless iscrete Reserve Reserve OR_I R R R R LN_ISLE# WWN_OFF#_R E_EXT_SMI# E_EXT_SI# SS_ETET# STP_PI# E_GTE E_RIN# TEMP_LERT# T_ON# ST_O_PWR_EN GPIO GFXPG_R GPIO Pull-up/Pull-down(LG) K/J_ *K/J_ K/J_ OR_I OR_I OR_I R R R R R R R R R R R R R R R R K/J_ SYSTEM_I R K/J_ K/J_ K/J_ K/J_ K/J_ K/J_ K/J_ K/J_ K/J_ K/J_ K/J_ K/J_ K/J_ *K/J_ K/J_ *K/J_ *K/J_ V_S V V VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ J J Reserve R *_ V GFXPG_R U TSHFU(F) HWPG,,,,, GFXPG, E E F F VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ ougarpoint_rp SGPIO S_GPIO V V V NTF VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ J J J E E F F R R K/J_ */J_ V TEST_SET_UP HOST_LERT#_R R Low = isable (efault) High = Enable SV_SET_UP High = Strong (efault) R R K/J_ */J_ K/J_ V_S Intel ME rypto Transport Layer Security (TLS) cipher suite V V R V R *K/J_ Stuff No Stuff SV_ET SWITHLE R R R *K/J_ GPU_PRSNT# R UM R R K/J_ K/J_ R FI TERMINTION VOLTGE OVERRIE K/J_ FI_OVRVLTG R *K/F_ S SS R K/F_ IOS_RE LOW - Tx, Rx terminated to same voltage MI TERMINTION VOLTGE OVERRIE Low = Tx, Rx terminated to same voltage ( oupling Mode) (EFULT) R R IOS REOVERY K/J_ */J_ High = isable (efault) Low = Enable MFG-TEST MFG_MOE R R V K/J_ */J_ PROJET : KL Quanta omputer Inc. Size ocument Number Rev ougar Point / ate: Saturday, July, Sheet of
PH(LG).V_VTT R.V_VTT R.V_VTT L.V_VTT R.V_PH_V VccORE =. (mils)./f_ U/.V_ U/.V_ U/.V_ U/.V_.V_PH_VPLL_EXP /J_.V_VPLL_EXP *uh/m_ *U/.V_.V_VIO VccIO =. (mils)./f_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ V V_V_EXP R /J_.U/V_ VFI_VRM VFI_VRM.V_VTT R */J_.V_VPLL_FI R /J_.V_VPLL_FI.V_VTT VFI_VRM F F G G G G G G J J J J J N J N N N N N P P P P T N N H P G P U OUGR POINT (POWER) UG VORE[] VORE[] VORE[] VORE[] VORE[] VORE[] VORE[] VORE[] VORE[] VORE[] VORE[] VORE[] VORE[] VORE[] VORE[] VORE[] VORE[] VIO[] VPLLEXP VIO[] VIO[] VIO[] VIO[] VIO[] VIO[] VIO[] VIO[] VIO[] VIO[] VIO[] VIO[] V_[] VVRM[] VccFIPLL VIO[] VMI[] ougarpoint_rp POWER V ORE VIO FI RT LVS FT / SPI MI HVMOS V VSS VLVS VSSLVS VTX_LVS[] VTX_LVS[] VTX_LVS[] VTX_LVS[] V_[] V_[] VVRM[] VMI[] VLKMI VFTERM[] VFTERM[] VFTERM[] VFTERM[] VSPI U U K K M M P P V V T T G G J J V R */J_ VFI_VRM V Vcc =m(mils) L VLVS V VccLVS=m(mils) R SW@/J_ V_TX_LVS VccTX_LVS=m(mils) L V_V_GIO U/.V_.U/V_ R.U/V_ VP_NN V_VME_SPI.U/V_ /J_ V VFI_VRM.V_V_MI_I *U/.V_ R.U/V_ R U/.V_.U/V_ L /J_ /J_.V V.U/V_ U/.V_ R Ra Rb.V_V_MI V_MI_I Ra Rb VSPI = m(mils) *IS@/J_ IS SW ohm N ohm N VMI = m(mils) *uh_ U/.V_ R R U/.V_ SW@.uH_ /J_.V_VTT.V_VTT VPNN = m(mils) V.V VLKMI = m(mils) R R ohm/ *IS@/J_ */F_ /J_.V_VTT R */J_ VLK V_S R */J_ VSW_= m V_SW R /J_ VPSW PH_VSW.U/V_ V_SUS_LKF.V_VTT VPLL_PY_PH.U/V_ L *uh/m_.v_vtt R /J_ VPLL_PY *U/.V_ VSUS ougar Point-M (POWER) UJ VLK T VSW_ POWER V R /J_ PSUSYP VIO[] T T V_[] H VPLLMI L VIO[] L PSUS[] VME(.V) =??(??mils) *U/.V_ VSW[].V_VTT.V_VEPW VSW[] VccSW =. (mils) R./F_ VSW[] VSW[] U/.V_ U/.V_ U/.V_ VSW[] VSW[] VSW[] VSW[] U/.V_ U/.V_ VSW[] VSW[] VSW[] VSW[] VSW[] W VSW[] W VSW[] W VSW[] W VSW[] W VSW[].V_VTT W VSW[] R /J_ W VSW[].U/V_ VRTEXT N U/.V_ PRT VFI_VRM VFI_VRM Y R /J_ VVRM[] m(mils).v_v PL U/.V_ VPLL m(mils).v_v PL F VPLL R /J_ VIFFLK F VIFFLKN VIO[] F VIFFLKN[] F U/.V_ VIFFLKN[] VIFFLKN= m(mils) G.V_VTT VIFFLKN[] VSS= m(mils) R */J_ V.V_SSV G VSS lock and Miscellaneous ST PI/GPIO/LP US.V_VUSORE.V_VTT R /J_ VIO[] N VSUS_ = m(mils) VIO[] P U/.V_ V_S VIO[] P VIO[] T.U/V_ V_VPUS VSUS_[] T VSUS_[] T R /J_ VSUS_[] V VSUS_[] V.U/V_ P V_VUG VSUS_[] VUPLL R /J_ VIO[] T.V_VTT VREFSUS=m V_PH_VREFSUS VREF_SUS M R /F_ V_S RV- V_S V_USSUS PSUS[] N.U/V_ V_VPSUS VSUS_[] N *U/.V_ VREF= m V_PH_VREF R /F_ VREF P V RV- V VSUS_[] N U/.V_ VSUS_[] N V_VPSUS R /J_ VSUS_[] P V_S VSUS_ = m(mils) VSUS_[] P U/V_ V_[] V_VPORE R /J_ V_[] W V V VPORE = m(mils) V_[] T.U/V_.U/V_ J V_[] V VIO[] F.U/V_ V.S_ST R /J_ VIO[] H.V_VTT VIO[] H U/V_ VIO[] F??m(??mils) V.LN_VPLL L *uh/m_ VPLLST.V_VTT VVRM= K m(mils) VFI_VRM *U/.V_ VVRM[] F.V_VIO R /J_ VIO[].V_VTT VIO[] U/.V_ VIO[].V R /J_ VVRM:.V (estop) / del for Pre-ES.V (Mobile) *U/.V_.U/V_ VSST V PSST.V_VEPW VME =.(mils).v_vtt R */J_.V_VTT m(mils) R VRT<m(mils) V_RT /J_.U/.V_.U/V_.U/V_ V.M_VSUS VTT_VPPU T PSUS[] V PSUS[] J V_PRO_IO PU MIS VSW[] T VSW[] V VSW[] T R */J_.V_SUS U/.V_.U/V_.U/V_ VRT ougarpoint_rp RT H VSUSH P V._._H_IO R *U/.V_.U/V_ /J_ V_S VSUSH= m(mils).v_vtt L uh/m.v_v PL V U/.V_ U/.V_ R R */J_ /F_ V_SUS_LKF_R L uh/m_ V_SUS_LKF L uh/m.v_v PL U/.V_ U/V_ U/.V_ U/.V_ PROJET : KL Quanta omputer Inc. Size ocument Number Rev ougar Point / ate: Saturday, July, Sheet of
Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET : KL ougar Point / Saturday, July, Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET : KL ougar Point / Saturday, July, Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET : KL ougar Point / Saturday, July, IEX PEK-M (GN) PH(LG) UH ougarpoint_rp UH ougarpoint_rp VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] F VSS[] F VSS[] VSS[] F VSS[] F VSS[] F VSS[] F VSS[] F VSS[] F VSS[] F VSS[] F VSS[] F VSS[] F VSS[] F VSS[] F VSS[] F VSS[] G VSS[] G VSS[] G VSS[] G VSS[] H VSS[] H VSS[] H VSS[] H VSS[] H VSS[] H VSS[] H VSS[] H VSS[] J VSS[] J VSS[] J VSS[] K VSS[] K VSS[] K VSS[] K VSS[] K VSS[] K VSS[] K VSS[] L VSS[] L VSS[] L VSS[] L VSS[] L VSS[] L VSS[] L VSS[] L VSS[] L VSS[] L VSS[] M VSS[] M VSS[] M VSS[] M VSS[] M VSS[] M VSS[] M VSS[] N VSS[] N VSS[] N VSS[] N VSS[] P VSS[] P VSS[] P VSS[] P VSS[] P VSS[] P VSS[] P VSS[] P VSS[] P VSS[] R VSS[] R VSS[] T VSS[] T VSS[] T VSS[] T VSS[] T VSS[] T VSS[] T VSS[] T VSS[] T VSS[] T VSS[] T VSS[] U VSS[] U VSS[] V VSS[] V VSS[] V VSS[] V VSS[] V VSS[] V VSS[] V VSS[] V VSS[] W VSS[] W VSS[] W VSS[] W VSS[] W VSS[] W VSS[] W VSS[] W VSS[] W VSS[] W VSS[] W VSS[] V VSS[] Y VSS[] Y VSS[] Y VSS[] VSS[] E VSS[] VSS[] P VSS[] H VSS[] F VSS[] VSS[] VSS[] J VSS[] J VSS[] E VSS[] T VSS[] T VSS[] M VSS[] L VSS[] L UI ougarpoint_rp UI ougarpoint_rp VSS[] Y VSS[] Y VSS[] Y VSS[] Y VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] E VSS[] E VSS[] E VSS[] F VSS[] F VSS[] F VSS[] F VSS[] F VSS[] F VSS[] F VSS[] F VSS[] VSS[] F VSS[] F VSS[] F VSS[] F VSS[] G VSS[] G VSS[] G VSS[] G VSS[] G VSS[] H VSS[] H VSS[] H VSS[] H VSS[] H VSS[] H VSS[] H VSS[] H VSS[] H VSS[] H VSS[] H VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] K VSS[] L VSS[] L VSS[] L VSS[] L VSS[] L VSS[] L VSS[] L VSS[] M VSS[] P VSS[] M VSS[] M VSS[] M VSS[] M VSS[] M VSS[] M VSS[] M VSS[] M VSS[] M VSS[] M VSS[] M VSS[] N VSS[] P VSS[] P VSS[] P VSS[] T VSS[] P VSS[] P VSS[] P VSS[] P VSS[] R VSS[] R VSS[] T VSS[] T VSS[] T VSS[] T VSS[] W VSS[] T VSS[] T VSS[] T VSS[] V VSS[] V VSS[] V VSS[] V VSS[] V VSS[] V VSS[] V VSS[] V VSS[] V VSS[] V VSS[] W VSS[] W VSS[] VSS[] VSS[] VSS[] VSS[] E VSS[] E VSS[] G VSS[] G VSS[] G VSS[] G VSS[] G VSS[] G VSS[] H VSS[] H VSS[] W VSS[] W VSS[] W VSS[] Y VSS[] Y VSS[] Y VSS[] Y VSS[] Y VSS[] Y VSS[] G VSS[] N VSS[] J VSS[] N VSS[] H VSS[] H VSS[] H VSS[] H VSS[] H VSS[] H VSS[] F VSS[] K VSS[] K VSS[] H VSS[] K VSS[] K VSS[] VSS[] VSS[] E VSS[] G VSS[] G VSS[] H VSS[] T VSS[] G VSS[] G VSS[] VSS[] P VSS[] F VSS[] H VSS[] M VSS[] P VSS[] P VSS[] E VSS[] VSS[] G VSS[] J
M M M M M M M M M M M M M M M M M QSP M QSP M QSP M QSP M QSP M QSP M QSP M QSP M QSN M QSN M QSN M QSN M QSN M QSN M QSN M QSN M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q IMM_S IMM_S SMR_VREF_IMM PM_EXTTS# SMR_VREF_Q SMR_VREF_Q_M SMR_VREF_Q_M SMR_VREF_IMM SMR_VREF_Q_M M [:] M S# M S# M S# M S# M S# M LKP M LKN M LKP M LKN M KE M KE M S# M RS# M WE# M QSP[:] M QSN[:] M OT M OT M Q[:] SM_RUN_LK, SM_RUN_T, R_RMRST#, SMR_VREF_Q_M SMR_VREF,, SMR_VREF,,.V_SUS V.V_R_VTT V.V_SUS.V_SUS SMR_VREF_IMM V.V_SUS.V_R_VTT SMR_VREF_Q Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET : KL RIII SO-IMM- Saturday, July, Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET : KL RIII SO-IMM- Saturday, July, Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET : KL RIII SO-IMM- Saturday, July,. R_ST(R) VREF Q M Solution GMK GMK GMK ST H GMK ST H FOX LTK SUY MLX Standard H type:r---p VREF Q M Solution Place these aps near So-imm. / Remove ohm to GN U/V_ U/V_ R /J_ R /J_ R K/F_ R K/F_ *U/.V_ *U/.V_ U/.V_ U/.V_ R */J_ R */J_ U/.V_ U/.V_ P R SRM SO-IMM (P) JIM R-IMM_H=_ST_LTS P R SRM SO-IMM (P) JIM R-IMM_H=_ST_LTS V V V V V V V V V V V V V V V V V V VSP N N NTEST EVENT# RESET# VREF_Q VREF_ VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VTT VTT GN GN U/V_ U/V_ P/V_ P/V_ U/.V_ U/.V_.u/V_.u/V_ U/V_ U/V_ U/.V_ U/.V_.U/.V_.U/.V_ R K/J_ R K/J_.U/.V_.U/.V_ R */J_ R */J_ U/V_ U/V_.u/V_.u/V_ R K/F_ R K/F_ U/.V_ U/.V_ R K/J_ R K/J_ U/.V_ U/.V_.u/V_.u/V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ u/.v_ u/.v_ U/.V_ U/.V_ U/.V_ U/.V_ R K/J_ R K/J_ P R SRM SO-IMM (P) JIM R-IMM_H=_ST_LTS P R SRM SO-IMM (P) JIM R-IMM_H=_ST_LTS /P /# S# S# K K# K K# KE KE S# RS# WE# S S SL S OT OT M M M M M M M M QS QS QS QS QS QS QS QS QS# QS# QS# QS# QS# QS# QS# QS# Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q R K/J_ R K/J_ U/.V_ U/.V_.U/.V_.U/.V_ R K/J_ R K/J_ U/V_ U/V_ R */J_ R */J_.u/V_.u/V_ *U/.V_ *U/.V_
R_RVS(R) V R R JIM M Q[:] M [:] M M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M /P Q M Q M Q M Q M /# Q M Q M Q M Q M Q M Q Q M Q Q M Q M S# Q M Q M S# Q M Q M S# Q M Q M S# S# Q M Q M S# S# Q M Q M LKP K Q M Q M LKN K# Q M Q M LKP K Q M Q M LKN K# Q M Q M KE KE Q M Q M KE KE Q M Q M S# S# Q M Q M RS# RS# Q M Q M WE# K/J_ IMM_S WE# Q M Q IMM_S S Q K/J_ M Q S Q, SM_RUN_LK M Q SL Q, SM_RUN_T M Q S Q SMR_VREF_Q_M M Q Q M OT M Q OT Q M OT M Q OT Q M Q Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M QSP[:] M QSP Q M Q M QSP QS Q M Q M QSP QS Q M Q M QSP QS Q M Q M QSP QS Q M Q M QSP QS Q M Q M QSP QS Q M Q M QSP QS Q M Q M QSN[:] M QSN QS Q M Q M QSN QS# Q M Q M QSN QS# Q M Q M QSN QS# Q M Q M QSN QS# Q M Q M QSN QS# Q M Q M QSN QS# Q M Q M QSN QS# Q M Q QS# Q / Remove ohm to GN P R SRM SO-IMM (P) SMR_VREF_Q_M R SMR_VREF_Q_M R R V PM_EXTTS#, R_RMRST# /J_ */J_. V.V_SUS K/J_ JIM V V V V V V V V V V V V V V V V V V VSP N N NTEST EVENT# RESET# SMR_VREF_Q VREF_Q SMR_VREF_IMM VREF_ VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS P R SRM SO-IMM (P) VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS R-IMM_H=_ST_MLX VTT VTT GN GN.V_R_VTT R-IMM_H=_ST_MLX.V_SUS Place these aps near So-imm. U/.V_ U/.V_ U/.V_ U/V_ U/V_ SMR_VREF_IMM SMR_VREF_Q VREF Q M Solution u/.v_ U/.V_ U/.V_.u/V_.U/.V_.u/V_.U/.V_ U/.V_ U/.V_ *U/.V_ U/V_ U/V_ V.V_R_VTT.U/.V_.u/V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ *U/.V_ VREF Q M Solution.V_SUS ST H ST H FOX R K/F_ LTK GMK GMK,, SMR_VREF R */J_ SMR_VREF_Q_M R K/F_.u/V_ SUY MLX GMK GMK Standard H type:r---p- PROJET : KL Quanta omputer Inc. Size ocument Number Rev RIII SO-IMM- ate: Saturday, July, Sheet of
,,,, V_GFX_PIE U PEG_TXP PEG_TXN Y PIE_RXP PIE_RXN PIE_TXP PIE_TXN Y Y PEG RXP PEG RXN.U/V/XR_.U/V/XR_ PEG_RXP PEG_RXN PEG_TXP PEG_TXN Y W PIE_RXP PIE_RXN PIE_TXP PIE_TXN W W PEG RXP PEG RXN.U/V/XR_.U/V/XR_ PEG_RXP PEG_RXN PEG_TXP PEG_TXN W V PIE_RXP PIE_RXN PIE_TXP PIE_TXN U U PEG RXP PEG RXN.U/V/XR_.U/V/XR_ PEG_RXP PEG_RXN PEG_TXP PEG_TXN V U PIE_RXP PIE_RXN PIE_TXP PIE_TXN U U PEG RXP PEG RXN.U/V/XR_.U/V/XR_ PEG_RXP PEG_RXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN U T T R R P P N N M M L L K K J J H PIE_RXP PIE_RXN PIE_RXP PIE_RXN PIE_RXP PIE_RXN PIE_RXP PIE_RXN PIE_RXP PIE_RXN PIE_RXP PIE_RXN PIE_RXP PIE_RXN PIE_RXP PIE_RXN PIE_RXP PIE_RXN PI EXPRESS INTERFE PIE_TXP PIE_TXN PIE_TXP PIE_TXN PIE_TXP PIE_TXN PIE_TXP PIE_TXN PIE_TXP PIE_TXN PIE_TXP PIE_TXN PIE_TXP PIE_TXN PIE_TXP PIE_TXN PIE_TXP PIE_TXN T T T T P P P P N N N N L L L L K K PEG RXP PEG RXN PEG RXP PEG RXN PEG RXP PEG RXN PEG RXP PEG RXN PEG RXP PEG RXN PEG RXP PEG RXN PEG RXP PEG RXN PEG RXP PEG RXN PEG RXP PEG RXN.U/V/XR_.U/V/XR_.U/V/XR_.U/V/XR_.U/V/XR_.U/V/XR_.U/V/XR_.U/V/XR_.U/V/XR_.U/V/XR_.U/V/XR_.U/V/XR_.U/V/XR_.U/V/XR_.U/V/XR_.U/V/XR_.U/V/XR_.U/V/XR_ PEG_RXP PEG_RXN PEG_RXP PEG_RXN PEG_RXP PEG_RXN PEG_RXP PEG_RXN PEG_RXP PEG_RXN PEG_RXP PEG_RXN PEG_RXP PEG_RXN PEG_RXP PEG_RXN PEG_RXP PEG_RXN PEG_TXP PEG_TXN H G PIE_RXP PIE_RXN PIE_TXP PIE_TXN J J PEG RXP PEG RXN.U/V/XR_.U/V/XR_ PEG_RXP PEG_RXN PEG_TXP PEG_TXN G F PIE_RXP PIE_RXN PIE_TXP PIE_TXN K K PEG RXP PEG RXN.U/V/XR_.U/V/XR_ PEG_RXP PEG_RXN PEG_TXP PEG_TXN F E PIE_RXP PIE_RXN PIE_TXP PIE_TXN H H PEG RXP PEG RXN.U/V/XR_.U/V/XR_ PEG_RXP PEG_RXN LK_PIE_VGP LK_PIE_VGN Seymour/Whistler:SWPLOK Madison/apilano :N R K_ J K H LOK PIE_REFLKP PIE_REFLKN N# N# PWRGOO LIRTION PIE_LRP PIE_LRN Y Y R.K R K/F_ V_GFX_PIE GPU_RST# PERST apilano Pro/Robson_M PROJET : KL Quanta omputer Inc. Size ocument Number Rev ustom Madison PIE I/F ate: Saturday, July, Sheet of
Memory Straps MHz G(M*) Hynix_Orion die MHz G(M*) Samsung_E die Note : Required Frequency = MHz.V_GPU R R R R.V_ELY R R R.V_ELY R R R R R R R R R R R R R R *K_ *K_ *K_ *K_ K_ *K_ *K_ *K_ *K_ K_ K_ *K_ *K_ *K_ *K_ *K_ *K_ *K_ *K_ *K_ K_ RM_TYPE_FG RM_TYPE_FG RM_TYPE_FG RM_TYPE_FG RM_FG RM_FG RM_FG GFX_ORE_NTRL GFX_ORE_NTRL GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO VGVSYN EXT_PNEL_KEN HTQGFR- KWGE-H VRM TYPE PERTURE SIZE M M RM_ TYPE_FG MEMORY PERTURE SIZE SELET MEMORY SIZE M RM_ TYPE_FG RM_ TYPE_FG FG GPIO FG GPIO FG GPIO RM_ TYPE_FG ccss to SL and S is mandatory on O design for debug purposes. LVS EXT_LVS_LK EXT_LVS_T N FOR PRK RM_TYPE_FG RM_TYPE_FG RM_TYPE_FG RM_TYPE_FG N FOR PRK.V_ELY R *.K_ R *.K_ R U P W R R U U W P W U R W U T V N V T R W U P V T R W U P K J U MUTI GFX VPNTL_MVP_ VPNTL_MVP_ VPNTL_ VPNTL_ VPNTL_ VPLK VPT_ VPT_ VPT_ VPT_ VPT_ VPT_ VPT_ VPT_ VPT_ VPT_ VPT_ VPT_ VPT_ VPT_ VPT_ VPT_ VPT_ VPT_ VPT_ VPT_ VPT_ VPT_ VPT_ VPT_ SL S I P P P P TXP_PP TXM_PN TXP_PP TXM_PN TXP_PP TXM_PN TXP_PP TXM_PN TXP_PP TXM_PN TXP_PP TXM_PN TXP_PP TXM_PN TXP_PP TXM_PN TXP_PP TXM_PN TXP_PP TXM_PN TXP_PP TXM_PN TXP_PP TXM_PN TXP_PP TXM_PN TXP_PP TXM_PN TXP_PP TXM_PN TXP_PP TXM_PN U V T R U V T R R T V U R T T U U V T R U V T R U T T R U V T R N FOR PRK ONFIGURTION STRPS TX_PWRS_EN TX_EEMPH_EN IF_GEN_EN_ GPIO TT (M-M) VG_IS IOS_ROM_EN U[] U[] VIP_EVIE_STRP_EN,,.V_GPU,,.V_ELY,,,, V_GFX_PIE STRPS PIN ESRIPTION GPIO GPIO GPIO GPIO GPIO GPIO VGHSYN VGVSYN IOS_ROM_EN PIE FULL TX OUTPUT SWING = % Tx output swing = Full Tx output swing PIE TRNSMITTER E-EMPHSIS ENLE = isable ; = Enable = dvertises the PIe device as. GT/s capable at power-on. = dvertises the PIe device as. GT/s capable at power-on. = (Performance mode) = attery saving mode : VG ontroller capacity enabled : The device will not be recognized as the system s VG controller Enable external IOS ROM device = isable ; = Enable U[:]: - No audio function; - udio for isplayport only; - udio for isplayport and HMI if dongle is detected; - udio for both isplayport and HMI. VIP evice Strap Enable = isable ; = Enable SET.V_GPU V_GFX_PIE R TEMP_FIL *K_ GPU Power-on sequence => VGPU_ORE => VGPU_IO => V =>.V_GPU => V_ =>.V_GPU => dgpu_pwrok L LMSN ohm, m L LMSN ohm, m U/.V/XR_ U/V/XR_ GENERL PURPOSE I/O R GPIO R H GPIO GPIO_ H GPIO GPIO_ G E N GPIO GPIO_ G H GPIO GPIO SMT J Power PWM config GPIO GPIO SMLK F H GPIO GPIO TT E J GPIO_ EXT_PNEL_KEN K GPIO GPIO LON HSYN J GPIO GPIO ROMSO VSYN H GPIO GPIO ROMSI J RM_FG GPIO ROMSK K RSET R RM_FG GPIO_ RSET L RM_FG GPIO_ M GPIO_ V V T P M GFX_ORE_NTRL GPIO HP VSSQ E GFX_ORE_NTRL M LK_VG_M_SS_R GPIO PWRNTL_ K GPIO SSIN VI VI THERML_INT# G GPIO THERML_INT VSSI T P N TEMP_FIL GPIO HP TEMP_FIL M GFX_ORE_NTRL GPIO TF GFX_ORE_NTRL L GPIO PWRNTL_ R T P J GPIO EN R T P K GPIO ROMS T P N GPIO LKREQ G T P M JTG_TRST G T P N JTG_TI T P K F JTG_TK T P L JTG_TMS F T P M JTG_TO T P J GENERI T P K GENERI T P J GENERI Y T P K GENERI OMP F T P J GENERIE_HP T P H GENERIF GenericF/G is N on PRK T P H GENERIG HSYN VGVSYN VSYN PLL_PV.V_GPU PLE EXT_HMI_HP K HP (.V @ m PLL_PV) VREFG G R _ VI G R _.U/V/XR_ IVIER VSSI R N P LOSE TO R _ /F_ V G SI R _ VQ H VREFG.V @ m PLL_V R VSSQ F PLL_V /F_.U/V/XR_ RSET RSET R /F_ VI.U/V/XR_.V_ELY VQ /F_ EXT_RT_R EXT_RT_G EXT_RT_.V_GPU.V_GPU.V_GPU N on Seymour/Whistler R /F_ L LMSN ohm, m L LMSN ohm, m L LMSN ohm, m R /F_ U/.V/XR_ U/.V/XR_ EXT_RT_ EXT_RT_G EXT_RT_R R /F_ Layout Note: Place ohm termination resistors close to TI HIP. U/V/XR_ U/V/XR_ U/V/XR_.U/V/XR_ R.U/V/XR_.U/V/XR_ *_/S V VI VI VQ (.V @ m V) (.V @ m VI) (.V @ m VI) (.V @ m VQ) LK_M_VG LK_VG_M_SS R R R.U/.V/XR_ Y MHZ R M P/V/OG_ U/V/XR_ /F_ /F_ R LK_VG_M_SS_R Use Mhz rystal for test anny *_.U/V/XR_ *_ R _ R _ P/V/OG_ *_ R *_ R R *K_.V_GPU L LMSN ohm, m PLL_PV PLL_V R _ R _ XTIN XTOUT VG_THERMP VG_THERMN TSV (.V @ m TSV) U/.V/XR_ U/V/XR_.U/V/XR_ M N N W W V U F G K J J PLL_PV PLL_PVSS PLL_V XO_IN XO_IN XTLIN XTLOUT PLUS MINUS TS_FO TSV TSVSS PLL/LOK THERML apilano Pro/Robson_M /UX LK T UXP UXN LK T UXP UXN LK_UXP T_UXN LK_UXP T_UXN LK_UXP T_UXN LK T N_LK_UXP N_T_UXN M N M L M L N M L M L M N M J J K K!!! N when M-M/PRK!!! N when M-M/PRK LK/T support internal HP(High-bandwidth igital ontent Protection) function. HMI RT PROJET : KL Quanta omputer Inc. Size ocument Number Rev Madison_IO&STRP Saturday, July, ate: Sheet of
V_GFX_PIE.V_GPU.V_GPU LMSN ohm, m.v_gpu LMSN ohm, m (.-.V @ m SPV) LMSN_N ohm, m L L L L.V_GPU V_T PIE_PV (.V @ m PIE_PV) SPV U/V/XR_ U/V/XR_ U/V/XR_ U/V/XR_ MPV (.V @ m MPV) For R, VR =.V (.V @. VRVRHVRH).U/.V/XR_ (.V @ m V_T) U/.V/XR_.V_ELY (.V @ m VR).V_GPU U/.V/XR_.U/.V/XR_ LMSN ohm, m U/V/XR_ VR V_SENSE/VSS_SENSE and VI_SENSE/VSS_SENSE route as differetial pair U/V/XR_ L U/V/XR_ U/.V/XR_.U/.V/XR_ U/V/XR_ U/V/XR_ U/V/XR_ U/V/XR_ U/V/XR_ U/.V/XR_.U/V/XR_.U/V/XR_.U/V/XR_ U/V/XR_.U/.V/XR_.U/V/XR_ T T T T MPV SPV T T T UE MEM I/O PIE VR# PIE_VR# VR# PIE_VR# F VR# PIE_VR# G VR# PIE_VR# J VR# PIE_VR# K VR# PIE_VR# L VR# PIE_VR# G VR# PIE_VR# G VR# G VR# G VR# PIE_V# G VR# PIE_V# G VR# PIE_V# G VR# PIE_V# H VR# PIE_V# J VR# PIE_V# J VR# PIE_V# K VR# PIE_V# K VR# PIE_V# K VR# PIE_V# L VR# PIE_V# L VR# PIE_V# L VR# L VR# L VR# ORE V# L VR# V# M VR# V# N VR# V# P VR# V# R VR# V# U VR# V# U VR# V# Y VR# V# Y VR# V# V# V# V# LEVEL V# TRNSLTION V# V# F V_T# V# F V_T# V# G V_T# V# G V_T# V# V# I/O V# V# F VR# V# F VR# V# G VR# V# G VR# V# V# V# F VR# V# F VR# V# G VR# V# G VR# V# V# V# VR# V# F VR# V# F VR# V# G VR# V# V# V# V# V# M N_VRH V# M N_VSSRH V# V# V# V N_VRH V# U N_VSSRH V# V# V# V# PLL V# V# PIE_PV V# V# H MPV# V# H MPV# V# POWER M SPV VI# N SPV VI# VI# N SPVSS VI# VI# VI# VI# VOLTGE VI# SENESE VI# VI# VI# F F_V VI# VI# VI# G F_VI ISOLTE VI# ORE I/O VI# VI# H F_GN VI# VI# VI# VI# VI# apilano Pro/Robson_M V W W Y G G H H J J L M N R T U F F F G G G H H H M N N R R R R T T T T T U U U U U V V V V V Y Y Y Y Y Y M M M M N N N N N R R R T T V Y IF_V.U/V/XR_ U/V/XR_ U/V/XR_ U/V/XR_ U/V/XR_ U/V/XR_ U/V/XR_.U/.V/XR_ (.V @ m PIE_VR) (.V @. PIE_V) U/V/XR_ U/V/XR_ GFX_ORE R _ U/V/XR_ U/V/XR_ U/V/XR_ U/V/XR_ U/V/XR_ U/V/XR_.U/.V/XR_ U/V/XR_ U/.V/XR_ U/V/XR_ U/V/XR_ U/V/XR_.U/.V/XR_ U/V/XR_ U/V/XR_ U/V/XR_ U/V/XR_ U/V/XR_ U/.V/XR_ U/V/XR_ PIE_VR (.V @. GFX_ORE) U/V/XR_ U/.V/XR_ U/V/XR_ U/V/XR_.U/.V/XR_.U/.V/XR_ U/.V/XR_ U/V/XR_ U/V/XR_ U/V/XR_ U/V/XR_ U/V/XR_ LMPGSN ohm, U/V/XR_ U/V/XR_ U/V/XR_ U/V/XR_ U/V/XR_ U/V/XR_ E PIE_V U/.V/XR_ U/V/XR_ L U/V/XR_ GFX_ORE.V_GPU.U/.V/XR_ U/V/XR_ U/V/XR_ U/V/XR_ U/V/XR_ U/V/XR_ GFX_ORE L LMPGSN ohm, U/.V/XR_ U/V/XR_ V_GFX_PIE,,,,,,,,,,,,,,,,,,,,,,,,,,, E F F G G H H H J J K K K L L M M N N P P P R T T T U U V V W W Y Y F F F F F F F F F F F F G G H J J J J K K L L L L L L M M M N N N N N N N R R R R R R R R T T T T T T T U U U U U U U U V V V V V V W W Y Y Y Y Y Y U V UF PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# PIE_VSS# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN apilano Pro/Robson_M GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN/PX_EN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# VSS_MEH# VSS_MEH# VSS_MEH# E E F F F F G G G G G G H J J J J J K K K L L L L L L L L L L L M M M N N N N N P P P R E E F F W W V PX_EN_,,,,,,,,,,,,, V_GFX_PIE.V_GPU.V_GPU GFX_ORE.V_ELY PX_EN!!! Reserve for PX_EN for Park and Madison PowerXpress control signal for Madsion and Park only If not used, can be disconnected. (L pin) PX_EN = LOW, turn on PX_EN = HIGH, turn off R *_ R _ Pin L to Ground for roadway LMSN_N ohm, m.u/.v/xr_.u/.v/xr_.u/v/xr_.u/v/xr_ SPV L (.V @ m SPV) LMSN_N ohm, m.u/.v/xr_.u/v/xr_ GPU all PWROK V V Support O Mode V R *K_ V R *K_ V R *K_ PX_EN## PX_EN#, GFXON.V_ELY V R _ R Q *_ SIS-T-E R K_.V_GPU R K_ R K_ Q MMT Q PTTT GFXPG, PX_MOE PX_EN R *_ Q *N V_GFX_PIE PX_EN# GFX_ORE Q *N Q *N Q *N Q *N IF_V *U/.VS_, V_PIE_PG R *K/F_ OPTIONL R NETWORK TO FINE TUNE POWER SEQUENING Q NW--F *.U/V/XR_ *P/V/XR_ PX_EN## PROJET : KL Quanta omputer Inc. Size ocument Number Rev ustom Madison_POWER Saturday, July, ate: Sheet of
!!! For M/, Px_V =.V For M Px_V =.V,,,, V_GFX_PIE,,.V_GPU (.V@m P_V).V_GPU P & P aren't used. UH P / POWER P / POWER (.V @ m PE_V; m for PE/PF respectively).v_gpu PE & PF for LVS (.V @ m PE_V; m for PE/PF respectively) V_GFX_PIE (.V@m P_V) L LMPGSN ohm, m L *.U/V/XR_.V_GPU *.U/V/XR_ PE_V PE_V LMSN ohm, m U/.V/XR_ U/.V/XR_ *.U/V/XR_ U/V/XR_ U/V/XR_ V_GFX_PIE *.U/V/XR_ V_GFX_PIE /F_.U/V/XR_.U/V/XR_ P P P T N P P W W P P P P N P P W W R W H J PE_V L M N P R U PE_V F G K K F H K L M P_V# P_V# P_V# P_V# P_VSSR# P_VSSR# P_VSSR# P_VSSR# P_VSSR# P_V# P_V# P_V# P_V# P_VSSR# P_VSSR# P_VSSR# P_VSSR# P_VSSR# P_LR P E/F POWER PE_V# PE_V# PE_V# PE_V# PE_VSSR# PE_VSSR# PE_VSSR# PE_VSSR# PF_V# PF_V# PF_V# PF_V# PF_VSSR# PF_VSSR# PF_VSSR# PF_VSSR# PF_VSSR# P_V# P_V# P_V# P_V# P_VSSR# P_VSSR# P_VSSR# P_VSSR# P_VSSR# P_V# P_V# P_V# P_V# P_VSSR# P_VSSR# P_VSSR# P_VSSR# P_VSSR# P_LR P PLL POWER P_PV P_PVSS P_PV P_PVSS P_PV P_PVSS P_PV P_PVSS PE_PV PE_PVSS N_PF_PV N_PF_PVSS N P P P N P P W W P P N P *.U/V/XR_ N P P W W W U V V R U V V R M N L M R P & P aren't used. P_V.U/V/XR_ P_V.U/V/XR_ U/V/XR_ V_GFX_PIE /F_.V_GPU *.U/V/XR_ P_V LMSN ohm, m PE_PV.V_GPU (.V @ m P_V) *.U/V/XR_ U/V/XR_.U/.V/XR_ U/.V/XR_.U/V/XR_ (.V @ m P_V) L.V_GPU V_GFX_PIE P for HMI (.V @ m P_V) *.U/V/XR_ U/V/XR_ P_PV (.V @ m P_PV) *.U/V/XR_ (.V @ m PE_PV; m for PE/PF respectively) L LMSN ohm, m U/.V/XR_.V_GPU (.V @ m P_PV) L LMSN ohm, m.u/v/xr_.v_gpu P_V U/V/XR_ (.V @ m P_V).U/.V/XR_ L LMSN ohm, m.v_gpu /F_ R M PEF_LR apilano Pro/Robson_M PROJET : KL Quanta omputer Inc. Size ocument Number Rev ustom Madison_P_POWER ate: Saturday, July, Sheet of
QS[..] LK LK# LK LK# M[..] QM#[..] QS#[..] _ M[..] S# S_# KE RS# S# S_# WE# WE# KE RS# MVREFS MVREF S# S_# KE RS# S# S_# WE# WE# KE RS# _ QS[..] LK LK# LK LK# M[..] QM#[..] QS#[..] _ M[..] _ MVREFS MVREF OT OT OT OT THERML_INT# THERML_INT# M_THERM# M_THERM# _ M M M M M M M M M M M M M LK LK# WE# S# S_# RS# KE LK S_# RS# S# KE WE# QS# QS# QS# QS# QM# QM# QM# QM# QM# QM# QS QS QS QS# QS QS QS QS# LK# OT OT M QS QS QS# QS# QS# QS# QS# QS# QS# QS QS QS QS# QS QS QS QM# QM# QM# QM# QM# QM# QM# QM# LK# S_# S_# RS# S# WE# KE S# RS# KE WE# LK# LK LK _ M M M M M M M M M M M M M OT OT M QS QS QS# QS# QM# QM# M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M_THERM# U_V_R KE KE S_# S_# RS# RS# S# S# WE# WE# M[..] QS#[..] QS[..] LK LK# QM#[..] M[..] LK LK# _ KE KE S_# S_# RS# RS# S# S# WE# WE# M[..] QS#[..] QS[..] LK LK# QM#[..] M[..] LK LK# _ OT OT OT OT VG_THERMP VG_THERMN THERML_INT# R_RST,.V_GPU,,,, M_LK,,, M_T,,, SYS_SHN#,.V_ELY,,.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_ELY.V_ELY.V_ELY.V_ELY.V_GPU.V_ELY Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET : KL Madison_MEMORY/THERM ustom Saturday, July, Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET : KL Madison_MEMORY/THERM ustom Saturday, July, Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET : KL Madison_MEMORY/THERM ustom Saturday, July, PLE MVREF IVIERS N PS LOSE TO SI PLE MVREF IVIERS N PS LOSE TO SI Ra Rb Ra Rb Ra Rb Ra Rb THERML MONITOR R Rb R/GR Memory Stuff Option Ra MVQ GR R.V.R R.V R E _ R _ R.U/V/XR_.U/V/XR_ K R K R./F_ R./F_ R Q NW--F Q NW--F R *.K_ R *.K_ R K_ R K_ /F_ R /F_ R./F_ R./F_ R R /F_ R /F_ MEMORY INTERFE R GR/GR R R GR/GR R GR GR/R/GR apilano Pro/Robson_M U MEMORY INTERFE R GR/GR R R GR/GR R GR GR/R/GR apilano Pro/Robson_M U Q_/Q_ Q_/Q_ Q_/Q_ J Q_/Q_ K Q_/Q_ K Q_/Q_ L Q_/Q_ M Q_/Q_ M Q_/Q_ M Q_/Q_ M Q_/Q_ N Q_/Q_ P Q_/Q_ E Q_/Q_ P Q_/Q_ R Q_/Q_ T Q_/Q_ T Q_/Q_ U Q_/Q_ V Q_/Q_ V Q_/Q_ V Q_/Q_ Y Q_/Q_ Y Q_/Q_ E Q_/Q_ Y Q_/Q_ Y Q_/Q_ Q_/Q_ Q_/Q_ Q_/Q_ Q_/Q_ Q_/Q_ Q_/Q_ Q_/Q_ Q_/Q_ F Q_/Q_ F Q_/Q_ F Q_/Q_ F Q_/Q_ G Q_/Q_ H Q_/Q_ H Q_/Q_ J Q_/Q_ K Q_/Q_ F Q_/Q_ F Q_/Q_ F Q_/Q_ G Q_/Q_ G Q_/Q_ K Q_/Q_ L Q_/Q_ M Q_/Q_ M Q_/Q_ K Q_/Q_ L Q_/Q_ M Q_/Q_ M Q_/Q_ F Q_/Q_ N Q_/Q_ P Q_/Q_ P Q_/Q_ P Q_/Q_ G Q_/Q_ H Q_/Q_ H MVREF Y MVREFS TESTEN S W S KE U KE LK L LK L LK LK LKTEST K LKTEST L S_ P S_ L S_ S_ WK_/QM_ H WK_/QM_ H WK_/QM_ T WK_/QM_ T WK_/QM_ E WK_/QM_ F WK_/QM_ K WK_/QM_ K RM_RST H M_/M_ P M_/M_ T M_/M_ M_/M_ M_/M_ M_/ M_/ Y M_/ M_/M_ P M_/M_ N M_/M_ N M_/M_ N M_/M_ U M_/M_ U M_/M_ Y M_/M_ W I/OT T I/OT W RS T RS Y E_/QS_/RQS_ F E_/QS_/RQS_ K E_/QS_/RQS_ P E_/QS_/RQS_ V E_/QS_/RQS_ E_/QS_/RQS_ H E_/QS_/RQS_ J E_/QS_/RQS_ M I_/QS_/WQS_ G I_/QS_/WQS_ K I_/QS_/WQS_ P I_/QS_/WQS_ W I_/QS_/WQS_ I_/QS_/WQS_ H I_/QS_/WQS_ J I_/QS_/WQS_ M WE N WE M_ T M_ W R /F_ R /F_.U/V/XR_.U/V/XR_ Q NW--F Q NW--F.U/V/XR_.U/V/XR_ R _ R _ Q *N Q *N.U/V/XR_.U/V/XR_./F_ R./F_ R.U/V/XR_.U/V/XR_ R /F_ R /F_ *P/V/XR_ *P/V/XR_ R.K_ R.K_.U/V/XR_.U/V/XR_ R /F_ R /F_./F_ R./F_ R R K_ R K_.U/V/XR_.U/V/XR_ /F_ R /F_ R R /F_ R /F_./F_ R./F_ R R /F_ R /F_ /F_ R /F_ R./F_ R./F_ R MEMORY INTERFE R GR/GR R GR/R/GR R GR/GR R GR apilano Pro/Robson_M U MEMORY INTERFE R GR/GR R GR/R/GR R GR/GR R GR apilano Pro/Robson_M U Q_/Q_ Q_/Q_ Q_/Q_ Q_/Q_ Q_/Q_ F Q_/Q_ Q_/Q_ Q_/Q_ E Q_/Q_ Q_/Q_ F Q_/Q_ Q_/Q_ Q_/Q_ Q_/Q_ F Q_/Q_ Q_/Q_ Q_/Q_ E Q_/Q_ Q_/Q_ Q_/Q_ F Q_/Q_ Q_/Q_ Q_/Q_ F Q_/Q_ E Q_/Q_ Q_/Q_ E Q_/Q_ Q_/Q_ Q_/Q_ F Q_/Q_ Q_/Q_ Q_/Q_ F Q_/Q_ Q_/Q_ E Q_/Q_ G Q_/Q_ F Q_/Q_ Q_/Q_ F Q_/Q_ Q_/Q_ Q_/Q_ F Q_/Q_ Q_/Q_ Q_/Q_ G Q_/Q_ H Q_/Q_ Q_/Q_ J Q_/Q_ H Q_/Q_ G Q_/Q_ G Q_/Q_ K Q_/Q_ K Q_/Q_ G Q_/Q_ Q_/Q_ Q_/Q_ E Q_/Q_ F Q_/Q_ Q_/Q_ Q_/Q_ E Q_/Q_ Q_/Q_ E Q_/Q_ Q_/Q_ F MEM_LRP M MVREF L MVREFS L MEM_LRN L MEM_LRN N MEM_LRN G MEM_LRP M MEM_LRP H S K S K KE K KE J LK H LK G LK J LK H S_ K S_ K S_ M S_ K WK_/QM_ WK_/QM_ WK_/QM_ WK_/QM_ E WK_/QM_ WK_/QM_ WK_/QM_ E WK_/QM_ M_/M_ G M_/M_ J M_/M_ L M_/M_ G M_/M_ J M_/M H M_/M J M_/M H M_/M_ H M_/M_ J M_/M_ H M_/M_ J M_/M_ H M_/M_ G M_/M_ H M_/M_ H I/OT J I/OT G RS K RS K E_/QS_/RQS_ E_/QS_/RQS_ E_/QS_/RQS_ E_/QS_/RQS_ E E_/QS_/RQS_ E E_/QS_/RQS_ E E_/QS_/RQS_ J E_/QS_/RQS_ RSV L M_ H M_ J I_/QS_/WQS_ I_/QS_/WQS_ E I_/QS_/WQS_ E I_/QS_/WQS_ I_/QS_/WQS_ I_/QS_/WQS_ I_/QS_/WQS_ J I_/QS_/WQS_ F WE K WE L R.K_ R.K_ /F_ R /F_ R P/V/OG_ P/V/OG_ U MRMZ-RL U MRMZ-RL V GN - THERM# LERT# ST SLK R K_ R K_
OT S_# QS _ VREF_ VREF_ QS# R_RST M M M M M M M M M M M M QM# LK LK# KE RS# WE# S# M QS QS# M QM# M M M M M M M M M M M M M M M _ VREF_ VREF_ OT S_# RS# WE# S# M R_RST M M LK LK# KE M M M M M M M M M M M M M M M VREF_ VREF M QM# S# QS# OT S_# M WE# M KE LK LK# M M QS RS# R_RST M VREF_ VREF_ M M R_RST M M M M M M M M M M M M M _ S# OT S_# WE# RS# QS QS# QM# KE LK LK# _[..] M[..] QM#[..] QS#[..] M[..] QS[..] LK# LK LK# LK VREF_ VREF_ VREF_ VREF_ VREF_ VREF_ VREF_ VREF_ M M M M M QM# M QS QS# M M M M M M M M M QS# M M M QS M QM# M M M M M M QS QS# M M M M M QM# M M M M M M M QM# M QS QS# M M M M M M M M M M M M M M KE LK LK# S# RS# WE# S_# R_RST, KE LK LK# S_# RS# S# WE# _[..] M[..] QM#[..] M[..] QS#[..] QS[..] OT OT.V_GPU,,,,.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET : KL Madison_R M Saturday, July, Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET : KL Madison_R M Saturday, July, Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET : KL Madison_R M Saturday, July, R MX, H : M Placement has to be close to VRM lose to U lose to U lose to U & U lose to U lose to U lose to U & U.U/.V/XR_.U/.V/XR_ U/.V/XR_ U/.V/XR_ *U/.V/XR_ *U/.V/XR_ *U/.V/XR_ *U/.V/XR_ R.K/F_ R.K/F_.U/V/XR_.U/V/XR_.U/V/XR_.U/V/XR_ -LL SRM R KWGE-H U -LL SRM R KWGE-H U WE L RS J S K S L KE K K J K K QSU M N P N P P R R T R /P L R QL E QL F QL F QL F QL H QL H QL G QL H VSSQ# VSS# VSS#E E VSS# N#J J V# V# VQ# VQ# VQ# VQ# N#L L N#J J VQ#E E ZQ L RESET T QSL F MU ML E VSSQ# VSSQ# VSSQ# VSSQ#E E QSU VSSQ#E E QSL G VQ#F F VSSQ#F F VSSQ#G G VQ#H H VQ#H H VSSQ#G G VREF M VSS#G G V#G G OT K N P V#K K / N VSS#J J V#K K QU QU QU QU QU QU QU QU T T M M VREFQ H N#L L V#N N V#N N V#R R V#R R VSS#J J VSS#M M VSS#M M VSS#P P VSS#P P VSS#T T VSS#T T VQ#.U/V/XR_.U/V/XR_ *U/.V/XR_ *U/.V/XR_ *U/.V/XR_ *U/.V/XR_ R _ R _ U/.V/XR_ U/.V/XR_.U/V/XR_.U/V/XR_ -LL SRM R KWGE-H U -LL SRM R KWGE-H U WE L RS J S K S L KE K K J K K QSU M N P N P P R R T R /P L R QL E QL F QL F QL F QL H QL H QL G QL H VSSQ# VSS# VSS#E E VSS# N#J J V# V# VQ# VQ# VQ# VQ# N#L L N#J J VQ#E E ZQ L RESET T QSL F MU ML E VSSQ# VSSQ# VSSQ# VSSQ#E E QSU VSSQ#E E QSL G VQ#F F VSSQ#F F VSSQ#G G VQ#H H VQ#H H VSSQ#G G VREF M VSS#G G V#G G OT K N P V#K K / N VSS#J J V#K K QU QU QU QU QU QU QU QU T T M M VREFQ H N#L L V#N N V#N N V#R R V#R R VSS#J J VSS#M M VSS#M M VSS#P P VSS#P P VSS#T T VSS#T T VQ#.U/V/XR_.U/V/XR_ U/.V/XR_ U/.V/XR_ U/.V/XR_ U/.V/XR_ R _ R _ U/.V/XR_ U/.V/XR_ R _ R _.U/.V/XR_.U/.V/XR_ U/.V/XR_ U/.V/XR_ R /F_ R /F_ U/.V/XR_ U/.V/XR_ U/.V/XR_ U/.V/XR_.U/.V/XR_.U/.V/XR_ R.K/F_ R.K/F_.U/V/XR_.U/V/XR_ R /F_ R /F_.U/V/XR_.U/V/XR_ *U/.V/XR_ *U/.V/XR_ R /F_ R /F_.U/V/XR_.U/V/XR_ -LL SRM R KWGE-H U -LL SRM R KWGE-H U WE L RS J S K S L KE K K J K K QSU M N P N P P R R T R /P L R QL E QL F QL F QL F QL H QL H QL G QL H VSSQ# VSS# VSS#E E VSS# N#J J V# V# VQ# VQ# VQ# VQ# N#L L N#J J VQ#E E ZQ L RESET T QSL F MU ML E VSSQ# VSSQ# VSSQ# VSSQ#E E QSU VSSQ#E E QSL G VQ#F F VSSQ#F F VSSQ#G G VQ#H H VQ#H H VSSQ#G G VREF M VSS#G G V#G G OT K N P V#K K / N VSS#J J V#K K QU QU QU QU QU QU QU QU T T M M VREFQ H N#L L V#N N V#N N V#R R V#R R VSS#J J VSS#M M VSS#M M VSS#P P VSS#P P VSS#T T VSS#T T VQ# R.K/F_ R.K/F_ -LL SRM R KWGE-H U -LL SRM R KWGE-H U WE L RS J S K S L KE K K J K K QSU M N P N P P R R T R /P L R QL E QL F QL F QL F QL H QL H QL G QL H VSSQ# VSS# VSS#E E VSS# N#J J V# V# VQ# VQ# VQ# VQ# N#L L N#J J VQ#E E ZQ L RESET T QSL F MU ML E VSSQ# VSSQ# VSSQ# VSSQ#E E QSU VSSQ#E E QSL G VQ#F F VSSQ#F F VSSQ#G G VQ#H H VQ#H H VSSQ#G G VREF M VSS#G G V#G G OT K N P V#K K / N VSS#J J V#K K QU QU QU QU QU QU QU QU T T M M VREFQ H N#L L V#N N V#N N V#R R V#R R VSS#J J VSS#M M VSS#M M VSS#P P VSS#P P VSS#T T VSS#T T VQ# R /F_ R /F_ R _ R _ R.K/F_ R.K/F_.U/V/XR_.U/V/XR_ R.K/F_ R.K/F_ U/.V/XR_ U/.V/XR_ R.K/F_ R.K/F_ *U/.V/XR_ *U/.V/XR_ R.K/F_ R.K/F_ U/.V/XR_ U/.V/XR_ U/.V/XR_ U/.V/XR_ R.K/F_ R.K/F_ *U/.V/XR_ *U/.V/XR_ R.K/F_ R.K/F_.U/.V/XR_.U/.V/XR_ *U/.V/XR_ *U/.V/XR_ R.K/F_ R.K/F_ R.K/F_ R.K/F_ R.K/F_ R.K/F_ *U/.V/XR_ *U/.V/XR_ U/.V/XR_ U/.V/XR_.U/V/XR_.U/V/XR_ R.K/F_ R.K/F_ U/.V/XR_ U/.V/XR_ U/.V/XR_ U/.V/XR_ *U/.V/XR_ *U/.V/XR_ R.K/F_ R.K/F_ U/.V/XR_ U/.V/XR_ R.K/F_ R.K/F_ U/.V/XR_ U/.V/XR_ R.K/F_ R.K/F_
QS QS M M M M M LK LK# KE M S# VREF_ VREF_ S_# RS# QS# QS# _ M M M M M M M M M M M M WE# OT QM# QM# R_RST M M M M M M M R_RST M LK LK# KE M M M M M M M M M M M M M _ VREF_ VREF_ M M QS QS QS# QS# QM# QM# M S# S_# RS# WE# OT QM# M M M R_RST KE LK LK# QS# VREF_ VREF_ M M M M M M M M M M M M M QS OT S# S_# WE# RS# _ VREF_ VREF_ M M M M M M M M M M M M OT KE LK LK# M M M M M S# QM# M M S_# QS# WE# R_RST _ QS RS# _[..] QS[..] M[..] QM#[..] QS#[..] M[..] LK# LK LK# LK VREF_ VREF_ VREF_ VREF_ VREF_ VREF_ VREF_ VREF_ M M M M M M M M M M M M M M M M M M M M M M M QM# QS QS# M M M M M M M M M M M M M QM# QS QS# M M M M M M M R_RST, LK LK# KE S# S_# RS# WE# KE LK LK# S_# RS# S# WE# _[..] QS[..] M[..] QM#[..] M[..] QS#[..] OT OT.V_GPU,,,,.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU.V_GPU Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET : KL Madison_R M Saturday, July, Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET : KL Madison_R M Saturday, July, Size ocument Number Rev ate: Sheet of Quanta omputer Inc. PROJET : KL Madison_R M Saturday, July, R MX, H : M Placement has to be close to VRM lose to U lose to U lose to U & U lose to U lose to U lose to U &U.U/V/XR_.U/V/XR_ R.K/F_ R.K/F_ U/.V/XR_ U/.V/XR_.U/.V/XR_.U/.V/XR_ R.K/F_ R.K/F_ U/.V/XR_ U/.V/XR_ R /F_ R /F_ R.K/F_ R.K/F_.U/V/XR_.U/V/XR_ U/.V/XR_ U/.V/XR_ *U/.V/XR_ *U/.V/XR_ *U/.V/XR_ *U/.V/XR_.U/V/XR_.U/V/XR_ R.K/F_ R.K/F_ R _ R _ U/.V/XR_ U/.V/XR_ R _ R _ *.U/.V/XR_ *.U/.V/XR_ R _ R _ U/.V/XR_ U/.V/XR_.U/.V/XR_.U/.V/XR_ R.K/F_ R.K/F_ U/.V/XR_ U/.V/XR_ R.K/F_ R.K/F_ U/.V/XR_ U/.V/XR_ R.K/F_ R.K/F_ R /F_ R /F_ U/.V/XR_ U/.V/XR_ R.K/F_ R.K/F_ *U/.V/XR_ *U/.V/XR_ *U/.V/XR_ *U/.V/XR_ U/.V/XR_ U/.V/XR_.U/V/XR_.U/V/XR_ U/.V/XR_ U/.V/XR_ *U/.V/XR_ *U/.V/XR_ R.K/F_ R.K/F_ U/.V/XR_ U/.V/XR_ -LL SRM R KWGE-H U -LL SRM R KWGE-H U WE L RS J S K S L KE K K J K K QSU M N P N P P R R T R /P L R QL E QL F QL F QL F QL H QL H QL G QL H VSSQ# VSS# VSS#E E VSS# N#J J V# V# VQ# VQ# VQ# VQ# N#L L N#J J VQ#E E ZQ L RESET T QSL F MU ML E VSSQ# VSSQ# VSSQ# VSSQ#E E QSU VSSQ#E E QSL G VQ#F F VSSQ#F F VSSQ#G G VQ#H H VQ#H H VSSQ#G G VREF M VSS#G G V#G G OT K N P V#K K / N VSS#J J V#K K QU QU QU QU QU QU QU QU T T M M VREFQ H N#L L V#N N V#N N V#R R V#R R VSS#J J VSS#M M VSS#M M VSS#P P VSS#P P VSS#T T VSS#T T VQ#.U/V/XR_.U/V/XR_.U/V/XR_.U/V/XR_ R.K/F_ R.K/F_ R.K/F_ R.K/F_ U/.V/XR_ U/.V/XR_ *U/.V/XR_ *U/.V/XR_ U/.V/XR_ U/.V/XR_ *U/.V/XR_ *U/.V/XR_.U/V/XR_.U/V/XR_.U/V/XR_.U/V/XR_ U/.V/XR_ U/.V/XR_ -LL SRM R KWGE-H U -LL SRM R KWGE-H U WE L RS J S K S L KE K K J K K QSU M N P N P P R R T R /P L R QL E QL F QL F QL F QL H QL H QL G QL H VSSQ# VSS# VSS#E E VSS# N#J J V# V# VQ# VQ# VQ# VQ# N#L L N#J J VQ#E E ZQ L RESET T QSL F MU ML E VSSQ# VSSQ# VSSQ# VSSQ#E E QSU VSSQ#E E QSL G VQ#F F VSSQ#F F VSSQ#G G VQ#H H VQ#H H VSSQ#G G VREF M VSS#G G V#G G OT K N P V#K K / N VSS#J J V#K K QU QU QU QU QU QU QU QU T T M M VREFQ H N#L L V#N N V#N N V#R R V#R R VSS#J J VSS#M M VSS#M M VSS#P P VSS#P P VSS#T T VSS#T T VQ# R.K/F_ R.K/F_ -LL SRM R KWGE-H U -LL SRM R KWGE-H U WE L RS J S K S L KE K K J K K QSU M N P N P P R R T R /P L R QL E QL F QL F QL F QL H QL H QL G QL H VSSQ# VSS# VSS#E E VSS# N#J J V# V# VQ# VQ# VQ# VQ# N#L L N#J J VQ#E E ZQ L RESET T QSL F MU ML E VSSQ# VSSQ# VSSQ# VSSQ#E E QSU VSSQ#E E QSL G VQ#F F VSSQ#F F VSSQ#G G VQ#H H VQ#H H VSSQ#G G VREF M VSS#G G V#G G OT K N P V#K K / N VSS#J J V#K K QU QU QU QU QU QU QU QU T T M M VREFQ H N#L L V#N N V#N N V#R R V#R R VSS#J J VSS#M M VSS#M M VSS#P P VSS#P P VSS#T T VSS#T T VQ# R.K/F_ R.K/F_ U/.V/XR_ U/.V/XR_ R /F_ R /F_ R _ R _.U/V/XR_.U/V/XR_ R.K/F_ R.K/F_ U/.V/XR_ U/.V/XR_ *U/.V/XR_ *U/.V/XR_.U/.V/XR_.U/.V/XR_ *U/.V/XR_ *U/.V/XR_.U/V/XR_.U/V/XR_ R.K/F_ R.K/F_ R /F_ R /F_ R.K/F_ R.K/F_ -LL SRM R KWGE-H U -LL SRM R KWGE-H U WE L RS J S K S L KE K K J K K QSU M N P N P P R R T R /P L R QL E QL F QL F QL F QL H QL H QL G QL H VSSQ# VSS# VSS#E E VSS# N#J J V# V# VQ# VQ# VQ# VQ# N#L L N#J J VQ#E E ZQ L RESET T QSL F MU ML E VSSQ# VSSQ# VSSQ# VSSQ#E E QSU VSSQ#E E QSL G VQ#F F VSSQ#F F VSSQ#G G VQ#H H VQ#H H VSSQ#G G VREF M VSS#G G V#G G OT K N P V#K K / N VSS#J J V#K K QU QU QU QU QU QU QU QU T T M M VREFQ H N#L L V#N N V#N N V#R R V#R R VSS#J J VSS#M M VSS#M M VSS#P P VSS#P P VSS#T T VSS#T T VQ# U/.V/XR_ U/.V/XR_
UG R *K_ R K_ RT SWITH LVS ONTROL VRY_L IGON K J EXT_I_PWM EXT_ENV TXLK_UP_PFP TXLK_UN_PFN K L TXOUT_UP_PFP TXOUT_UN_PFN J K TXOUT_UP_PFP TXOUT_UN_PFN H J TXOUT_UP_PFP TXOUT_UN_PFN G H TXOUT_UP TXOUT_UN F G P P T T LVTMP TXLK_LP_PEP TXLK_LN_PEN TXOUT_LP_PEP TXOUT_LN_PEN P R W U TXOUT_LP_PEP TXOUT_LN_PEN R U TXOUT_LP_PEP TXOUT_LN_PEN P R TXOUT_LP TXOUT_LN N P P P T T apilano Pro/Robson_M PROJET : KL Quanta omputer Inc. Size ocument Number Rev ustom Madison_LVS/HMI/RT switchable ate: Saturday, July, Sheet of
IS/SG HMI V HMI_SL_R HMI_S_R.V_ELY R R.K_.K_ Q.V_ELY Q FVN FVN R.K_ R.K_ V HMI_TX HMI_TX- HMI_TX HMI_TX- HMI_TX HMI_TX- HMI_LK HMI_LK- HMI LK HMI T F HMI_V HP_ET FUSEV_POLY N SHELL Shield - Shield - Shield - K K Shield K- E Remote N LK T GN V HP ET SHELL ONN_HMI HMI Hot-PLUG to E and GPU V R K_ V HMI_HP_R R K_ UM Only / Muxless HMI Q NK HP_ET R Q K/J_ NK INT_HMI_TXP INT_HMI_TXN.U/V/XR_.U/V/XR_ HMI_TX HMI_TX- INT_HMI_TXP INT_HMI_TXN.U/V/XR_.U/V/XR_ HMI_TX HMI_TX- INT_HMI_TXP INT_HMI_TXN.U/V/XR_.U/V/XR_ HMI_TX HMI_TX- INT_HMI_TXP INT_HMI_TXN.U/V/XR_.U/V/XR_ HMI_LK HMI_LK- INT_HMI_SL R _ HMI_SL_R INT_HMI_S R _ HMI_S_R INT_HMI_HP R _ HMI_HP_R EMI reserve for HMI HMI_TX HMI_TX- HMI_TX HMI_TX- HMI_TX HMI_TX- U V GN HMI_TX HMI_TX- HMI_TX HMI_TX- R */F_ HMI_LF R R R R R R R R /F_ /F_ /F_ /F_ /F_ /F_ /F_ /F_ HMI_TX HMI_TX- HMI_TX HMI_TX- HMI_TX HMI_TX- HMI_LK HMI_LK- HMI_TX HMI_TX- HMI_LK HMI_LK- HMI T HMI LK HMI_V HP_ET For ES *RlampM_G U V *RlampM_G U V GN GN HMI_TX HMI_TX- HMI_LK HMI_LK- HMI T HMI LK HMI_V HP_ET *RlampM_G Layout note:place close to HMI onn HMI_TX HMI_TX- HMI_TX HMI_TX- HMI_LK HMI_LK- R */F_ R */F_ R */F_ V R _ Q NK-T-E For ES,,,,,,,,,,,, V,,,,,,,,,,,,,,,,,,,,,,,,,,, V,,.V_ELY PROJET : KL Quanta omputer Inc. Size ocument Number Rev ustom Madison_LVS/HMI/RT switchable Saturday, July, ate: Sheet of
,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, RT_V V V E RV- Layout Note: Setting R,G, trace impedance to ohm. F FUSEV_POLY V *VRISTOR_ RT_V_R.U/V/XR_ INT_RT_RE L KLL RT_R INT_RT_GRE INT_RT_LU R /F_ R /F_ R /F_.P/V/OG_.P/V/OG_ L L.P/V/OG_ KLL KLL.P/V/OG_.P/V/OG_.P/V/OG_ RT_G RT_ TP N RT_ONN ES PROTETION *TVSSVESPT RT_R V RT_G *TVSSVESPT INT_RT_VSYN.U/V/XR_ VGVSYN_R Place near U,U < mil RTVSYN RTHSYN *P/V/OG_ *P/V/OG_ L L H-T-JT H-T-JT P/V/OG_ P/V/OG_ RTVSYN RTHSYN RTVSYN RTHSYN INT_RT_HSYN VGHSYN_R Place near N connector < mil *TVSSVESPT LK V T *TVSSVESPT.K_ R.K_ R RT_V R.K_ R.K_ INT_LK LK V Q NK-T-E *TVSSVESPT R For ES _ RT_ U HTGH R _ *TVSSVESPT U HTGH R _ *TVSSVESPT INT_T T Q NK-T-E *P/V/OG_ *P/V/OG_ PROJET : KL Quanta omputer Inc. Size ocument Number Rev ustom RT ONN ate: Saturday, July, Sheet of E
,,,,,,,,,,,,,,,,,,,,,,,,,,, V,,,,, V VSUS LV,,,,,,,,,, VPU,,,,,, LV,,,,,,,,,,,, V INT_LVS_VEN R K_ V_S R K_ V V R K_ Q PTEU LV_ON Q N LV_R Q O R _.U/V/XR_ Q N R _ U/.V/XR_ OLOR_ENERGY R_EN LVS_RIGHT_PWM INT_EILK INT_EIT INT_TXLOUTN INT_TXLOUTP INT_TXLOUTN INT_TXLOUTP INT_TXLOUTN INT_TXLOUTP INT_TXLLKOUTN INT_TXLLKOUTP V MI_LK MI_T V LV GFX_PWR_SR R K_ R K_ ISPON R _ M_V USP- USP R /J_ MI_V N G_ G_ LV-SFYG G_ G_ G_ *lamp-iode_ GFX_PWR_SR MI_T MI_LK *lamp-iode_.u/v/xr_ FOR ES.U/V/XR_ R _ *U/.V/XR_ back light VPU V, LI# LI# R K_ RV-.U/V/XR_ R *.K_ RV- R K_ ISPON *P/V/NPO_ USP- USP L *LWHNSQL USP- USP U IO IO GN *PJSR V FOR ES INT_LVS_LON R.K_ R K_ *U/V/XR_ Q PTEU L_K_OFF# PROJET : KL Quanta omputer Inc. Size ocument Number Rev ustom L ONN ate: Saturday, July, Sheet of
ore Power ecoupling VIO Power ecoupling V_LN U V_LN,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, VPU V VLN_.U/V/XR_ VLN_.U/V/XR_ L L L V_LN VLN_.U/V/XR_.U/V/XR_.U/V/XR_.U/V/XR_ LMPGSN LN_VL.U/V/XR_.U/V/XR_ LMPGSN LN_GPHYPLLVL.U/V/XR_.U/V/XR_ LMPGSN LN_PIEPLLVL.U/V/XR_.U/V/XR_ VO V V V VL VL VL GPHY_PLLVL PIE_PLLVL PIE_PLLVL M mm x mm -Pin QFN ISVH XTLVH VH VH TR_N TR_P TR_N TR_P TR_N TR_P TR_N TR_P LINKLE# SPLE# SPLE# TRFFILE# LN_ISVH LN_XTLVH LN_VH TRM TRP TRM TRP TRM TRP TRM TRP LN_LINK G_LE# LN_TLE# L L L LMPGSN.U/V/XR_ LMPGSN.U/V/XR_ LMPGSN.U/V/XR_.U/V/XR_ Transformer.U/V/XR_ TRP TRM TRP TRM TRP TRM VLN_V_.U/V/XR_ U T T- TT TT T T- T T- TT MX MX- MT MT MX MX- MX MX- MT MT MT MT R R R /F_ /F_ /F_ X-TXP X-TXN X-TXP X-TXN X-TXP X-TXN V_LN TT MT MT R /F_ PIE_RXP_LN PIE_RXN_LN PIE_TXP_LN PIE_TXN_LN,,, PLTRST# LK_PIE_LNP LK_PIE_LNN.U/V/XR_.U/V/XR_ R _ LN_PIETXP LN_PIETXN -LN_WKEUP PLTRST#_R PIE_TX_P PIE_TX_N PIE_RX_P PIE_RX_N WKE# PERST# PIE_REFLK_P PIE_REFLK_N MOE EELK EET R K/F_ R K/F_.V evice ONLY U WP V SL S V_LN.U/V/XR_ TRP TRM.U/V/XR_ T T- LFE-R.U/V/XR_ MX MX- P/KV/XR_ X-TXP X-TXN LN_ R M/F_ VLN_ GN V R *K_ R *K_ R *_S M-WMNTP TRP TRP U IO GN IO IO REF IO TRM TRM TRP TRP U IO GN IO IO REF IO TRM TRM LN_ISOLTE R _ R R K/F_ K_ VMIN_PRSNT LOW_PWR SR_LX SR_VF SR_LX SR_VF L NRTRM *M-SO *M-SO LN_XTLO_L R Y MHz P/V/NPO_ /F_ P/V/NPO_ V R.K/F_ LN_XTLO LN_XTLI LN_R LK_PIE_LN_REQ#_R XTLO XTLI R LK_REQ# Package ody GN SR_VP SR_V VREGPNP_TL.U/V/XR_ LN REGTL V_LN TP.U/V/XR_.U/V/XR_ U/.V/XR_ RJ onnector V_LN V_LN N R /F_ LN_LINK G_LE#_R LN_LINK G_LE# LE_GRE_P LE_GRE_N X-TXN.U/V/XR_ X-TXP RX- X-TXN RX X-TXN RX- GN X-TXP TX- X-TXP TX GN X-TXN RX X-TXP TX- GN TX GN R /F_ LN_TLE#_R LN_TLE# LE_YEL_P LE_YEL_N,,, PLTRST# LN_ISOLTE U *HTGGW PLTRST#_R.U/V/XR_ JM-N-F V_LN R *K_.V LNV VPU Q PIE_LKREQ_LN# LK_PIE_LN_REQ#_R PTEU LN_ON Q O V_LN V_LN R *K_, PIE_WKE# Q PTEU -LN_WKEUP.U/V/XR_ PROJET : KL Quanta omputer Inc. Size ocument Number Rev ustom LN (M, RJ) Saturday, July, ate: Sheet of
OE(O) MI_LK SPIF_OUT_R Speaker V_OE GN GN T R MI_T LINEOUT_J# FRONT-L FRONT-R R p/v/oh_ MI_LK_R LMH EP L SPIF_OUT NQT-Y-N_ U/.V/XR_ Z_V R R K/F_.K/F_ U X_ FRONT-R MONO-OUT V SURR-L JREF SURR-R VSS N MI-LK/ SPIFO MI-LK/ EP SPIFO.U/V/XR_ *p/v/npo_ V SENSE MI_T_R FRONT-L MI-//GPIO Sense GN.U/.V/XR_ PVEE.U/.V/XR_ P L/ MI-//GPIO HPOUT-L (LQFP-) VSS HPOUT-R ST-OUT IT-LK N VSS Z_SIN ST-IN Z_V MI-VREFO V-IO VREF SYN VSS RESET# V_OE V LINE-VREFO MI-VREFO LINE-VREFO PEEP LINE-R LINE-L MI-R MI-L MI-R MI-L LINE-R LINE-L Sense PEEP HPOUT-L HPOUT-R MI-VREFO *U/.V/XR_ MI-R MI-L SENSE GN R GN MI_R MI_L MI_J# LINEOUT_J# Need Vendor to check serial res. anny Z_RST# Z_SYN R _.U/V/XR_ p/v/npo_ R K/F_ Z_SIN Z_ITLK Z_SOUT *.K/F_ R R R R.U/V/XR_.U/V/XR_ *_/S *_/S *_/S *_/S *p/v/xr_ odec Power(O) R *_/S *p/v/xr_ V GN,,, close to I Earphone(MP) SPIF_OUT_R HPOUT-R HPOUT-L.U/V/XR_ R LINEOUT_J# mils R R R *_ M/F_ /F_ /F_.U/V/XR_ HPOUT-R HPOUT-L R *K_ System MI(MP) MI-VREFO S *P/V/NPO_ L L R *K_.U/V/XR_ Q NK-T-E S KLL_ KLL_ P/V/XR_.U/V/XR_ U/.V/XR_ GN Q NK-T-E mils SPIF_V.U/V/XR_ V_OE V mil L *_ U.U/V/XR_ *U/V/XR_ *U//XR_ Vout Vin GN R _ HPR HPL LINEOUT_J# P/V/XR_ GN YP GN G-TUF Vset=.V GN GN V EN For ES Update footprint to SPIF-FL-JT-F-P-V *.u/v/yv_ N RIVE I ONN_SPIF_OM Normal Open Jack MINON,,,,,,,, H Power(O) *Intel H Either.V_S or V_S V L _ U/.V/XR_ E.U/V/XR_ Z_V.U/V/XR_ Speaker mplifier(mp) Modify for KL rev. V_O mil.u/v/xr_.u/v/xr_ L FMHHM.U/V/XR_ V.U/V/XR_ MI_L MI_R R R R.K_ K_ K_ MI_L MI_R R.K_ L L KLL_ KLL_ MI_L MI_R MI_J# N MI_JK GN U V_O P/V/XR_ P/V/XR_ *.u/v/yv_ Normal Open Jack PGN ROUT INSPKR FRONT-R U/V/XR_ FRONT-R- R _ INSPKR- FRONT-R- ROUT- PVdd RHPIN RLINEIN SE/TL# HP/LINE# VOLUME SEIFF MP_VOLUME MP_FE# R K_ Speaker(MP) GN N GN GN FRONT-L U/V/XR_ U/V/XR_ U/V/XR_ FRONT-L- R _ FRONT-R FRONT-L FRONT-L- RIN Vdd LIN LLINEIN LHPIN SEMX GN U/V/XR_ YPSS MP_FE# FE# MUTE# SHUTOWN# GN GN R *K_ INSPKR INSPKR- INSPKL INSPKL- R R R R KLL_ KLL_ KLL_ KLL_ INSPKRN INSPKR-N INSPKLN INSPKL-N *P/V/NPO_ *P/V/NPO_ *P/V/NPO_ R-L-SPEKERS *P/V/NPO_ PVdd LOUT INSPKL V_O MUTE VOLMUTE# EP R V U TSHFU *_ MUTE# INSPKL- GN LOUT- TPPWPR.U/V/XR_ GN PGN THM_P GN LK,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, V V V MP_VOLUME GN R.K_ R.K_ P EEP SPKR PEEP_.U/V/XR_ R R K/F_ K/F_ V R U NSZ K_ R.U/V/XR_ PEEP.U/V/XR_ K/F_ PROJET : KL Quanta omputer Inc. Size ocument Number Rev ustom L/MP/MI/LINE-OUT Saturday, July, ate: Sheet of
ST H onnector. N ST O onnector.,,, V_S,,,,,,,,,,,,,,,,,,,,,,,,,,, V,,,,,,,,,,,, V V R *_ GN - GN - GN ST_RXN_ ST_RXP_.U/V/XR_.U/V/XR_ ST_TXP ST_TXN ST_RXN ST_RXP V_H V.U/V/XR_ R _ U/V/XR_ O_EN R _.U/V/XR_ R *_ U IN IN EN OUT GN mils VO.U/V/XR_ L PYT-Y-N.U/V/XR_ V_O.V.V.V GN GN GN V V V GN RSV GN V V V V_H V_H V_H Place caps close to connector. R _ V ST_O_PWR_EN R *_ R V_O K_ U/V/XR_.U/V/XR_ GTU mils.u/v/xr_ Place caps close to connector..u/v/xr_.u/v/xr_ U/V/XR_ --L.U/V/XR_ U/V/XR_ Place caps close to connector., O_M# R K_ O_PRSNT# R _ ST_TXP ST_TXN ST_RXN ST_RXP R K/F_.U/V/XR_.U/V/XR_ V_O ST_RXN_ ST_RXP_ N S GN TXP TXN GN RXN RXP GN S P P V V M GN GN P -P E V US E-ST, US_ON V_S U/V/XR_ U EN GN OUT OUT OUT O TPSGNRG mils (Iout=) *P/V/XR_.U/V/XR_ USPWR U/.V_ USP USP- ML LWSNSQL IH_USP_R IH_USP-_R U IO IO *PJSR GN USPWR US_O# danny EST_RX- EST_RX EST_TX- EST_TX U IO IO GN V U IO IO GN V E-ST RE-RIVER *PJSR *PJSR V U MX USPWR.U/.V/XR_.U/V/XR_.U/.V/XR_.U/V/XR_ V V V V V US IH_USP-_R IH_USP_R N US Vcc - GN ST_TXP ST_TXN ST_RXP ST_RXN.U/V/XR_.U/V/XR_ ST_RXP_ ST_RXN_ INP INM OUTP OUTM OUTP OUTM INP INM EST_TX_ EST_TX-_ EST_RX_ EST_RX-_.U/V/XR_.U/V/XR_.U/V/XR_.U/V/XR_ EST_TX EST_TX- R *K_ EST_RX- EST_RX EST_TX EST_TX- EST_RX EST_RX- ST_EN GN - GN Shield - Shield Shield GN Shield V R R V R *K_@N *K_@N K_ ST_EN EN EP_GN GN GN GN GN GN Q *NK E-ST_ON R K_ R K_ PROJET : KL Quanta omputer Inc. Size ocument Number Rev ustom ST H/EST/-ROM Saturday, July, ate: Sheet of