R * SPIF output x Power LO R * R R SPIF input x POR Flash PWM LE x PM00 Lightning() P 0x0 0pin Type connector US 0pin For Lightning & P T0 RE PLY0 PLY H Sel Stereo T0 PLY0 T0 0x PLY 0x PM00 R Ext. MU H Sel T0 RE 0x S0 NE OP R <LOK IGRM> Size ocument Number Rev <oc> <Revode> ate: Wednesday, ugust, 0 Sheet of
VUS V_US_V R US R JP HEER /N GN GN 0/R00 GN GN N -type connector US_INT_Z VUS - + R US- GN 0uF US_REF_M_O 00nF MHz Y N N US_M US_P V_US_V V_US_V V_US_V US_REF_M_O pf/n V_US_V R R 0.k_% US_M US_P R 0 R 0 R US_GPIO_0 US_GPIO_ US_INT_Z R 0 US_GPIO_ US_I_SLVE_SL US_I_SLVE_S 0.uF T0_LQFP_0 V_US_V V_US_V 0 0 U US_SPIF_IN US_R_EXT V US_PHY VSS_US_PHY US_M US_P VSS_US_PLL V US_PLL XTL_IN_MHZ XTL_OUT V XTL VSS_XTL LK_REF_MHZ GPIO_0 GPIO_ INTERUPT_Z VSS_P_ V P_ GPIO_ R 0 0 SPIF EXT R 0 SPIF_IN I_SLVE_SLK_GPIO_0 I_SLVE_ST_GPIO_ PWM_LIGHT_GPIO_ V SPIF_RX VSS_SPIF_RX I_MSTER_ST_GPIO_ I_MSTER_SLK_GPIO_ T0_LQFP_0Pin SS_ORE V ORE V P_ VSS_P_ US_SPIF_OUT SPIF OUT VSS_MPLL V MPLL US_GPIO_ US_GPIO_ GPIO_ GPIO_ V_US_V US_SPIF_OUT0 IS_SLK_OR_S_SLK_IN IS_ST_0_OR_S_RIGHT_ST_IN SPIF_0_OUT V P_ 0 SS_P_ R 0 IS_ST OR_S IN IS_ST OR_S IN IS_ST OR_S IN S IN POR IS_SLR_OR_S_LEFT_ST_IN IS_MLK GPIO_ POR POR POR0 SPI_S_Z_N_POR SPI_TIN_R SPI_WP_Z_N_POR SPI_TOUT_W_N_POR_ SPI_LK_N_POR_0 V P_ VSS_P_ R R R R R0 US_GPIO_ GPIO_ US_SPI_S US_SPI_I US_SPI_WP US_SPI_O US_SPI_LK US_PWM_RIGHT US_PWM_LEFT URT_RX_GPIO_ URT_TX_GPIO_ V LPLL VSS_LPLL VSS_P_ V P_ IS0_MLK_ 0 IS_0_SLK_OR_S0_SLK_OUT IS0_ST_0_OR_S0_RIGHT_ST_OUT IS0_ST OR_S0 OUT IS0_ST OR_S0 OUT IS0_ST OR_S0 OUT S0 OUT IS0_SLR_OR_S0_LEFT_ST_OUT IS_SLR_OR_S_LEFT_ST_OUT IS_T_OR_S_RIGHT_ST_OUT IS_SLK_OR_S_SLK_OUT PWM_LIGHT_RIGHT PWM_LIGHT_LEFT GPIO_ GPIO_ OE_POWER_OWN V P_ VSS_P_ 0 IS_MLK_ US_SPI_S US_SPI_I US_SPI_WP R 00K V_US_V J US_URT_TX US_URT_RX URT POR US_GPIO_ POR US_GPIO_ POR POR0 US_OE_PR N US_URT_RX US_URT_TX R 0 V_US_V R 0 R R0 R R R R R R R 0 V_US_V US_PLY0_MLK US_PLY0_MLK US_PLY0_SK US_PLY0_SK US_PLY0_0_SR US_PLY0_0_SR US_PLY0 S US_PLY0 S US_PLY0 S US_PLY0 S US_PLY0 S US_PLY0 S US_PLY0_S US_PLY0_S US_PLY0_SLR_SL US_PLY0_SLR_SL V_US_V Play 0 output port US_PLY0_MLK US_PLY0_SK US_PLY0_SLR_SL R 0 US_PWM_RIGHT N N N K R US_PLY_MLK LE_PWM US_PLY_MLK Play output port U S V SO HOL WP SK GN SI WX0L R V_US_V 00K SPI_V HOL_Z 00nF US_SPI_LK US_SPI_O SPI Flash J J V_US_V R 0K R 0K R 0K R 0K R0 0K R 0K R 0K R 0K HEER X HEER POR *bit(wp reserved) LE/IP V_US_V V_US_V LE/IP R0 0 R Q US_PWM_LEFT MMT0 K LE_PWM R 0 Q E MMT0 US_GPIO_0 US_GPIO_ PWM_GPIO_ R US_GPIO_0 US_GPIO_ K U E PWM_GPIO_ 0 US_I_MSTER_S US_I_MSTER_SL V_US_V R 0 V_US_V R 0 0 R R R0 US_PLY_SK US_PLY_0_SR US_PLY_SLR_SL US_PLY_MLK US_PLY_SK US_PLY_SLR_SL US_PLY_SK US_PLY_0_SR N N US_PLY_SLR_SL N V_US_V V_US_V LE_00 0 GN V WP SL S R R EEPROM XX /SO- SL_T0 S_T0 RE_US_SK RE_US_0_SR RE_US S RE_US S RE_US S RE_US_S RE_US_SLR_SL RE_US_MLK RE_US_SK RE_US_0_SR RE_US S RE_US S RE_US S RE_US_S RE_US_SLR_SL RE_US_MLK RE input port R 0 V_US_V uf/00 0 0.uF/00 0.uF/00 0.uF/00 uf/000.uf/00 0.uF/00 0.uF/00 0.uF/00 0.uF/00 0.uF/00 0.uF/00 0.uF/00 V_US_V R R K K US_I_SLVE_SL US_I_SLVE_S V_US_V SL_T0 S_T0 SL_T0 S_T0 JUMPERX J.*x US_I_SLVE_SL US_I_SLVE_S US_SPIF_OUT0 0.uF R J ONP N PLY0_SPIF_OUT_T PLY0_SPIF_OUT_T J R JK UTTON0 R SW 0 0.uF UTTON R SW 0.uF R 0.uF UTTON SW R 0.uF UTTON R SW 0.uF UTTON SW R0 K US_I_MSTER_SL US_I_MSTER_S R K SL_T0 S_T0 JUMPERX J.*x US_I_MSTER_SL US_I_MSTER_S US_SPIF_OUT 0.uF R J ONP N PLY_SPIF_OUT_T PLY_SPIF_OUT_T J R JK PUSH UTTON US_GPIO_ US_GPIO_ US_GPIO_ US_GPIO_ US_GPIO_ PUSH UTTON R UTTON0 R UTTON R UTTON R UTTON R UTTON J0 0 PUSH UTTON R R R0 R R PUSH UTTON J 0K 0K 0K 0K 0K PUSH UTTON V_US_V R 0K R 0K R 0K R 0K R 0K US_P US_M For Lighting & _.MM_X VUS R 0 R0 0 P uf J 0 _X_V P_SL R US_I_MSTER_SL P_S R US_I_MSTER_S V_US_V 0 0.uF J R JK R J ONP 0.uF US_SPIF_IN GPIO_ *bit US_GPIO_0 R US_GPIO_ R US_GPIO_ R GPIO_LE0 R0 K GPIO_LE R K GPIO_LE0 GPIO_LE GPIO_LE LE_00 LE_00 J HEER X HEER J R0 0K R R 0K R R 0K R HEER X HEER <T0_LQFP_0pin> V_US_V 0K 0K 0K GPIO_LE R K LE_00 Size ocument Number Rev <oc> <Revode> Wednesday, ugust, 0 ate: Sheet of
T0_PLY0_0x PLY0_SPIF_OUT_T PLY0_SPIF_OUT_T 0.uF PLY0_T_SPIF_IN SPIF_OUT 0.uF R J R JK J US_PLY0_MLK US_PLY0_SK US_PLY0_0_SR US_PLY0 S US_PLY0 S 0 US_PLY0 S US_PLY0_S US_PLY0_SLR_SL ON J US_PLY0_MLK US_PLY0_SK US_PLY0_0_SR US_PLY0 S US_PLY0 S US_PLY0 S 0 US_PLY0_S US_PLY0_SLR_SL Play 0 output port ON T0 IS0, PM port PLY0_SLK PLY0_T Select one to play PLY0_LRK PLY0_S_SLK PLY0_SR_T PLY0_SL_LRK Select two for play T0 IS, S port PLY_M_OUT R0 0 MHz/N Y R T_V_ PLY0_SLK PLY0_T PLY0_LRK XI_T XO_T 0.uF 0 T0_ U IS0_ST/S0_R_IN IS0_SLR/S0_L_IN IS_SLK/S_SLK_IN IS_ST/S_R_IN IS_SLR/S_L_IN GN V ORE VSS ORE VSS_P0 V P0 XTL_IN XTL_OUT LK_REF_OUT/POR# IS0_SLK/S0_SLK_IN IS_SLK/S_SLK_IN IS_ST/S_R_IN IS_SLR/S_L_IN SPIFN_IN/VREF SPIFP_IN SPIF_IN SPIF_IN SPIF_IN SPIF0_IN I_SLK* I_ST* INT_Z* V_P VSS_P 0 VSS_P V_P S_L/IS_SLR_OUT/POR# S_R/IS_ST_OUT/POR# S_SL/IS_SLK_OUT/POR* SPIF_OUT SR_REF_LK_IN# STTUS_OUT SR_FSIN IS_MLK_O/POR0# VSS_P V_P IS_SLK/S_SLK_OUT IS_S/S_R_OUT/POR# IS_SLR/S_L_OUT GN 0 V LPLL VSS LPLL GN GN S_MOE_OUT/POR* IS_MLK_O POR JP HEER /N R R R R T_V_ pf IS_MLK_0 pf pf N IS_SLK_0 IS_T_0 IS_LRK_0 pf POR POR POR POR POR Power On Latch POR#:IS Tx Salve/Master 0/ (Master/Salve) R 0K/N R0 R0R0 R00 0K R0 SL_T0 S_T0 N SL_T0 S_T0 0 N R0.K R0.K POR PLY0_S_SLK PLY0_SR_T PLY0_SL_LRK 0 POR POR POR J0 ON/N uf 0.uF 0.uF 0.uF uf 0.uF T_V_ POR#-#:X'tal 00 (M) 0 (.M) 0 (.M) (.M) POR#-#:I I 00 (x0) 0 (x) 0 (x) (x) 0.uF 0K 0K 0K 0K H/W configuration (POR setting) V PLY0 0uF U V PLY0 V PLY0 J R JK J R JK.nF 0.uF00 00V.uF/00 R 00 R 00 V PLY0.nF 0.uF 0.uF/00.uF/00 V PLY0 0uF R 0 PV PP PGN PM VNEG OUTL OUTR V GN EMP PM00 V 0 LOO XSMT FMT LRK IN K SK FLT 0.uF 0 0.uF _MUTE_PM R0 0K/N R0 LRK_0 T_0 SLK_0 IS_MLK_0 R V PLY0 0.uF V_PLY0 R0 0K XSMT: Hi/Unmute Low/Mute LRK_0 T_0 SLK_0 R R R Reserved for other IS_LRK_0 IS_T_0 IS_SLK_0 J ON/N J JUMPER/N J JUMPER/N V PLY0 L 0/00 V PLY0 L 0/00 0 0.uF uf uf <T0 PLY0_> Size ocument Number Rev <oc> <Revode> Wednesday, ugust, 0 ate: Sheet of
T0 PLY_0x PLY_SPIF_OUT_T 0.uF SPIF0 SPIF_OUT 0.uF R J R R JK J US_PLY_MLK US_PLY_SK US_PLY_0_SR US_PLY_SLR_SL R 0 PLY_SLK R 0 PLY_T R 0 PLY_LRK PLY_SLK PLY_T PLY_LRK 0.uF U IS0_ST/S0_R_IN IS0_SLR/S0_L_IN IS_SLK/S_SLK_IN IS_ST/S_R_IN IS_SLR/S_L_IN IS0_SLK/S0_SLK_IN SPIFN_IN/VREF SPIFP_IN SPIF_IN SPIF_IN SPIF_IN SPIF0_IN 0 VSS_P V_P SPIF_OUT SR_REF_LK_IN# STTUS_OUT SR_FSIN IS_MLK_O/POR0# VSS_P V_P JP HEER /N IS_MLK_O R0 IS_MLK_ pf N R 0K/N R 0K ON/N US_PLY_MLK US_PLY_SK US_PLY_0_SR US_PLY_SLR_SL Play output port RE_M_OUT R 0 T_V_ MHz/N Y 0 N XI_T XO_T N 0 T0_ GN V ORE VSS ORE VSS_P0 V P0 XTL_IN XTL_OUT LK_REF_OUT/POR# IS_SLK/S_SLK_IN IS_ST/S_R_IN IS_SLR/S_L_IN I_SLK* I_ST* INT_Z* V_P VSS_P 0 S_L/IS_SLR_OUT/POR# S_R/IS_ST_OUT/POR# S_SL/IS_SLK_OUT/POR* IS_SLK/S_SLK_OUT IS_S/S_R_OUT/POR# IS_SLR/S_L_OUT S_MOE_OUT/POR* POR POR POR J GN 0 V LPLL VSS LPLL GN GN ON/N POR R R R pf T_V_ IS_SLK_ IS_T_ IS_LRK_ pf pf T_V_ POR POR POR POR POR Power On Latch POR#:IS Tx Salve/Master 0/ (Master/Salve) POR#-#:X'tal 00 (M) 0 (.M) 0 (.M) (.M) POR#-#:I I 00 (x0) 0 (x) 0 (x) (x) R 0K RR0R 0K 0K 0K H/W configuration (POR setting) PLY_M_OUT R POR J pf/n uf 0.uF 0.uF 0.uF uf 0.uF 0.uF SL_T0 S_T0 ON/N SL_T0 S_T0 V PLY J0 R JK J R JK.nF 0.uF00 00V.uF/00 R 00 R 00 V PLY.nF 00 0.uF 0 0uF 0.uF/00.uF/00 V PLY 0uF R 0 U PV PP PGN PM VNEG OUTL OUTR V GN EMP PM00 V 0 LOO XSMT FMT LRK IN K SK FLT V PLY 0.uF 0.uF _MUTE_PM R 0K/N R LRK_ T_ SLK_ IS_MLK_ R V PLY 0.uF V_PLY V PLY XSMT: R Hi/Unmute 0K Low/Mute LRK_ T_ SLK_ R0 R R IS_LRK_ IS_T_ IS_SLK_ Reserved for other J ON/N J JUMPER/N J JUMPER/N V PLY L 0/00 V PLY L 0/00 0 0 0.uF uf 0 uf <T0 PLY_> Size ocument Number Rev <oc> <Revode> Wednesday, ugust, 0 ate: Sheet of
J R JK R R 00K K R0 K 0 00uF/V 00pF V_RE_OP R K R 0K V_RE_OP I- NE R 0 0 0pF R 00 0 00pF IN_R 00uF/V 0 0 0.uF 0 0.uF 0 uf uf U _RST_S IN_L 0 REST# INL IN_R VQ INR V REF_GN _M FILT+ M LRK SLK V GN ST VL MLK M0 R R _V R _VL _MLK _M0 _LRK _SLK _T V_RE R 0K _T GN _IS S0 R JK J R 00K R K R K 0 00pF 00uF/V R0 K R 0K 0.uF 0uF 00 0uF 0.uF 0uF/V I- NE R 0 0pF R 00 00pF IN_L V_ uf 0.uF V_RE R 0K _RST_S V_RE R N _M R V_RE R N _M0 V_RE R _V uf 0.uF _VL uf 0 0 uf 0.uF V_RE_ V_ L 0/00 L V_RE_OP 0 uf 0 0.uF 0/00 0 0 0.uF uf T0 RE_0x J0 _SLK _T _LRK ON/N US_REF_M_O J R JK R R R R 0 R _SLK_T _T_T _LRK_T T_V_ XI_T MHz/N Y 0.uF XO_T 0.uF 0 U SPIF0 IS0_ST/S0_R_IN IS0_SLR/S0_L_IN IS_SLK/S_SLK_IN IS_ST/S_R_IN IS_SLR/S_L_IN GN V ORE VSS ORE VSS_P0 V P0 XTL_IN XTL_OUT LK_REF_OUT/POR# IS0_SLK/S0_SLK_IN IS_SLK/S_SLK_IN IS_ST/S_R_IN IS_SLR/S_L_IN SPIFN_IN/VREF SPIFP_IN SPIF_IN SPIF_IN SPIF_IN SPIF0_IN I_SLK* I_ST* INT_Z* V_P VSS_P 0 VSS_P V_P S_L/IS_SLR_OUT/POR# S_R/IS_ST_OUT/POR# S_SL/IS_SLK_OUT/POR* SPIF_OUT SR_REF_LK_IN# STTUS_OUT SR_FSIN IS_MLK_O/POR0# VSS_P V_P IS_SLK/S_SLK_OUT IS_S/S_R_OUT/POR# IS_SLR/S_L_OUT S_MOE_OUT/POR* R N GN 0 V LPLL VSS LPLL GN GN JP SPIF_RE_IN HEER /N IS_MLK_O R0 RE_MLK_T 0 pf R RE_SLK_T POR R RE_T_T R RE_LRK_T pf pf pf T_V_ T0 IS output port (PM) RE_SLK_T RE_T_T Select one T to record Select two S data for play RE_LRK_T RE_SK_T RE_SR_T RE_SL_T T0 IS0 output, S port J 0 ON J 0 ON RE_US_MLK RE_US_SK RE_US_0_SR RE_US S RE_US S RE_US S RE_US_S RE_US_SLR_SL J Record input port RE_US_SK RE_US_0_SR RE_US S RE_US S RE_US S RE_US_S RE_US_SLR_SL RE_US_MLK _MLK RE_MLK_T ONP RE_M_OUT pf/n N R POR N SL_T0 S_T0 T0_ J ON/N POR Reserved for MI SL_T0 S_T0 0 POR POR POR R R R pf pf RE_SK_T RE_SR_T RE_SL_T pf POR POR POR POR POR Power On Latch POR#:IS Tx Salve/Master 0/ (Master/Salve) R 0K/N R RR R0 R 0K 0K 0 uf 0.uF 0.uF 0.uF uf 0.uF T_V_ 0.uF POR#-#:X'tal 00 (M) 0 (.M) 0 (.M) (.M) POR#-#:I I 00 (x0) 0 (x) 0 (x) (x) 0K 0K 0K H/W configuration (POR setting) <_T0_RE> Size ocument Number Rev <oc> <Revode> Wednesday, ugust, 0 ate: Sheet of
SL_T0 S_T0 JUMPERX J R.K R.K MU_SL MU_S.*x To T0 US_GPIO_0 US_GPIO_ US_GPIO_0 US_GPIO_ MU_S MU_SL R R R R 0.uF P0 P0 P0 P00 K P0 P P P P0 U MU EFM-QSOP P0. P0. P0. P0. P0. P0. P0.0 P0. GN P.0 V P. RST#/K P. /P.0 P. 0 P. P. P. P. P. P.0 P. EFM-QSOP 0 P0 P0 P0 P0 P0 P P P P P P P TX RX R R R R INPUT_SEL0 INPUT_SEL OUT_FREQ0 OUT_FREQ R0 K R K OUT_FREQ JUMPERX SW R00 R0 R0 OUT_FREQ0.*x R0 K K K K R0 K R0 K R0 K R0 K LE_ LE_ LE_ LE_0 0 LE_MU LE_MU LE_MU LE_MU J P P P P0 0.uF P0 P0 R0 K LE_MU R0 K LE_MU R0 0K P0 JP HEER RE:master/ R 0K P0 JP HEER R RE: OUTPUT Fs FREQ SELET K INPUT_SEL0 J HEER X R K INPUT_SEL J HEER X K R N K ISP R K R K P R K P P JUMPERX R 0K R 0K R K P.*x R R K K PLY0 INPUT H SELET R K R0 K PLY INPUT H SELET TX RX J URT SW PUSH UTTON 0 0.uF 0.uF SW PUSH UTTON SW R R 0 0 R R K K MU GPI* <MU> PLY: T0 I/P channel Select Size ocument Number Rev <oc> <Revode> ate: Wednesday, ugust, 0 Sheet of
JP HEER /N V_IN IN V 0uF 0.uF V U0 VIN uf GSXF J/GN VO VO V_ L R 0 0 0.uF 0uF V_US_V 0/R00 0.uF T_V_ L 0/R00 0.uF V 0.uF L ead ohm V_PLY_0 0.uF 0uF U GS-.V IN OUT ody GN V_PLY0 0 0uF 0.uF J ON V_IN 0uF N V 0.uF 0uF uf V 0.uF 0uF 0uF 0 0.uF U GS-.V IN OUT ody GN uf 0uF 0.uF V L V_US_V 0/R00 0/R00 L 0uF 0.uF V 0.uF L0 ead ohm V_PLY_ 0.uF 0uF U GS-.V IN OUT ody GN V_PLY 0 0uF 0.uF VUS 0uF N V V_US_V 0.uF 0uF 0uF uf L 0/R00 0.uF 0uF 0.uF 0uF 0uF V L ead ohm uf 0.uF V_RE_ 0.uF 0 0uF U GS-.V IN OUT ody GN V_RE 0 0uF 0.uF US_Power(V_US) N URRENT 0.!! Power for T0 & T0s temporary JP HEER /N JP0 HEER /N JP HEER /N JP HEER /N JP HEER /N JP S HOLE-V HEER /N S HOLE-V S HOLE-V S HOLE-V <POWER> Size ocument Number Rev <oc> <Revode> ate: Wednesday, ugust, 0 Sheet of