5-V Low Dropout Voltage Regulator TLE7274-2E TLE7274-2D TLE7274-2G Data Sheet Rev. 1.1, 211-11-3 Automotive Power
5-V Low Dropout Voltage Regulator TLE7274-2 1 Overview Features Ultra Low Current Consumption 2 μa Output Voltage 5 V ±2% Output Current up to 3 ma Very Low Dropout Voltage Output Current Limitation Overtemperature Shutdown Wide Temperature Range From -4 C up to 15 C Green Product (RoHS compliant) AEC Qualified Description The TLE7274-2 is a monolithic integrated low dropout voltage regulator for load currents up to 3 ma. An input voltage up to 42 V is regulated to V Q,nom = 5. V with a precision of ±2%. The sophisticated design allows to achieve stable operation even with ceramic output capacitors down to 47 nf. The device is designed for the harsh environment of automotive applications. Therefore it is protected against overload, short circuit and overtemperature conditions by the implemented output current limitation and the overtemperature shutdown circuit. The TLE7274-2 can be also used in all other applications requiring a stabilized 5 V voltage. Due to its ultra low quiescent current of typically 2 µa the TLE7274-2 is dedicated for use in applications permanently connected to V BAT. An integrated output sink current circuitry keeps the voltage at the Output pin Q below 5.5 V even in case of occuring reverse currents. Thus connected devices are protected from overvoltage damage. For applications requiring extremely low noise levels the Infineon voltage regulator family TLE 42XX and TLE 44XX is more suited than the TLE7274-2. A mvrange output noise on the TLE7274-2 caused by the charge pump operation is unavoidable due to the ultra low quiescent current concept. PG-SSOP-14 Exposed Pad PG-TO252-3 PG-TO263-3 Type Package Marking TLE7274-2E PG-SSOP-14 Exposed Pad 7274-2E TLE7274-2D PG-TO252-3 7274-2D TLE7274-2G PG-TO263-3 7274-2G Data Sheet 2 Rev. 1.1, 211-11-3
Block Diagram 2 Block Diagram I TLE7274-2 Q Overtemperature Shutdown Bandgap Reference 1 Charge Pump GND AEB3613.VSD Figure 1 Block Diagram Data Sheet 3 Rev. 1.1, 211-11-3
Pin Configuration 3 Pin Configuration 3.1 Pin Assignment PG-SSOP-14 Exposed Pad GND 1 2 3 4 14 13 12 11 I 5 6 1 9 Q 7 8 TLE7274-2_PINCONFIG_SSOP- 14.SVG Figure 2 Pin Configuration (top view) 3.2 Pin Definitions and Functions PG-SSOP-14 Exposed Pad Pin No. Symbol Function 1,2,3,5,6,7 non connected can be open or connected to GND 4 GND Ground 8,1,11,12,14 non connected can be open or connected to GND 9 Q Output block to ground with a capacitor close to the IC terminals, respecting the values given for its capacitance and ESR in Functional Range on Page 6 13 I Input block to ground directly at the IC with a ceramic capacitor Pad Exposed Pad connect to GND and heatsink area Data Sheet 4 Rev. 1.1, 211-11-3
Pin Configuration 3.3 Pin Assignment PG-TO252-3, PG-TO263-3 GND GND Ι GND Q AEP2512 GND PG-TO263-3-2.vsd Figure 3 Pin Configuration (top view) 3.4 Pin Definitions and Functions PG-TO252-3, PG-TO263-3 Pin No. Symbol Function 1 I Input block to ground directly at the IC with a ceramic capacitor 2 GND Ground internally connected to heat slug 3 Q Output block to ground with a capacitor close to the IC terminals, respecting the values given for its capacitance and ESR in Functional Range on Page 6 Heat Slug Heat Slug internally connected to GND; connect to GND and heatsink area Data Sheet 5 Rev. 1.1, 211-11-3
General Product Characteristics 4 General Product Characteristics 4.1 Absolute Maximum Ratings Absolute Maximum Ratings 1) = -4 C to 15 C; all voltages with respect to ground, (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Test Condition Min. Max. Input I 4.1.1 Voltage -.3 45 V Output Q 4.1.2 Voltage V Q -.3 6 V 4.1.3 Voltage V Q -.3 6.2 V t < 1 s 2) Temperature 4.1.4 Junction temperature -4 15 C 4.1.5 Storage temperature T stg -5 15 C ESD Susceptibility 4.1.6 Human Body Model (HBM) 3) Voltage - 3 kv 4.1.7 Charged Device Model (CDM) 4) Voltage - 1.5 kv 1) not subject to production test, specified by design 2) exposure to these absolute maximum ratings for extended periods (t > 1 s) may affect device reliability 3) ESD susceptibility Human Body Model HBM according to AEC-Q1-2 - JESD22-A114 4) ESD susceptibility Charged Device Model CDM according to ESDA STM5.3.1 Note: Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note: Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as outside normal operating range. Protection functions are not designed for continuous repetitive operation. 4.2 Functional Range Pos. Parameter Symbol Limit Values Unit Remarks Min. Max. 4.2.1 Input voltage 5.5 42 V 4.2.2 Output Capacitor s C Q 47 nf 1) 4.2.3 Requirements ESR(C Q ) 1 Ω 2) 4.2.4 Junction temperature -4 15 C 1) the minimum output capacitance requirement is applicable for a worst case capacitance tolerance of 3% 2) relevant ESR value at f =1kHz Note: Within the functional or operating range, the IC operates as described in the circuit description. The electrical characteristics are specified within the conditions given in the Electrical Characteristics table. Data Sheet 6 Rev. 1.1, 211-11-3
General Product Characteristics 4.3 Thermal Resistance Note: This thermal data was generated in accordance with JEDEC JESD51 standards. For more information, go to www.jedec.org. Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max. TLE7274-2E (PG-SSOP-14 Exposed Pad) 4.3.1 Junction to Case 1) R thjc 14 K/W measured to exposed pad 4.3.2 Junction to Ambient 1) R thja 47 K/W 2) 4.3.3 R thja 141 K/W footprint only 3) 4.3.4 R thja 66 K/W 3 mm² heatsink area 3) 4.3.5 R thja 56 K/W 6 mm² heatsink area 3) TLE7274-2D (PG-TO252-3) 4.3.1 Junction to Case 1) R thjc 6 K/W measured to tab 4.3.2 Junction to Ambient 1) R thja 32 K/W 2) 4.3.3 R thja 115 K/W footprint only 3) 4.3.4 R thja 62 K/W 3 mm² heatsink area 3) 4.3.5 R thja 47 K/W 6 mm² heatsink area 3) TLE7274-2G (PG-TO263-3) 4.3.1 Junction to Case 1) R thjc 6 K/W measured to exposed pad 4.3.2 Junction to Ambient 1) R thja 27 K/W 2) 4.3.3 R thja 75 K/W footprint only 3) 4.3.4 R thja 47 K/W 3 mm² heatsink area 3) 4.3.5 R thja 38 K/W 6 mm² heatsink area 3) 1) Not subject to production test, specified by design. 2) Specified R thja value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The Product (Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm³ board with 2 inner copper layers (2 x 7µm Cu, 2 x 35µm Cu). Where applicable a thermal via array under the exposed pad contacted the first inner copper layer. 3) Specified R thja value is according to Jedec JESD 51-3 at natural convection on FR4 1sp board; The Product (Chip+Package) was simulated on a 76.2 114.3 1.5 mm 3 board with 1 copper layer (1 x 7µm Cu). Data Sheet 7 Rev. 1.1, 211-11-3
Electrical Characteristics 5 Electrical Characteristics 5.1 Electrical Characteristics Voltage Regulator Electrical Characteristics =13.5 V; = -4 C to 15 C; all voltages with respect to ground (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Measuring Condition Min. Typ. Max. Output Q 5.1.1 Output Voltage V Q 4.9 5. 5.1 V.1 ma < <3 ma 6V< <16V 5.1.2 Output Voltage V Q 4.9 5. 5.1 V.1 ma < <1 ma 6V< <4V 5.1.3 Dropout Voltage V dr 25 5 mv =2mA 1) V dr = V Q I 2 3 μa I =.1mA I 4 μa I =.1mA 5.1.4 Load Regulation ΔV Q, lo 4 15 4 mv = 5 ma to 25 ma 5.1.5 Line Regulation ΔV Q, li 2 5 2 mv V l = 1 V to 32 V =5mA 5.1.6 Output Current Limitation 31 ma 1) 5.1.7 Output Current Limitation 8 ma V Q =V 5.1.8 Power Supply Ripple Rejection 2) PSRR 6 db f r =1Hz; V r =.5Vpp 5.1.9 Temperature Output Voltage Drift dv.5 mv/k ---------- Q dt Current Consumption 5.1.1 Quiescent Current I q = I I q Q =25 C 5.1.11 Quiescent Current I q = I I q Q 8 C 1) Measured when the output voltage V Q has dropped 1 mv from the nominal value obtained at = 13.5 V. 2) not subject to production test, specified by design Data Sheet 8 Rev. 1.1, 211-11-3
Electrical Characteristics 5.2 Typical Performance Characteristics Voltage Regulator Current Consumption I q versus Junction Temperature T J Current Consumption I q versus Input Voltage Q 1_Iq-Tj.vsd 3_IQ-VI.VSD I q [µa] = 13.5V I q [µa] Tj = 25 C 1 = 1 µa 4 1 1 3 2 1 =.2mA = 5mA = 1mA.1-4 -2 2 4 6 8 1 12 14 [ C] 1 2 3 4 Current Consumption I q versus Output Current Output Voltage V Q versus Junction Temperature T J I q [µa] 3 = 13.5 V 2_IQ-IQ.VSD V Q 5A_VQ-TJ.VSD = 13.5 V 2 = -4 C 5.5 15 5. =1µA...1mA 1 4.95 5 4.9 1 2 3-4 -2 2 4 6 8 1 12 14 [ C] Data Sheet 9 Rev. 1.1, 211-11-3
Electrical Characteristics Dropout Voltage V dr versus Output Current Maximum Output Current versus Junction Temperature 6 6_VDR-IQ.VSD 62 8_IQMAX-TJ.VSD V dr [mv] = 13.5 V = 15 C 4 58 3 56 2 = -4 C 54 1 52 1 2 3 5-4 -2 2 4 6 8 1 12 14 [ C] Dropout Voltage V dr versus Junction Temperature Maximum Output Current versus Input Voltage 6 7_VDR-TJ.VSD 6 9_SOA.VSD V dr [mv] = 125 C lim 4 = 25 ma 4 3 = 15mA 3 2 2 1 1 = 1 ma -4-2 2 4 6 8 1 12 14 [ C] 1 2 3 4 Data Sheet 1 Rev. 1.1, 211-11-3
Electrical Characteristics Region of Stability Output Voltage V Q Start-up behavior 1 ESR CQ [Ω] 12_ESR-IQ.VSD C Q = 47nF...1 µf V Q 14_VI-time_startup.vsd 1 EN = HIGH 5.5 I Load = 5mA 1 5. Stable Region 4.9.1 4.8.1 5 1 15 2 1 2 3 4 5 t [ms] Power Supply Ripple Rejection PSRR versus Frequency f Load Regulation ΔV Q versus Output Current Change Δ 8 PSRR [db] 13_PSRR.VSD ΔV Q [mv] 18a_dVQ-dIQ_Vi6V.vsd = 6V 6 = 3 ma =.1 ma -1 = -4 C 5 = 1 ma -15 4-2 3 V RIPPLE = 1 V N = 13.5 V C Q = 1 µf Tantalum -25 = 15 C 1 1 1k 1k 1k f [Hz] -3 5 1 15 25 Δ Data Sheet 11 Rev. 1.1, 211-11-3
Electrical Characteristics Load Regulation ΔV Q versus Output Current Change d Line Regulation ΔV Q versus Input Voltage Changed ΔV Q [mv] 18b_dVQ-dIQ_Vi135V.vsd = 13.5V ΔV Q [mv] = 1mA = 1mA = 1mA 19_dVQ-dVI 15C.vsd =15 C -1-2 -15 = -4 C -3-2 -4-25 = 15 C -5 = 2mA -3 5 1 15 25 Δ -6 5 1 15 2 25 3 35 4 45 Δ Load Regulation ΔV Q versus Output Current Change Δ Line Regulation ΔV Q versus Input Voltage Changed ΔV Q [mv] 18c_dVQ-dIQ_Vi28V.vsd = 28 ΔV Q [mv] 19_dVQ-dVI_25C.vsd -1-15 -2-3 = 1mA = 1mA = 1mA = 2mA -2 = -4 C -4-25 = 15 C -5-3 5 1 15 25 Δ -6 5 1 15 2 25 3 35 4 45 Δ Data Sheet 12 Rev. 1.1, 211-11-3
Electrical Characteristics Line Regulation ΔV Q versus Input Voltage Change Load Transient Response Peak Voltage ΔV Q ΔV Q [mv] 19_dVQ-dVI_-4C.vsd =4 C 2_Load Trancient vs time 125.vsd -2 = 1mA = 1mA = 1mA 1 = 125 C = 13.5 V -3-4 = 2mA V Q 5.1 5. -5 4.9 4.8-6 5 1 15 2 25 3 35 4 45 8 16 24 t [µs] Δ Load Transient Response Peak Voltage ΔV Q Line Transient Response Peak Voltage ΔV Q 2_Load Trancient vs time 25.vsd 21_Line Trancient vs time 25.vsd 1 = 13.5 V 15.5 13.5 11.5 V Q 5. V Q 5.5 4.9 5. 4.8 4.95 8 16 24 t [µs].8 1.6 2.4 t [ms] Data Sheet 13 Rev. 1.1, 211-11-3
Electrical Characteristics Line Transient Response Peak Voltage ΔV Q I 15.5 21_Line Trancient vs time 125.vsd = 125 C 13.5 11.5 V Q 5.5 5. 4.95.8 1.6 2.4 t [ms] Data Sheet 14 Rev. 1.1, 211-11-3
Package Outlines 6 Package Outlines.65....1 Stand Off (1.45) 1.7 MAX. C.8 C.35 x 45 3.9 ±.1 1).1 C D.19 +.6.64 ±.25 8 MAX..25 ±.5 2).15 M C A-B D 14x D 6 ±.2.2 M D 8x Bottom View 14 1 7 8 A B.1 C A-B 2x 4.9 ±.1 1) Exposed Diepad 3 ±.2 1 7 14 8 2.65 ±.2 Index Marking 1) Does not include plastic or metal protrusion of.15 max. per side 2) Does not include dambar protrusion PG-SSOP-14-1,-2,-3-PO V2 Figure 4 PG-SSOP-14 Exposed Pad Data Sheet 16 Rev. 1.1, 211-11-3
Package Outlines 9.98 ±.5 6.22 -.2 1 ±.1 (4.24).15 MAX. per side 4.57 6.5 +.15 -.5 A 5.4 ±.1 (5).8 ±.15 3x.75 2.28 ±.1.25 M A B B +.2.9 -.1...15.51 MIN. +.5 2.3 -.1.5 +.8 -.4 +.8.5 -.4.1 B All metal surfaces tin plated, except area of cut. GPT9277 Figure 5 PG-TO252-3 Data Sheet 17 Rev. 1.1, 211-11-3
Package Outlines (15)...3 9.25 ±.2 1 ±.3 1 ±.2 8.5 1) 7.55 1) A 1.3 ±.3 1.27 ±.1 B.5 2.4.1 4.7 ±.5 2.7 ±.3 4.4...15 1.5.5 ±.1.75 ±.1 2.54 8 MAX. 5.8.25 M A B.1 B 1) Typical Metal surface min. X = 7.25, Y = 6.9 All metal surfaces tin plated, except area of cut. GPT985 Figure 6 PG-TO263-3 Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-2). For further information on alternative packages, please visit our website: http://www.infineon.com/packages. Dimensions in mm Data Sheet 18 Rev. 1.1, 211-11-3
Revision History 7 Revision History Revision Date Changes 1.1 211-11-3 updated version data sheet: (no change in function or design of device) Package TO263-3 corrected to TO263-3-2. in Overview on Page 2 Package Drawing corrected. in Pin Assignment PG-TO252-3, PG-TO263-3 on Page 5 Pin Assignment for TO263-3 corrected and Headlines added. in Figure 6 PG-TO263-3 on Page 18 Package Outlines corrected in Electrical Characteristics Voltage Regulator on Page 8, former Item 5.1.12 Current Consumption, Regulator Disabled removed, in Condition of Item 5.1.1 and Item 5.1.11 V EN = 5 V removed: Non relevant information as TLE727-2 does not implement Enable Feature 1. 29-6-1 initial version data sheet Data Sheet 19 Rev. 1.1, 211-11-3
Edition 211-11-3 Published by Infineon Technologies AG 81726 Munich, Germany 211 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.