OTG_FS_VBUS OTG_FS_N OTG_FS_P OTG_FS_ID OTG_FS_OC OTG_FS_PWR OTG_FS_VBUS OTG_FS_N OTG_FS_P OTG_FS_ID OTG_FS_OC OTG_FS_PWR OLLO_SLEEP OLLO_SLEEP

Similar documents
Project: Date. Version. Items V1.01 C C. SIM Technology TITLE DRAWN BY PORJECT. SIM800C+SIM28M_VTS Reference CONTENT VER CHECKED BY SIZE V1.

J1B B1 B3 B5 B7 B9 B11 B13 B15 B17 B19 B21 B23 B25 B27 B29 B31 B33 B35 B37 B39 B41 B43 B45 B47 B49 B51 B53 B55 B57 VCC VCC USB_DET

AS1117M3 or LM1117MPX-ADJ ADJ. C20 0.1uF + C56. + C57 10uF. 10 uf R K 1% R18 GND 10.0K 1%

LED POWER STAGE1 NOT_EN LED+ PWM LED- 12V. LED Power Stage LED POWER STAGE2 NOT_EN LED+ PWM LED- 12V. LED Power Stage LED POWER STAGE3 NOT_EN LED+ PWM

C uF T16 VDD T15 TMS TMS MCU_PORT_VDD T14 TDO TDO T13 JCOMP JCOMP PF3 T12 PF3 T11 VDDE3 5.0V PF4 T10 PF4 PJ5 PJ5 PF6 PF6 PF9 PF9 5.0V 5.

Intel Edison. 7V to 15V Brick Power Supply. 4.4V power supply and battery recharger UART 1 USB 0TG. EDISON BREAKOUT BOARD Title Title page

CP2102 TESTAMATIC SYSTEMS POWER 5V TO 3.3V SECTION PINOUT CHECK DECOUPLING CAPACITORS. Btype USB connector TSPL_PPS_1 2.2

LO_TX LO_TX MIXER_OUT MIXER_OUT VCC5V VCC5V VCC3V3 VCC3V3 VCC5V_TX VCC5V_TX VCC5V VCC5V VCC12V_TX VCC12V_TX VCC3V3 VCC3V3 AGND

Headers for all pins sorted by pin no. (unpopulated) TSX-1001 Cortex-M0. Oscillator 44MHz

LED_POWER_STAGE1 PWM GND ADJ LED- -12V R2 RA. LED Power Stage LED_POWER_STAGE2 PWM GND ADJ LED- -12V R4 RB. LED Power Stage LED_POWER_STAGE3

AS1117M3 or LM1117MPX-ADJ REG_VDD ADJ. C20 0.1uF U6. + C57 10uF R K 1% GND 3.92K 1%

VCC 52 VCC 21 AVCC PF0(ADC0) 60 PF1(ADC1) 59 PF2(ADC2) 58 PF3(ADC3) 57 PF4(ADC4/TCK) 56 PF5(ADC5/TMS) 55 PF6(ADC6/TDO) 54 PF7(ADC7/TDI) SCL TXD

Design Overview. Page 2 Power,Flash,SDcard User switch,reset switch. Page 3 Ethernet. Page 4 Audio. Page 5 USB. Page 6 JTAG,BOOTSW,LED,Header

0603/15p/10v L R/100MHz. 100nF/50V. 100nF/16V. 100nF/50V C105 C106 C108 C107 GND GND GND GND

CD-DET TP5_CS- LCDPWR RFPWR CHPD5 GP05 GP25 RST5 L13 D12 D11 D10 LCD_MISO LCD5_MOSI LCD5_SCK SD5_CS- LCD_MISO LCD5_MOSI LCD5_SCK SD5_CS-

KEIm Baseboard. PAGE DESCRIPTION 1 Block Diagram, History 2 SoM Connector. 3 LCD Connector. 4 Ethernet. 5 UART 6 Analog 7 Peripheral 8 Power

VCC 21 VCC 52 AVCC PF0(ADC0) 60 PF1(ADC1) 59 PF2(ADC2) 58 PF3(ADC3) 57 PF4(ADC4/TCK) 56 PF5(ADC5/TMS) 55 PF6(ADC6/TDO) 54 PF7(ADC7/TDI) SCL TXD

Power. Video out. LGDC Subsystem

RSC CHIP VDD P05 P03 P01 P04 VDD GND PWM0 AVDD VDD AVDD P0-2 P0-5 P0-1 P0-6 P0-4 P0.3 GND P00. Y1 3.58MHz P00 P01 AGND P01 P00 P02 P02 P07 P0-0 P0-7

Host MSP430. dacqs_host_board 12/7/2016 9:26 PM. U1 Value +3V3 AVCC_HOST UART_1_TX UART_1_RX MSP_SCLK UART_2_TX UART_2_RX CUTDOWN_EN MSP_SS

Block Diagram. Level Translators USB ICSP. Ethernet PoE. Atmega 32U4. 16MHz. User button Reset 32U4. Headers. Reset. Wi-Fi Module. Leds.

B0549-SCH-01 RD VEGA STDP4028 (DVI to DPTx) Reference Design PCB# Revision History

L13X DAUGHTER CARDS TABLE OF CONTENTS REV SL NO. TABLE OF CONTENTS VERSION VERSION HISTORY BLOCK DIAGRAM 4 UART-0 INTERFACE

Revisions. 2 Notes. 4 FXLC95000CL / MCU Circuit 5 Power and Battery Charger Circuit. KITFXLC95000EVM Drawn by:

05 - Adaptacion Puerto Serie RXD_UC R35 0 DTR_UC R36 0 RI_UC Adaptacion Puerto Serie Señalizacion GSM R37 0 INFO_NETLIGHT R38 0

[1] [1] C7 10nF. C4 10nF SCL [2] SDA [2] CS_SD PWR_PRSNT [4] INT_BTN0 [2] INT_BTN1 [2] LOADER_EN [4] [1] TXLED [1] J11 [1] RST +3V3 RST

THE UNIVERSITY OF NEWCASTLE University Drive Callaghan NSW 2308 Australia

X-USBPD-C-SHIELD. 2 Block Diagram 3 Type-C Connector 4 USB3/USB2 5 PTN5110 PD TCPC 6 Shield Headers 7 PD Source and Sink LS 8 3V3, 5V0, 1V8 Supplies

P&E Embedded Multilink Circuitry

#1 10P/DIL NORTH #3 #3 #3 #3 #3 #3 #3 #3 R198 RES0603 RES0603 DNP DNP DNP RES0603 RES0603 RES SDI_N 3-SDO_N 3-ALERT_N 3-CS_N 3-SCLK_N 3-CONV_N

nrf52840-mdk V1.0 An Open-Source, Micro Development Kit for IoT Applications using the nrf52840 SoC Revision History Function Description Page Rev.

Revisions. TWR-LCD-RGB Drawn by: Initial Release 15-JUL-11

XR21B1422/1424 POWER & USB 1.0 Date: Thursday, February 13, 2014

PS2_B_CLOCK PS2_B_DATA PS2_A_CLOCK PS2_A_DATA UART_C_RXD UART_B_RXD UART_A_RXD UART_C_TXD UART_B_TXD UART_A_CTS UART_A_TXD UART_A_RTS GPIO[0:31]

ISA INTERFACE & POWER SELECTION Size Document Number Rev Custom. XR82C684 EVAL BOARD 1.2 Date: Monday, August 13, 2007 DO NOT INSTALL CON_AT62B

CAN 1 CAN 2. CoiNel Technology Solutions LLP GND GND GND GND GND GND J1 JUMPER J2 JUMPER. 100nF. 100nF R2 120 R1 120 VDD 3 CAN1_H CAN2_H

PLAY0 CT7601 QFN48 REC ADC REC. Power LDO RCA RCA RCA*2. Ext. MCU RCA*2. SPDIF output. PWM LED x 2 POR. SPDIF input x 1 Flash. connector.

JS3 VDDA PTA7/KBD7. Jmp VSSA PTA6/KBD6 PTA5/KBD5 PTA4/KBD4 PTA3/KBD3 PTA2/KBD2 PTA1/KBD1 33 FP-1 PTA0/KBD0 VSSAD PTC3 VDDAD

Realtek Semiconductor Corp. Title RTL8213(M)_FHG_V1.0

Renesas Starter Kit for RL78/G13 CPU Board Schematics

Desired Part Placement. Max current set to 3A (motor Drive is 2.5A) SCI-DRV8814-MVK Mike Claassen B1 Dawn Ritz 40V. VDC_In GND. Board Test Points TP1

S08P-LITE. 1 Title Page 2 Block Diagram 3 MCU & Arduino Headers 4 OSBDM & Power Supply 5 On-board Peripherials S08P-LITE. 23-Jun-17. V3.

01 TITLE PAGE 02 MCU 03 DEBUG INTERFACE 05 POWER BRIDGE 06 MOSFET DRIVERS / VI SENSING XSKEAZ128REFDES

AD2_BUSY AD2_DIN AD2_DOUT AD2_/CS AD1_/CS AD1_DOUT AD1_DIN AD_SCLK AD_CCLK AD_OSC_EN AD1_BUSY AD_CONVERT GNDIO - P115

DAC PLAY0 PLAY0 CT7601 DAC REC ADC REC RCA * 2. Power LDO RCA. RCA * 2 SPDIF output x2 RCA RCA RCA. Ext. MCU POR. PWM LED x 2. SPDIF input x 1.

3 Different test points used in design: TPx - Test point pad. TPHx - Through Hole Pad Large (for standard 0.1" header). Also used on IO Matrix (IOMx)

Quickfilter Development Board, QF4A512 - DK

Revisions. TRK-KEA128 Drawn by: Nov Original Release A. INZUNZA

DP CoiNel Technology Solutions LLP GND GND GND GND. ETH_RST is connected to P1.28 GND GND GND GND GND GND GND GND GND ED 1. Vcc O 3 GND IOGND 35

Generated by Foxit PDF Creator Foxit Software For evaluation only.

FREEDOM KE02Z. 1 Title 2 Block Diagram 3 KE02Z MCU. 4 OpenSDA INTERFACE. 5 I/O Headers and Power Supply. Initial Draft 02/01/13

1K21 LED GR N +33V 604R VR? 1K0 -33V -33V 0R0 MUTE SWTH? JA? T1 T2 RL? +33V 100R A17 CB? 1N N RB? 2K0 QBI? OU T JE182 4K75 RB? 1N914 D?

For max 243 R2OUT is low when R2IN is disconnected enabling the MAX 489 (RS-485) This will not work if MAX232 is used!

U1-1 R5F72115D160FPV

EFM8BB3 USB Type-C 60 W Charger. Revision History. Board Function. Rev. Description. Title Page. A00 Prototype version. EFM8BB3 & User Interface

MSP430F16x Processor

CLKOUT CLKOUT VCC CLKOUT RESOUT OSCOUT ALE TEST AD0 66 AD2 INT0 INT0 AD INT1 AD INT2/INTA0 AD5 AD7 AD7 INT AD8 AD8 AD10

Changed in Rev.3. Title. Revision: Size: A4 Number:

COVER PAGE, TOP 04 ~ 05 VGA, LED, 7SEGMENT

core Tiny6410.sch DM9000 DM9000-etc.sch AC97 AC97-etc.sch USB HUB USB-HUB.sch Tiny6410SDK 1103

Built on Dec /1/2018 Rev00. Project:STM32L4 Quadcopter Description: Quadcopter Control Board ...

ALEX +12VBUS PTC 1A J17 PTTOUT U1B 3V3 C IO_VB1N1_14/DIFFIO_L10p/FLASH_nCE/nCSO FLAGB NCS0 SLWR RUP3

SVS 5V & 3V. isplsi_2032lv

DISPLAY 1 DISPLAY 2 a. a b. a f. a f. b g. c d. c d. 16 x 2 HD44780 BASED ALPHANUMERIC DISPLAY LCD 16 X 2

Virtex 5 FF1760 DUT. Differential SMA Clocks 2X D. Single Ended Socket Clocks 2X. Upstream Connector. Upstream. Power Bus and Switches 5V

YROTATE-IT-RX23T YROTATE-IT-RX23T_3-10.SCH YROTATE-IT-RX23T YROTATE-IT-RX23T_9-10.SCH. Date APR, 29, 2015 Sheet.0 OF

EFM32 Tiny Starter Kit. EFM32 Tiny Starter Kit. Revision History. Page. Board Function. Rev. Description. Title Page 1 A00.

Maintenance Manual: TSV Accumulator

TABLE OF CONTENTS: PAGE 1: MAIN POWER PAGE 2: 12V SUPPLY GOLF CART MOTOR PAGE 3: ELECTRICAL CABINET PAGE 4: BRAKE/ WICKED RELAYS

IO_RX_05 IO_RX_00 IO_RX_04 IO_RX_03 IO_RX_02 U8-A IF1P_RX. 33pF. 33pF 33pF. IF1N_RX 200ohm ustrips U8-D 5 ANA_DEC C63 C59 C61 C64 C62. 33pF. 0.

Audio Mod RF-04-N-10 PC13 BAS85 56 PG1 PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PC8 PC9 PC10 PC11 PC12 PG0 57 PG2 87 PG3 88 PG4 89 PG5 90 PG6 91 PG7 92 PG8

D28 D28 1N4001 1N4001 R301 R375 R k. 10k R82 R82. 47k. 47k USB_IN. 20k. 20k R87 R87 +3V. C uF. C uF GND +1V8. C uF.

HOSCO HOSCI AS M AS M C1 18P C2 18P C1 18P C2 18P GND VCC3 GPIOK7 R82 R82 10K A20 10K. #OffHook. FmHook #TRANSLED. VxBP 0.1U 0.

HF SuperPacker Pro 100W Amp Version 3

Audio Mod RF-04-N-10 PC13 BAS85 56 PG1 PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PC8 PC9 PC10 PC11 PC12 PG0 57 PG2 87 PG3 88 PG4 89 PG5 90 PG6 91 PG7 92 PG8

FREEDOM KL26Z. Table of Contents 1 Title 2 Block Diagram 3 KL26Z MCU. 4 OpenSDA INTERFACE. 5 I/O Headers and Power Supply FRDM-KL26Z.

NOTE: please place R8 close to J1

Note: Please refer to AX110xx Network SoC Application Design Note for more detailed information.

POSWD0SWO POKBD0ROW0A GND POSDIO0D3 POLCD0NOE

XIO2213ZAY REFERENCE DESIGN

DO NOT POPULATE FOR 721A-B ASSY TYPE

REVISION HISTORY DESCRIPTION INITIAL SCHEMATIC AIY REMOVED ANALOG SWITCHES CHANGED FEEDBACK

ALEX +12VBUS PTC 1A J17 PTT U1B. 126 IO_VB1N1_14/DIFFIO_L10p/FLASH_nCE/nCSO FLAGB NCS0 SLWR. IO_VB1N1_9/DIFFIO_L7p/DQS2L/CQ3L/CDPCLK0 RUP3

XO2 DPHY RX Resistor Networks

Dev Board for CC IMX28. Mechanicals Board Size should be 7 X 8 inches Group similar connections together (ENET, USB, UART, etc) H5 ANT1

FRDM-KL27Z. 1 Title 2 Block Diagram 3 KL27Z MCU. 4 OpenSDA INTERFACE. 5 I/O Headers and Power Supply. Rev Description Date Approved

Revision History. EFM32PG12 Pearl Gecko STK. Description. Board Function Page. EFM32PG12 Pearl Gecko Starter Kit. Title Page 1.

Power. I/O Extensions. CPU Extensions. JADE-D Subsystem

2 Notes 3 MC9S08LG32CLK 4 Touch Sensors 1 5 Touch Sensors 2 6 Power 7 OSBDM 8 USB COM

Reference Schematic for LAN9252-SPI/SQI+GPIO16 Mode

+12V R16 100K +12V R17 100K R19 R18 100K 100K AVPP BVPP C21. C20 0.1uF. 0.1uF NOTES:

CS P/N A042C868 SS P/N A042F943 TB-6 TB-8 TB-11 TO PUMP CONTROLLER TB-311 TB-312 TB V +10V +10V +10V LED 59 K23 LED 60 LED 58 LED 47 K15

AML7266-H. Feature table. Block Thursday, February 12, 2009 AMLOGIC AML7266-H. Main Chip: Internal: Video: Audio: Interfaces: UART USB HOST RJ45

Block Diagram SGTL5000 PG. 3. Power PG. 8. Communication PG.6. I2S Signals PG.7. Analog Inputs PG.4. Analog Outputs PG.5.

TO PUMP CONTROLLER TB-304 TB-311 TB-312 TB-302 TB V +10V LED 59 K23 +10V +10V LED 60 LED 58 LED 47 K15 U18(P2) U14(P1) U18(P0) U18(P1) +10V

12V SMPS_1_2 SMPS_4/5 SMPS6 VDD_CORE VDD_MPU VDD_DSP 5V0 PS_3V3 VDD_3V3 5V0 .01, C2 5V0_SNS 10.2K,1% 100uF,10V 1.91K PS_3V3 .

PTN3356 Evaluation and Applicaiton Board Rev. 0.10

Revisions. TWR-MEM Drawn by: Convert into FSL template 9/8/09

P/N A042C868 TO PUMP CONTROLLER TB-307 TB-311 TB V +10V +10V LED 59 K23 +10V LED 60 LED 47 LED 58 K15 U18(P2) U14(P1) U18(P1) U18(P0) +10V

M13 M14 FQP FFP VC1 VC2 VC3 MIX ATNEXPOT ADSR1 BM-VCF FAH1 FAW1 H W ATNEXPOT LFO FAH2 FAW2 H W +10VR FFP BP FQP FAH1 FAW1 FAH2 FAW2 R2 100K M15

Transcription:

MU ROOTIS / ORO MU_NRESET R_[0..] R_[0..] R_ R_ R_ R_ R_ R_0 R_0 R_ R_ R_ R_ R_ R_ OTG_S_VUS OTG_S_N OTG_S_P OTG_S_I OTG_S_O OTG_S_PWR OTG_S_I OTG_S_N OTG_S_P OTG_S_O OTG_S_VUS UT_USER UT_USER SW_USER SW_USER N_RX N_TX N_TX N_RX MPU_SPI_INT OTG_S_PWR JTMS_SWIO JTK_SWLK JTO_SWO JTI JTMS_SWIO JTK_SWLK JTI JTO_SWO XL_RX XL_TX XL_IR USER_URT_TX USER_URT_RX TEST_PIN R_ R_ UT_USER SW_USER R_ R_ SYS_STS_LE SYS_USER_LE R_ R_ SYS_USER_LE UT_USER R_ R_ R_0 SW_USER SYS_USER_LE SYS_USER_LE OLLO_S OLLO_S OLLO_S OLLO_S OLLO_S0 OLLO_S MU_NRESET OLLO_S OLLO_S OLLO_S OLLO_S OLLO_S OLLO_S0 XL_RX XL_TX XL_IR USER_URT_RX USER_URT_TX SYS_STS_LE MPU_SPI_S MPU_SPI_LK MPU_SPI_SI MPU_SPI_SO MPU_SPI_INT TEST_PIN TEST_PIN TEST_PIN TEST_PIN TEST_PIN TEST_PIN[..] MPU_SPI_S MPU_SPI_LK MPU_SPI_SO MPU_SPI_SI TEST_PIN TEST_PIN TEST_PIN TEST_PIN0 TEST_PIN TEST_PIN UZZER_SIG XL_PWR_EN UZZER_SIG XL_PWR_EN TEST_PIN TEST_PIN TEST_PIN TEST_PIN _T_PWR_IN _T_PWR_IN SYS_USER_LE SYS_USER_LE SYS_USER_LE SYS_USER_LE OLLO_S OLLO_S OLLO_S OLLO_S OLLO_S OLLO_S0 USER_URT_RX USER_URT_TX OLLO_S OLLO_S OLLO_S OLLO_S OLLO_S0 OLLO_S TEST_PIN TEST_PIN USER_URT_RX USER_URT_TX OLLO_SLEEP OLLO_SLEEP VoV_MU VoV VoV VoV_MU VoV VoV V_RE+ VoV RT_T OTG_S_O N_TX JTMS_SWIO JTK_SWLK JTO_SWO JTI MU_NRESET N_RX OLLO_S OLLO_S OLLO_S OLLO_S0 XL_TX XL_RX XL_IR USER_URT_RX USER_URT_TX SYS_STS_LE MU_NRESET UT_USER UT_USER SW_USER SW_USER MPU_SPI_SO MPU_SPI_INT MPU_SPI_LK MPU_SPI_S MPU_SPI_SI OTG_S_PWR OTG_S_P OTG_S_VUS OTG_S_N OTG_S_I R_[0..] R_[0..] TEST_PIN[..] UZZER_SIG XL_PWR_EN TT_HRGE_LE _T_PWR_IN SYS_USER_LE SYS_USER_LE SYS_USER_LE SYS_USER_LE OLLO_S OLLO_S OLLO_S OLLO_S OLLO_S OLLO_S0 OLLO_S OLLO_S USER_URT_RX USER_URT_TX OLLO_SLEEP Size ocument Number R e v ate: Sheet o f MU(STMZGT) OpenR riday, pril, 0 Size ocument Number R e v ate: Sheet o f MU(STMZGT) OpenR riday, pril, 0 Size ocument Number R e v ate: Sheet o f MU(STMZGT) OpenR riday, pril, 0 Y SP0E-.000M RY GN RY GN 00-0.u-V R R00-0K 00-0.u-V 00-0.u-V R R00-0R 00-0.u-V U STMZGT V V 0 V V V V V V 0 V_US V0 V V VT V VRE+ VSS VSS VSS VSS VSS VSS VSS 0 VSS 0 VSS 0 VSS VP VP 0 R0 R00-0R 00-0.u-V 00-0.u-V 00-p-V 0-.u-0V 00-0.u-V LMPGSN LMPGSN 00-0.u-V R R00-00R 00-p-V U STMZGT P0-WKUP P P P P 0 P P P P 00 P 0 P0 0 P 0 P 0 P 0 P 0 P 0 P0 P P P P P P P P P 0 P0 P 0 P P P P P-OS_IN P-OS_OUT PH0-OS_IN PH-OS_OUT NRST OOT0 PR_ON P0 P P P P P P P P P P0 P P P-NTI_TMP R00 R00-N 0 0-u-V 0-u-V R0 R00-0R Y STL00-.K RY RY 0 00-0.u-V R0 R00-0K 00-0.u-V SW ST-S R R0-0R R R00-0R 00-p-V U STMZGT P0 P P P P P P P P P P0 P 0 P P P P PE0 PE PE PE PE PE PE PE PE PE 0 PE0 PE PE PE PE PE P0 0 P P P P P P P P 0 P P0 P P 0 P P P PG0 PG PG PG PG PG 0 PG PG PG PG PG0 PG PG PG PG PG R R00-0R R0 R00-0R 0-.u-V R R00-.K M0K-0T0 0-.u-0V 00-0.u-V R R00-.K 00-0.u-V 00 0-u-V 0 0-.u-V R R00-0K 0 00-p-V R0 R00-0R

R_[0..] R_[0..] R_[0..] R_[0..] RUINO UNO MU_NRESET R_ R_ R_ R_ R R0 VoV Vo0V V_R_IN R_0 R_ R_ R_ R00-0R R R00-N R00-0R R R00-N JP EMLE-_. JP EMLE-_. JP 0 EMLE-0_. JP EMLE-_. 0 R_ R_ R_ R_ R_ R_0 R_ R_ R_ R_ R_ R_ R_ R_ R_ R_0 R R0-0R V_RE+ 0-N VoV R R00-0R LE0-GREEN VoV Vo0V V_R_IN 00-0.u-V 00-0.u-V 00-0.u-V R_ Q0 KR0S ROOTIS / ORO OpenR Size ocument Number Rev RUINO SHIEL ate: riday, pril, 0 Sheet o f

VoV R R00-0R VoV Vo0V R R00-K LE0-ORNGE OTG_S_PWR R R R00-0K R00-0R U IN ULT# EN# OUT GN STMPSSTR 0-.u-V R R00-0R OTG_S_O Vo0V_US US_G OTG_S_VUS OTG_S_N OTG_S_P OTG_S_I R LMPGSN R00-0R R R U Vbus +out -out z Pup R00-0R R00-0R I +in -in Pd Pd Vo0V_US M-MSM00- J US Micro- VUS M P I GN ZX--P SHIEL SHIEL SHIEL SHIEL Micro- US_G GN EMI0-US0 R R00-0R R R0-0M 0-.n/00V LE0-GREEN OTG-S US.0 ROOTIS / ORO OpenR Size ocument Number Rev OTG-S(US.0 Micro-) ate: riday, pril, 0 Sheet o f

VoV VoV SW ST-S SW ST-S UT_USER UT_USER R R00-0K UT_USER UT_USER R R00-0K 00-0.u-V R0 R00-0K 00-0.u-V R R00-0K UTTON SWITH VoV SW_USER SW_USER VoV VoV R R R00-0K R00-0K SW SHK-0 UZZER_SIG UZZER_SIG LS TN-0 Q KR0S IP SWITH UZZER VoV SYSTEM RESET SW JT-0 R R00-0K 00-0.u-V R U V MR RESET GN MRKS 00-0.u-V R00-0K MU_NRESET MU_NRESET ROOTIS / ORO OpenR Size ocument Number Rev PUSH/SIIE SW ate: riday, pril, 0 Sheet o f

VoV VoV R R00-0K R R00-0K R R00-0K R R00-0K U MPU_SPI_LK MPU_SPI_S MPU_SPI_SO MPU_SPI_SI MPU_SPI_INT MPU_SPI_LK MPU_SPI_S MPU_SPI_SO MPU_SPI_SI MPU_SPI_INT VoV R R R R R00-0R R00-0R R00-0R R00-0R 0 SL/SLK N ns N S0/S0 N S/SI N N INT N N SYN N N UX_L UX_ 0 REGOUT RESV RESV VIO RESV V GN_TM MPU-0 GN 00-0.u-V 0 00-0.u-V VoV VoV 00-0.u-V MPU Sensor ROOTIS / ORO OpenR Size ocument Number Rev MPU SENSOR ate: riday, pril, 0 Sheet o f

XL_TX XL_RX XL_IR XL_TX XL_RX XL_IR XL_RX Vo0V 00-0.u-V U Y V GN NSZ0PX RX_TTL RX_ R R00-0K Vo0V XL_TX XL_IR Vo0V R R00-0K RO RE I E XL_I+ U V GN MXES+ R XL_I+ XL_I- R-0R Vo0V 00-0.u-V R R J HEER X.0MM R0-0R R0-0R Vo0V XL_I- XL_+ XL_- XL T XL_TX RX_TTL Vo0V 00-0.u-V U0 OE Y V NWZKX OE Y GN R R00-0K TTL_T S XL_PWR J XL_PWR J XL_PWR J TTL_T TTL_T TTL_T 0 00-0.u-V -EH- 00-0.u-V -EH- 00-0.u-V -EH- TTL onnector XL_PWR J XL_PWR J XL_PWR J0 XL_+ XL_- XL_+ XL_- XL_+ XL_- 00-0.u-V -EH- 00-0.u-V RS onnector -EH- 00-0.u-V -EH- ROOTIS / ORO OpenR Size ocument Number Rev RS/TTL XL ate: riday, pril, 0 Sheet o f

VIN R -u-0v XL_PWR_EN XL_PWR_EN R00-K 00-0.u-V Q KR0S Q IR0SPb SS SS R R00-K XL_PWR RS/TTL Power ontrol ROOTIS / ORO OpenR Size ocument Number Rev RS/TTL PWR ONTROL ate: riday, pril, 0 Sheet o f

N_TX N_RX N_TX N_RX VoV VoV R0 R0 R N_TX N_RX R00-N R00-0K VoV R00-0K 00-0.u-V U TX NH RX NL S V VIO GN TJ0T/ Vo0V 00-0.u-V 00-0n-V 00-00p-V R0 R00-0R R R00-0R 00-00p-V I/O U I/O GN SM Vo0V 00-0.u-V J N 000WS-0 VoV R USER_URT_TX USER_URT_RX R00-0K USER_URT_RX USER_URT_TX U I/O I/O GN SM USER_URT_TX USER_URT_RX R R VoV R00-R R00-R 00-0.u-V J 000WS-0 Vo0V VoV SYS_STS_LE SYS_USER_LE SYS_USER_LE SYS_USER_LE SYS_USER_LE R R SYS_STS_LE SYS_USER_LE SYS_USER_LE SYS_USER_LE SYS_USER_LE R00-0R R00-0R LE0-GREEN LE0-GREEN SYS_STS_LE VoV R R00-0R LE0-GREEN SYS_USER_LE VoV R USER_URT_TX USER_URT_RX R00-0K USER_URT_RX USER_URT_TX U I/O I/O GN SM USER_URT_TX USER_URT_RX R0 R VoV R00-R R00-R 0 00-0.u-V J 000WS-0 VoV VoV VoV R R R R00-0R R00-0R R00-0R LE LE0-RE LE0-ORNGE LE0-ORNGE SYS_USER_LE SYS_USER_LE SYS_USER_LE URT ROOTIS / ORO OpenR Size ocument Number Rev N/URT/LE ate: riday, pril, 0 Sheet o f

MU_NRESET R_ R_ R_ MU_NRESET R_ R_ R_ Vo0V [MISO] [SK] [RST] R_ R_ MU_NRESET J R_ [MOSI] HEER X.MM RUINO ISP TEST_PIN[..] TEST_PIN TEST_PIN TEST_PIN TEST_PIN TEST_PIN TEST_PIN TEST_PIN TEST_PIN TEST_PIN R R R R R0 R R R R TEST_PIN[..] VoV R00-0R R00-0R R00-0R R00-0R R00-0R R00-0R R00-0R R00-0R R00-0R J HEER 0X.MM VoV 0 0 R R R R R R R R R GPIO R00-0R R00-0R R00-0R R00-0R R00-0R R00-0R R00-0R R00-0R R00-0R TEST_PIN TEST_PIN TEST_PIN TEST_PIN TEST_PIN0 TEST_PIN TEST_PIN TEST_PIN TEST_PIN JTMS_SWIO JTK_SWLK JTO_SWO JTI MU_NRESET VoV 0-u-V JTMS_SWIO JTK_SWLK JTO_SWO JTI MU_NRESET VoV J R R00-0K 0 HEER X.MM R R00-0K VoV R0 R00-0K R R00-0K JTG/SW JTMS_SWIO JTK_SWLK JTO_SWO JTI MU_NRESET 0-u-V 0-u-V ROOTIS / ORO OpenR Size ocument Number Rev JTG/SW/OLLO/GPIO ate: riday, pril, 0 Sheet o f

VIN VOUT Vo0V VIN VOUT E XJ(/L0), u, 0V + HRV HRV + E XJ(/L.), u, V + SW SW LRV SS LRV Q SQ Q S0Q E + E XJ(/L.), u, V XJ(/L.), u, V Q SNQ Q SQ SS L XL00-ME S R R0-00R 00-p-0V R R-0.0R SG R0 R0-00R uck-oost Power VIN R0 R0-0R VIN SS 0-0n-0V R R00-.K VIN R R00-.K 00-n-V 00-.n-V R R00-.K 00-0p-0V R R0-.K R R00-.K U VIN VINSNS EN SS OMP MOE RT_SYN ITH V IS VOSNS HRV OOT SW LRV PGOO HRV 0 OOT R R 00-0.u-V VOUT HRV LRV Rfu Rfd R0-0K R0-0K HRV OOT R SS 00-0.u-V SW R0-0R 0 SS OOT 0 00-0.u-V VOUT -u-0v R R0-0K 00-00p-V S SG SW LRV SLOPE ISNS S ISNS+ SG GN 0 PGN P LMPWPR LRV VOUT VOUT SW uck-oost ontroller Rfu = ((Vout - 0.)/0.) * Rfd ROOTIS / ORO OpenR Size ocument Number R e v UK-ST POWER ate: riday, pril, 0 Sheet 0 o f

J JK SMPS Power Input R R00-00K R V ~ V Power Input attery Power Input R00-00K R R00-00K Q0 MMT0/SOT R R00-00K R R00-K QM0 G ENS ONNETOR (MLE) Q Q MMT/SOT S J SS + E POWER_IN use_00_r(v0)_sm POWER_IN XJ(/L0), u, 0V SS Vo0V_US 0 SS Vo0V_R SS Vo0V 00-0.u-V Vo0V_MP VIN U R0 R00-0K R R00-0K Vo0V_ST + POWER_SEL VoV R R00-0K - LMVIGKR Vo0V_ST Vo0V U S S S POWER_SEL G R R00-0K P-MOSET SQS0EN System V Out Vo0V VoV_OUT J J J 00-0.u-V Molex -0 00-0.u-V SMW0-0 000WS-0 V OUT V OUT V OUT POWER_IN SW VIN J0 MSSMQE SMW0-0 SMPS, attery Output RT_T J 0 00-0.u-V Molex 0-00 RT TTERY INPUT VIN R R R00-K R00-0K Power Output M0K-0T0 _T_PWR_IN _T_PWR_IN Main Power In -u-0v attery Power Measurement Vo0V Vo0V_MP Vo0V VoV Vo0V -0u-V V_R_IN U IN OUT GN TM IL-.0ET -0u-0V Vo0V_R -0u-V 00-0.u-V Vo0V U0 IN OUT GN TM IL-.ET -0u-0V VoV_OUT 00-0.u-V Vo0V E + XJ(0/L0), 0u, V R R00-K U VIN EN XL00 -u-0v R0 R00-0.K SW TM GN R R00-0R L uh,, TSL-0M E + N XJ(0/L0), 0u, V 0-u-V 00-0.u-V -0u-V U IN OUT GN TM IL-.0ET -0u-0V -0u-V 00-0.u-V System Power ivide U IN OUT GN TM IL-.ET -0u-0V 00-0.u-V V/ OUT ROOTIS / ORO OpenR Size ocument Number R e v INPUT POWER ate: riday, pril, 0 Sheet 0 o f

OLLO_S OLLO_S OLLO_S OLLO_S OLLO_S OLLO_S0 OLLO_S OLLO_S OLLO_S OLLO_S OLLO_S OLLO_S0 R0 R R R R R R00-0K R00-N R00-0K R00-0K R00-N R00-0K OLLO_S OLLO_S OLLO_S OLLO_S OLLO_S OLLO_S0 OLLO_S OLLO_S OLLO_S OLLO_S OLLO_S OLLO_S0 R R R R R R R00-0K R00-N R00-0K R00-0K R00-N R00-0K OLLO_SLEEP OLLO_SLEEPR R00-0K 0 00-0.u-V OLLO_SLEEP OLLO_S OLLO_S 00-0.u-V U P GN SLEEP IN IN 0 0 P P P VP OUT IN IN L L OUT 0 00-0.u-V R 0.0 SENSE OUT V OUT SENSE Vo0V OLLO_S_OUT OLLO_S_OUT OLLO_S0_OUT R 0.0 VoV J OLLO_S_OUT 0 OLLO_S0_OUT 0 OLLO_S OLLO_S OLLO_S_OUT OLLO_S_OUT VoV HEER X.0MM VoV 0 0 0-u-V 0-u-V OLLO_S OLLO_S0 0 0SESTR-T, QN0 OLLO_S_OUT 00-0.u-V 0 Vo0V OLLO_S_OUT VoV J OLLO_S_OUT 0 0 OLLO_S OLLO_S_OUT HEER X.0MM OLLO_S0_OUT OLLO_S OLLO_S_OUT VoV 00-0.u-V OLLO_SLEEP OLLO_S OLLO_S OLLO_S OLLO_S0 U P GN SLEEP IN IN 0 P P P VP OUT IN IN L L OUT 0 00-0.u-V R 0.0 SENSE OUT V OUT SENSE 0SESTR-T, QN0 OLLO_S_OUT OLLO_S0_OUT R 0.0 OLLO_S_OUT OLLO VoV 0 0 0-u-V 0-u-V ROOTIS / ORO OpenR Size ocument Number Rev OLLO ate: riday, pril, 0 Sheet 0 o f