BUK A. N-channel TrenchMOS logic level FET

Similar documents
BUK A. N-channel TrenchMOS standard level FET

BUK A. N-channel TrenchMOS logic level FET

BUK B. N-channel TrenchMOS standard level FET

N-channel TrenchMOS logic level FET

BUK B. N-channel TrenchMOS logic level FET

N-channel TrenchMOS standard level FET. Higher operating power due to low thermal resistance Low conduction losses due to low on-state resistance

PSMN004-60B. N-channel TrenchMOS SiliconMAX standard level FET. High frequency computer motherboard DC-to-DC convertors

PHD71NQ03LT. N-channel TrenchMOS logic level FET. Simple gate drive required due to low gate charge

N-channel TrenchMOS standard level FET. Higher operating power due to low thermal resistance Low conduction losses due to low on-state resistance

PSMN B. N-channel TrenchMOS SiliconMAX standard level FET. High frequency computer motherboard DC-to-DC convertors

N-channel TrenchMOS logic level FET

N-channel TrenchMOS standard level FET. Higher operating power due to low thermal resistance

PHB108NQ03LT. N-channel TrenchMOS logic level FET

PHP110NQ08T. N-channel TrenchMOS standard level FET

PSMN005-75B. N-channel TrenchMOS SiliconMAX standard level FET. High frequency computer motherboard DC-to-DC convertors

BUK A. Low conduction losses due to low on-state resistance Q101 compliant Suitable for logic level gate drive sources

PSMN4R5-40PS. N-channel 40 V 4.6 mω standard level MOSFET. High efficiency due to low switching and conduction losses

N-channel TrenchMOS standard level FET

12 V, 24 V and 42 V loads Automotive systems General purpose power switching Motors, lamps and solenoids

PSMN D. N-channel TrenchMOS SiliconMAX standard level FET

N-channel TrenchMOS standard level FET. Higher operating power due to low thermal resistance Low conduction losses due to low on-state resistance

N-channel TrenchMOS standard level FET. High noise immunity due to high gate threshold voltage

N-channel TrenchMOS ultra low level FET. Higher operating power due to low thermal resistance Interfaces directly with low voltage gate drivers

BUK A. 12 V, 24 V and 42 V loads Automotive and general purpose power switching Motors, lamps and solenoids

PSMN013-80YS. N-channel LFPAK 80 V 12.9 mω standard level MOSFET

BUK9Y53-100B. N-channel TrenchMOS logic level FET. Table 1. Pinning Pin Description Simplified outline Symbol 1, 2, 3 source (S) 4 gate (G)

PSMN4R3-30PL. N-channel 30 V 4.3 mω logic level MOSFET. High efficiency due to low switching and conduction losses

PSMN2R6-40YS. N-channel LFPAK 40 V 2.8 mω standard level MOSFET

PSMN8R3-40YS. N-channel LFPAK 40 V 8.6 mω standard level MOSFET

Low conduction losses due to low on-state resistance Q101 compliant Suitable for logic level gate drive sources

N-channel TrenchMOS logic level FET

PSMN006-20K. N-channel TrenchMOS SiliconMAX ultra low level FET

PSMN015-60PS. N-channel 60 V 14.8 mω standard level MOSFET. High efficiency due to low switching and conduction losses

PSMN4R0-40YS. N-channel LFPAK 40 V 4.2 mω standard level MOSFET

PSMN017-60YS. N-channel LFPAK 60 V 15.7 mω standard level MOSFET

PSMN YS. N-channel LFPAK 100 V 39.5 mω standard level MOSFET

PSMN7R0-60YS. N-channel LFPAK 60 V 6.4 mω standard level MOSFET

PSMN1R3-30YL. N-channel 30 V 1.3 mω logic level MOSFET in LFPAK

PSMN012-60YS. N-channel LFPAK 60 V, 11.1 mω standard level MOSFET

BUK6C2R1-55C. N-channel TrenchMOS intermediate level FET

N-channel enhancement mode Field-Effect Transistor (FET) in a small SOT23 (TO-236AB) Surface-Mounted Device (SMD) plastic package using

In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below.

PSMN5R5-60YS. N-channel LFPAK 60 V, 5.2 mω standard level FET

PSMN BS. High efficiency due to low switching and conduction losses

PSMN YS. N-channel 100V 12mΩ standard level MOSFET in LFPAK

PHD/PHP36N03LT. 1. Product profile. 2. Pinning information. N-channel TrenchMOS logic level FET. 1.1 General description. 1.

In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below.

N-channel 30 V 1.3 mω logic level MOSFET in LFPAK

BUK9Y107-80E. 12 V, 24 V and 48 V Automotive systems Motors, lamps and solenoid control Transmission control Ultra high performance power switching

PSMN4R0-60YS. Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit V DS drain-source voltage T j 25 C; T j 175 C V

PSMN PS. Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit V DS drain-source voltage T j 25 C; T j 175 C V

In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below.

PSMN YL. Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit V DS drain-source voltage T j 25 C; T j 175 C V

PSMNR90-30BL. High efficiency due to low switching and conduction losses Suitable for logic level gate drive sources

60 V, 0.3 A N-channel Trench MOSFET

PSMN1R1-30PL. High efficiency due to low switching and conduction losses Suitable for logic level gate drive sources

20 / 20 V, 800 / 550 ma N/P-channel Trench MOSFET

PSMN YSE. 1. General description. 2. Features and benefits. 3. Applications. 4. Quick reference data

20 V, complementary Trench MOSFET. Charging switch for portable devices DC-to-DC converters Small brushless DC motor drive

PSMN3R5-40YSD. 1. Quick reference data. 2. Pinning information. 3. Ordering information. 15 August 2018 Objective data sheet

Dual N-channel field-effect transistor. Two N-channel symmetrical junction field-effect transistors in a SOT363 package.

In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below.

PHD110NQ03LT. 1. Product profile. 2. Pinning information. N-channel TrenchMOS logic level FET. 1.1 Description. 1.2 Features. 1.

BUK A. 1. Product profile. 2. Pinning information. TrenchMOS standard level FET. 1.1 Description. 1.2 Features. 1.

PHP/PHD3055E. TrenchMOS standard level FET. Product availability: PHP3055E in SOT78 (TO-220AB) PHD3055E in SOT428 (D-PAK).

In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below.

PHP/PHB174NQ04LT. 1. Product profile. 2. Pinning information. N-channel TrenchMOS logic level FET. 1.1 Description. 1.2 Features. 1.

2N7002T. 1. Product profile. 2. Pinning information. N-channel TrenchMOS FET. 1.1 General description. 1.2 Features. 1.

BF556A; BF556B; BF556C

PMWD16UN. 1. Product profile. 2. Pinning information. Dual N-channel µtrenchmos ultra low level FET. 1.1 General description. 1.

PHT6N06T. 1. Product profile. 2. Pinning information. TrenchMOS standard level FET. 1.1 Description. 1.2 Features. 1.

Dual rugged ultrafast rectifier diode, 20 A, 150 V. Ultrafast dual epitaxial rectifier diode in a SOT78 (TO-220AB) plastic package.

PSMN004-60P/60B. PSMN004-60P in SOT78 (TO-220AB) PSMN004-60B in SOT404 (D 2 -PAK).

2N7002F. 1. Product profile. 2. Pinning information. N-channel TrenchMOS FET. 1.1 General description. 1.2 Features. 1.

PHP/PHB/PHD55N03LTA. TrenchMOS Logic Level FET

PSMN002-25P; PSMN002-25B

PHP/PHB/PHD45N03LTA. TrenchMOS logic level FET

IRFR Description. 2. Features. 3. Applications. 4. Pinning information. N-channel enhancement mode field effect transistor

In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below.

In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below.

PMV65XP. 1. Product profile. 2. Pinning information. P-channel TrenchMOS extremely low level FET. 1.1 General description. 1.

PHM21NQ15T. TrenchMOS standard level FET

µtrenchmos standard level FET Low on-state resistance in a small surface mount package. DC-to-DC primary side switching.

PHP7NQ60E; PHX7NQ60E

74HC2G16; 74HCT2G16. The 74HC2G16; 74HCT2G16 is a high-speed Si-gate CMOS device. The 74HC2G16; 74HCT2G16 provides two buffers.

In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below.

In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below.

PMV40UN. 1. Product profile. 2. Pinning information. TrenchMOS ultra low level FET. 1.1 Description. 1.2 Features. 1.

TrenchMOS technology Very fast switching Logic level compatible Subminiature surface mount package.

N-channel µtrenchmos ultra low level FET. Top view MBK090 SOT416 (SC-75)

SI Product profile. 2. Pinning information. N-channel TrenchMOS logic level FET. 1.1 Description. 1.2 Features. 1.

BUK71/ AIE. TrenchPLUS standard level FET. BUK AIE in SOT426 (D 2 -PAK) BUK AIE in SOT263B (TO-220AB).

PMN40LN. 1. Description. 2. Features. 3. Applications. 4. Pinning information. TrenchMOS logic level FET

N-channel TrenchMOS logic level FET

TrenchMOS ultra low level FET

PMV56XN. 1. Product profile. 2. Pinning information. µtrenchmos extremely low level FET. 1.1 Description. 1.2 Features. 1.

In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below.

The 74LV08 provides a quad 2-input AND function.

4-bit magnitude comparator

Passivated ultra sensitive gate thyristor in a SOT54 plastic package. Earth leakage circuit breakers or Ground Fault Circuit Interrupters (GFCI)

Transcription:

Rev. 2 7 June 21 Product data sheet 1. Product profile 1.1 General description Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. This product has been designed and qualified to the appropriate AEC standard for use in automotive critical applications. 1.2 Features and benefits Low conduction losses due to low on-state resistance Q11 compliant Suitable for logic level gate drive sources Suitable for thermally demanding environments due to 175 C rating 1.3 Applications 12 V and 24 V loads Automotive and general purpose power switching Motors, lamps and solenoids 1.4 Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit V DS drain-source T j 25 C; T j 175 C - - 55 V voltage I D drain current V GS =5V; T mb =25 C; - - 55 A see Figure 1; see Figure 3 P tot total power dissipation T mb = 25 C; see Figure 2 - - 114 W

Table 1. Quick reference data continued Symbol Parameter Conditions Min Typ Max Unit Static characteristics R DSon drain-source on-state resistance Avalanche ruggedness E DS(AL)S non-repetitive drain-source avalanche energy V GS =4.5V; I D =25A; T j =25 C; see Figure 12; see Figure 13 V GS =1V; I D =25A; T j =25 C; see Figure 12; see Figure 13 V GS =5V; I D =25A; T j =25 C; see Figure 12; see Figure 13 I D =49A; V sup 55 V; R GS =5Ω; V GS =5V; T j(init) = 25 C; unclamped - - 2 mω - 14 17.6 mω - 15 19 mω - - 12 mj 2. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline Graphic symbol 1 G gate 2 D drain mb 3 S source mb D mounting base; connected to G drain 2 1 3 SOT428 (DPAK) mbb76 D S 3. Ordering information Table 3. Ordering information Type number Package Name Description Version DPAK plastic single-ended surface-mounted package (DPAK); 3 leads (one lead cropped) SOT428 Product data sheet Rev. 2 7 June 21 2 of 14

4. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 6134). Symbol Parameter Conditions Min Typ Max Unit V DS drain-source voltage T j 25 C; T j 175 C - - 55 V V DGR drain-gate voltage R GS =2kΩ - - 55 V V GS gate-source voltage -1-1 V I D drain current T mb =1 C; V GS =5V; see Figure 1 - - 38 A T mb =25 C; V GS =5V; see Figure 1; - - 55 A see Figure 3 I DM peak drain current T mb =25 C; t p 1 µs; pulsed; [1] - - 219 A see Figure 3 P tot total power dissipation T mb =25 C; see Figure 2 - - 114 W T stg storage temperature -55-175 C T j junction temperature -55-175 C V GSM peak gate-source voltage pulsed; t p 5 µs -15-15 V Source-drain diode I S source current T mb = 25 C - - 55 A I SM peak source current t p 1 µs; pulsed; T mb = 25 C - - 219 A Avalanche ruggedness E DS(AL)S non-repetitive drain-source avalanche energy I D =49A; V sup 55 V; R GS =5Ω; V GS =5V; T j(init) = 25 C; unclamped - - 12 mj [1] peak drain current is limited by chip, not package. Product data sheet Rev. 2 7 June 21 3 of 14

12 3aa24 12 3aa16 I der (%) P der (%) 8 8 4 4 5 1 15 2 T mb ( C) 5 1 15 2 T mb ( C) Fig 1. Normalized continuous drain current as a function of mounting base temperature Fig 2. Normalized total power dissipation as a function of mounting base temperature 1 3 3nb64 I D (A) 1 2 R DSon = V DS / I D t p = 1μs 1 μs 1 P t p δ = T D.C. 1 ms 1 ms 1 t p T t 1 ms 1 1 1 2 V DS (V) Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage Product data sheet Rev. 2 7 June 21 4 of 14

5. Thermal characteristics Table 5. Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit R th(j-mb) thermal resistance from junction to see Figure 4 - - 1.3 K/W mounting base R th(j-a) thermal resistance from junction to ambient minimum footprint ; FR4 board - 71.4 - K/W 1 3nb65 Z th(j-mb) (K/W) 1 δ =.5.2 1 1.1.5 1 2.2 Single Shot P t p δ = T t p t T 1 3 1 6 1 5 1 4 1 3 1 2 1 1 1 t p (s) Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration Product data sheet Rev. 2 7 June 21 5 of 14

6. Characteristics Table 6. Characteristics Symbol Parameter Conditions Min Typ Max Unit Static characteristics V (BR)DSS drain-source I D =.25mA; V GS =V; T j = 25 C 55 - - V breakdown voltage I D =.25mA; V GS =V; T j = -55 C 5 - - V V GS(th) gate-source threshold I D =1mA; V DS =V GS ; T j =25 C; 1 1.5 2 V voltage see Figure 11 I D =1mA; V DS =V GS ; T j = 175 C;.5 - - V see Figure 11 I D =1mA; V DS =V GS ; T j =-55 C; - - 2.3 V see Figure 11 I DSS drain leakage current V DS =55V; V GS =V; T j = 25 C -.5 1 µa V DS =55V; V GS =V; T j = 175 C - - 5 µa I GSS gate leakage current V DS =V; V GS =1V; T j = 25 C - 2 1 na V DS =V; V GS =-1V; T j = 25 C - 2 1 na R DSon drain-source on-state V GS =5V; I D =25A; T j = 175 C; - - 38 mω resistance see Figure 12; see Figure 13 V GS =4.5V; I D =25A; T j =25 C; - - 2 mω see Figure 12; see Figure 13 V GS =1V; I D =25A; T j =25 C; - 14 17.6 mω see Figure 12; see Figure 13 V GS =5V; I D =25A; T j =25 C; see Figure 12; see Figure 13-15 19 mω Dynamic characteristics C iss input capacitance V GS =V; V DS =25V; f=1mhz; - 219 292 pf C oss output capacitance T j =25 C; see Figure 14-38 45 pf C rss reverse transfer - 25 345 pf capacitance t d(on) turn-on delay time V DS =3V; R L =1.2Ω; V GS =5V; - 45 - ns t r rise time R G(ext) =1Ω; T j =25 C - 13 - ns t d(off) turn-off delay time - 4 - ns t f fall time - 13 - ns L D internal drain inductance L S internal source inductance Source-drain diode measured from drain lead from package to centre of die ; T j =25 C measured from source lead from package to source bond pad ; T j =25 C - 2.5 - nh - 7.5 - nh V SD source-drain voltage I S =25A; V GS =V; T j =25 C; -.85 1.2 V see Figure 15 t rr reverse recovery time I S =2A; di S /dt = -1 A/µs; V GS =-1V; - 51 - ns Q r recovered charge V DS =3V; T j =25 C - 12 - nc Product data sheet Rev. 2 7 June 21 6 of 14

3 I D (A) 25 2 15 6 7 8 9 V GS (V) = 1 3nb61 5 35 R DSON (mω) 3 25 3nb6 1 2 5 3 15 2.2 2 4 6 8 1 V DS (V) 1 2 4 6 8 1 V GS (V) Fig 5. Output characteristics: drain current as a function of drain-source voltage; typical values Fig 6. On-state resistance: typical values 6 3nb58 1 3nb59 g fs (S) I D (A) 8 4 6 2 4 2 T j = 175 C T j = 25 C 2 4 6 8 1 I D (A) 1 2 3 4 5 V GS (V) Fig 7. Forward transconductance as a function of drain current; typical values Fig 8. Transfer characteristics: drain current as a function of gate-source voltage; typical values Product data sheet Rev. 2 7 June 21 7 of 14

5 3nb57 1-1 3aa36 V GS (V) 4 V DD = 14 V V DD = 44 V I D (A) 1-2 3 1-3 min typ max 2 1-4 1 1-5 2 4 6 Q G (nc) 1-6 1 2 3 V GS (V) Fig 9. Gate-source voltage as a function of turn-on gate charge; typical values Fig 1. Sub-threshold drain current as a function of gate-source voltage 2.5 V GS(th) (V) 2 max 3aa33 22 R DSon (mω) 2 V GS (V) = 3.4 3.6 3nb62 1.5 typ 18 4. 4.2 16 4.6 1 min 14 5..5 12-6 6 12 T j ( C) 18 1 2 4 6 8 1 I D (A) Fig 11. Gate-source threshold voltage as a function of junction temperature Fig 12. Drain-source on-state resistance as a function of drain current; typical values Product data sheet Rev. 2 7 June 21 8 of 14

a 2.4 3aa28 6 C (pf) 5 C iss 3nb63 1.8 4 C oss 1.2 3 C rss 2.6 1 6 6 12 18 T j ( C) 1 2 1 1 1 1 1 2 V DS (V) Fig 13. Normalized drain-source on-state resistance factor as a function of junction temperature Fig 14. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values I S (A) 1 8 3nb56 T j = 175 C 6 T j = 25 C 4 2..5 1. 1.5 V SD (V) Fig 15. Reverse diode current; typical value Product data sheet Rev. 2 7 June 21 9 of 14

7. Package outline Plastic single-ended surface-mounted package (DPAK); 3 leads (one lead cropped) SOT428 y E A A b 2 A 1 E 1 mounting base D 2 D 1 H D L 2 2 1 3 L L 1 b 1 b w M A c e e 1 5 1 mm scale DIMENSIONS (mm are the original dimensions) D UNIT A A 1 b b 1 b 2 c D 2 E 1 E 1 e e min min 1 mm 2.38 2.22.93.46.89.71 1.1.9 5.46 5..56.2 6.22 5.98 4. 6.73 6.47 4.45 2.285 4.57 L H 1 D L L min 2 w 1.4 9.6 2.95 2.55.5.9.5.2 y max.2 OUTLINE VERSION REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE SOT428 TO-252 SC-63 6-2-14 6-3-16 Fig 16. Package outline SOT428 (DPAK) Product data sheet Rev. 2 7 June 21 1 of 14

8. Revision history Table 7. Revision history Document ID Release date Data sheet status Change notice Supersedes _2 2167 Product data sheet - _1 Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. Legal texts have been adapted to the new company name where appropriate. _1 2124 Product specification - - Product data sheet Rev. 2 7 June 21 11 of 14

9. Legal information 9.1 Data sheet status Document status [1][2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term 'short data sheet' is explained in section "Definitions". [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nexperia.com. 9.2 Definitions Draft The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Nexperia does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local Nexperia sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification The information and data provided in a Product data sheet shall define the specification of the product as agreed between Nexperia and its customer, unless Nexperia and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the Nexperia product is deemed to offer functions and qualities beyond those described in the Product data sheet. 9.3 Disclaimers Limited warranty and liability Information in this document is believed to be accurate and reliable. However, Nexperia does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall Nexperia be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, Nexperia s aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of Nexperia. Right to make changes Nexperia reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use in automotive applications This Nexperia product has been qualified for use in automotive applications. The product is not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of a Nexperia product can reasonably be expected to result in personal injury, death or severe property or environmental damage. Nexperia accepts no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer s own risk. Applications Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on a weakness or default in the customer application/use or the application/use of customer s third party customer(s) (hereinafter both referred to as Application ). It is customer s sole responsibility to check whether the Nexperia product is suitable and fit for the Application planned. Customer has to do all necessary testing for the Application in order to avoid a default of the Application and the product. Nexperia does not accept any liability in this respect. Quick reference data The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Limiting values Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 6134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale Nexperia products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nexperia.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects to applying the customer s general terms and conditions with regard to the purchase of Nexperia products by customer. No offer to sell or license Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Product data sheet Rev. 2 7 June 21 12 of 14

Export control This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 1. Contact information For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Product data sheet Rev. 2 7 June 21 13 of 14

11. Contents 1 Product profile...........................1 1.1 General description......................1 1.2 Features and benefits.....................1 1.3 Applications............................1 1.4 Quick reference data.....................1 2 Pinning information.......................2 3 Ordering information......................2 4 Limiting values...........................3 5 Thermal characteristics...................5 6 Characteristics...........................6 7 Package outline.........................1 8 Revision history......................... 11 9 Legal information........................12 9.1 Data sheet status.......................12 9.2 Definitions.............................12 9.3 Disclaimers............................12 9.4 Trademarks............................13 1 Contact information......................13 For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 7 June 21