Three-Terminal Negative Vltage Regulatr FEATURES Output Current up t 200 ma (350 ma max) Input Vltage Range -2.4 V - -16 V Output Vltage Range frm -2.5 V t -12 V (fixed values) Drput Vltage 400 mv @ 100 ma, Output Vltage Accuracy ± 1.5% Temperature Stability ±50 ppm /0 C Lw Pwer Cnsumptin at 100 µa max Thermal shutdwn Current Limit and Shrt Circuit Prtectin Sft Start Lad Capacitr Aut Discharge Lw ESR Ceramic Capacitr cmpatible Operating Ambient Temperature - 40 + 85 0 C Packages : SOT-23, SOT-89, and USP-6C EU RHS Cmpliant, Pb Free APPLICATIONS CCD Pwer supplies LCD Mdules OP-Amp Pwer supplies Cameras, VCRs Varius prtable equipment DESCRIPTION The IXD4902 is a negative vltage CMOS regulatr with ±1.5% accuracy suited t applicatins, which require very lw pwer cnsumptin. The IC cnsists f a reference vltage surce, an errr amplifier, a driver transistr, an ver-current prtectin circuit, a phase cmpensatin circuit, and a thermal shutdwn. The device is available with fixed utput vltages f -2.5 V, -2.6 V, -3.0 V, -3.3 V, -4.0 V, -4.5 V, -5.0 V, -6.0 V, and -12 V. Excellent internal phase cmpensatin allws the IXD4902 perate with a lw ESR ceramic utput capacitr C L. The ver current prtectin circuit (the current limiter and the fld back circuit), as well as the thermal shutdwn circuit (TSD) are built-in. These tw prtectin circuits perate when either the utput current reaches the current limit, r the junctin temperature reaches the temperature limit. Regulatr is available in SOT-23, SOT-89, and USP- 6C packages. TYPICAL APPLICATION CIRCUIT TYPICAL PERFORMANCE CHARACTERISTIC Lad Transient Respnse IXD4902x501 Ta = 25 0 C, tr = tf = 5 µs, VIN = -6.0 V, VCE = 1.5 V, IOUT = 1 ma, 100 ma 2014 IXYS Crp. 1 Dc. N. IXD4902_DS, Rev. N0 Characteristics subject t change withut ntice
ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL RATINGS UNITS Input Vltage V IN GND 18 GND + 0.3 V Output Current I OUT 500 1) ma Output Vltage V OUT -V IN 0.3 ~ GND + 0.3 V SOT-23 250 500 (PCB munted) Pwer Dissipatin 2) 500 SOT-89-5 P D 1000 (PCB munted) mw USP-6C 100 1000 (PCB munted) Operating Temperature Range T OPR 40 ~ + 85 0 C Strage Temperature Range T STG 55 ~ +125 0 C All vltages are in respect t GND 1) I OUT Pd/ (V IN-V OUT) 2) This is a reference data taken by using the test bard. Please refer t page 13 t 15 fr details ELECTRICAL OPERATING CHARACTERISTICS Ta = 25 0 C PARAMETER SYMBOL CONDITIONS MIN. TYP. MAX. UNIT CIRCUIT Input Vltage V IN -16-2.4 V Output Vltage 1) V OUT(E) I OUT = 20 ma V OUT(T) < -2.0 V V OUT(T)- x 2) V V OUT(T) x 1.015 OUT(T) 0.985 V OUT(T) -2.0 V V OUT(T)- V V OUT(T)+ 0.030 OUT(T) 0.030 V Maximum Output Current I OUT_MAX V IN = V OUT(T) 2.0 V, V OUT(T) -2.4 V V IN = -4.4 V, V OUT(T) > -2.4 V 200 ma Lad Regulatin V OUT V IN = V OUT(T) -1.0 V, 1 ma I OUT V OUT(T) -3.0 V 100 ma V IN = -4.0 V, V OUT(T) > -3.0 V 20 60 mv Drput Vltage 4) V DIF I OUT = 20 ma E-1 3) mv Supply Current I IN V IN = -16 V, I OUT = 0 ma 100 200 µa V OUT(T) > -1.4 V, Line Regulatin I OUT = 20 ma -16 V V IN 2.4 V -9.0 V V OUT(T) -1.4 V, -16 V V IN V OUT(T) -1 V V OUT(T) -9.0 V -16 V V IN V OUT(T) -1 V 0.05 0.20 0.1 0.3 Output Vltage Temperature Characteristics I OUT = 20 ma, - 40 0 C T OPR 85 0 C ± 50 ppm/ 0 C Ripple Rejectin V PSRR V IN = V OUT(T) 1.0 V DC + 0.5 Vp-p AC, I OUT = 20 ma, f = 1 khz 45 db Current Limit I LIM V IN = V OUT(T) -2.0 V, V OUT(T) 2.4 V V IN = -4.4 V, V OUT(T) > 2.4 V 210 300 ma Shrt Circuit Current I SHORT V OUT = 0 V, V IN = V OUT(T) -2.0 V 80 ma Thermal Shutdwn Detect Temperature T TSD Junctin Temperature 150 0 C Thermal Shutdwn Hystetresis T HYS 25 0 C Sft Start Time 5) t SS R L = 3 kω V OUT(T) > -4.0 V 0.15 0.4 1.2 ms V OUT(T) -4.0 V 0.3 0.7 2 ms NOTE: Unless therwise stated V IN = V OUT(T) 1.0 V r -2.4 V (the ne with bigger abslute value) 1) V OUT(E) is an Effective utput vltage 2) V OUT (T) is a Specified utput vltage 3) Please refer t the table named DROPOUT VOLTAGE CHART %/V 4) Vdif = V IN1-V OUT1, where V IN1 is a input vltage, which is enugh t keep V OUT = V OUT(E) x 0.98 5) t SS is defined as a time required t V OUT t reach V OUT(E) x 0.95 V frm the mment, when V IN rises t V IN = (V OUT(T) 1.0 V) x 0.9 with t R = 5 µs 2014 IXYS Crp. 2 Dc. N. IXD4902_DS, Rev. N0 Characteristics subject t change withut ntice
ELECTRICAL OPERATING CHARACTERISTICS (CONTINUED) Drput Vltage Chart NOMINAL OUTPUT VOLTAGE E-1 DROPOUT VOLTAGE Vdif (mv) NOMINAL OUTPUT VOLTAGE E-1 DROPOUT VOLTAGE Vdif (mv) NOMINAL OUTPUT VOLTAGE E-1 DROPOUT VOLTAGE Vdif (mv) V OUT(T) TYP. MAX. V OUT(T) TYP. MAX. V OUT(T) TYP. MAX. -2.50 129 174-3.30 102 142-6.0 70 105-2.60 125 169-4.00 91 127-12.0 50 87-3.00 110 151-5.00 78 114 PIN CONFIGURATION SOT-23 (TOP VIEW) SOT-89 (TOP VIEW) USP-6C (BOTTOM VIEW) PIN ASSIGNMENT PIN NUMBER SOT-23 SOT-89 USP-6C PIN NAME 2 1 6 GND Grund 3 2 3 -V IN LDO Regulatr Input 1 3 1 -V OUT Output Vltage 2, 4, 6 NC N Cnnectin BLOCK DIAGRAM FUNCTIONS The dissipatin pad fr the USP-6C package shuld be slder-plated in respect with munting pattern and metal mask t imprve heat dissipatin and. munting strength. If the pad needs t be cnnected t ther pins, it shuld be cnnected t the -V IN (N. 3) pin. XD4902D Dides inside the circuits are ESD prtectin dides and parasitic dides. BASIC OPERATION The Errr Amplifier f the IXD4902 series mnitrs utput vltage divided by internal resistrs R1 & R2 and cmpares it with the internal Reference Vltage (see Blck Diagram abve). The utput signal frm errr amplifier drives gate f the N-channel MOSFET, which is cnnected t the V OUT pin and perates as a series vltage regulatr fr V IN vltage. The Current Limit/Shrt Prtectin circuits mnitr level f the utput current, and Thermal shutdwn circuit mnitrs die temperature t prevent IC damage by excessive current. Sft Start circuit prevents inrush current frm V IN t charge C L capacitr during start-up. 2014 IXYS Crp. 3 Dc. N. IXD4902_DS, Rev. N0 Characteristics subject t change withut ntice
Current Limiter, Shrt-Circuit Prtectin The IXD4902 series include a cmbinatin f a fixed current limiter circuit and a fld back circuit, which aid the peratins f the current limiter and circuit prtectin. When the lad current reaches the current limit level, the fixed current limiter circuit activates and utput vltage drps. Because f this drp, the fld back circuit activates t, and utput vltage drps further decreasing utput current. When the utput pin is shrted, a current f abut 80 ma flws. There are n parasitic dide between the V OUT and GND pins. The minimized shrt-circuit current will flw even if the V OUT pin is pulled up tward psitive ptential. Thermal Shutdwn When the junctin temperature f the built-in transistr reaches the temperature limit, the thermal shutdwn circuit activates and turns transistr OFF. The IC resumes nrmal peratin when the junctin temperature falls belw value determined by Thermal Shutdwn Hysteresis. Lw ESR Capacitrs An internal phase cmpensatin circuit guarantees stable IXD4902 peratin with lw ESR capacitrs. Hwever, cnnect the utput capacitr C L = 1.0-100 µf as clse t the V OUT and the GND pins as pssible, t nt degrade its functin. In additin, an input capacitr C IN = 1 µf between the V IN and GND pins shuld be used t ensure a stable input pwer. Sft-Start Functin The IXD4902 limits at start-up the inrush current charging C L, and it makes the V IN stable. The sft-start time is ptimized internally. Sft-start time is defined as a time required t V OUT t reach V OUT(E) x 0.95 V frm the mment, when V IN = (V OUT(T) 1.0 V) x 0.9 with t R = 5 µs applied t V IN pin.(see graph belw). TYPICAL APPLICATION CIRCUIT LAYOUT AND USE CONSIDERATIONS 1. Munt external cmpnent as clse t the IC as pssible and use thick, shrt cnnecting traces t reduce the circuit impedance. 2. The IC may malfunctin if abslute maximum ratings are exceeded. 3. Please ensure that utput current I OUT is less than P D / (V IN - V OUT ), where P D is a rated pwer dissipatin value f the package shwn at ABSOLUTE MAXIMUM RATING table t nt exceed it.. 2014 IXYS Crp. 4 Dc. N. IXD4902_DS, Rev. N0 Characteristics subject t change withut ntice
TEST CIRCUITS Circuit Circuit Circuit Unless therwise stated, Ta = 25 0 C 2014 IXYS Crp. 5 Dc. N. IXD4902_DS, Rev. N0 Characteristics subject t change withut ntice
TYPICAL PERFORMANCE CHARACTERISTICS (1) Output Vltage vs. Output Current VIN = -5.3V Ta = 25 0 C VIN = -7.0V Ta = 25 0 C VIN = -14.0V Ta = 25 0 C 2014 IXYS Crp. 6 Dc. N. IXD4902_DS, Rev. N0 Characteristics subject t change withut ntice
TYPICAL PERFORMANCE CHARACTERISTICS (Cntinued) (2) Output Vltage vs Input Vltage IOUT = 20 ma Ta = 25 0 C IOUT = 20 ma Ta = 25 0 C IOUT = 20 ma Ta = 25 0 C 2014 IXYS Crp. 7 Dc. N. IXD4902_DS, Rev. N0 Characteristics subject t change withut ntice
TYPICAL PERFORMANCE CHARACTERISTICS (Cntinued) (3) Drput Vltage vs. Output Current (4) Supply Current vs. Input Vltage 2014 IXYS Crp. 8 Dc. N. IXD4902_DS, Rev. N0 Characteristics subject t change withut ntice
TYPICAL PERFORMANCE CHARACTERISTICS (Cntinued) (5) Output Vltage vs. Ambient Temperature (6) V IN Rising Respnse Time IOUT = 20 ma, VIN = -4.3 V IOUT = 20 ma, tr = 5 µs, VIN = 0-4.3 V IOUT = 20 ma, VIN = -6.0 V IOUT = 20 ma, tr = 5 µs, VIN = 0-6.0 V IOUT = 20 ma, VIN = -13 V IOUT = 20 ma, tr = 5 µs, VIN = 0-13 V 2014 IXYS Crp. 9 Dc. N. IXD4902_DS, Rev. N0 Characteristics subject t change withut ntice
TYPICAL PERFORMANCE CHARACTERISTICS (Cntinued) (7) V IN Transient Respnse (12) Lad Transient Respnse IOUT = 20 ma, tr = tf = 5 µs, VIN = -4.3-5.3 V IOUT = 1 100 ma, tr = tf = 5 µs, VIN = -4.3 V IOUT = 20 ma, tr = tf = 5 µs, VIN = -6.0-7.0 V IOUT = 1 100 ma, tr = tf = 5 µs, VIN = -6.0 V IOUT = 20 ma, tr = tf = 5 µs, VIN = -13-14 V IOUT = 1 100 ma, tr = tf = 5 µs, VIN = -13 V 2014 IXYS Crp. 10 Dc. N. IXD4902_DS, Rev. N0 Characteristics subject t change withut ntice
TYPICAL PERFORMANCE CHARACTERISTICS (Cntinued) (13) PSRR VCE = 1.5 V, VIN = -4.3 VDC + 0.5 Vp-pAC VCE = 1.5 V, VIN = -6.0 VDC + 0.5 Vp-pAC VCE = 1.5 V, VIN = -13 VDC + 0.5 Vp-pAC ORDERING INFORMATION IXD4902- DESIGNATOR DESCRIPTION SYMBOL DESCRIPTION NOTE: Type f Regulatr N Sft start, Thermal Shutdwn 251-2.5 V ±1.5% 261-2.6 V ±1.5% 301-3.0 V ±1.5% 331-3.3 V ±1.5% Output Vltage and Accuracy 1) 401-4.0 V ±1.5% 451-4.5 V ±1.5% 501-5.0 V ±1.5% 601-6.0 V ±1.5% C01-12.0 V ±1.5% - (*) Packages (Order Units) MR-G PR-G ER-G SOT-23 (3000/Reel) SOT-89 (1000/reel) USP-6C (3000/Reel) The -G suffix dentes Halgen and Antimny free as well as being fully RHS cmpliant. 1) Fr ther utput vltages, please, cntact yur lcal IXYS sales ffice r representative. Optinal vltage range is frm -0.9 V t -12.0 V 2014 IXYS Crp. 11 Dc. N. IXD4902_DS, Rev. N0 Characteristics subject t change withut ntice
PACKAGE DRAWING AND DIMENSIONS SOT-23, Units: mm SOT-89, Units: mm USP-6C, Units: mm USP-6C Reference Metal Mask Design USP-6C Reference Pattern Layut 2014 IXYS Crp. 12 Dc. N. IXD4902_DS, Rev. N0 Characteristics subject t change withut ntice
PACKAGE POWER DISSIPATION SOT-23 Pwer Dissipatin The pwer dissipatin varies with the munt bard cnditins. Please use this data as a reference nly. 1. Measurement Cnditins: Cnditin: Ambient: Sldering: Bard: Material: Thickness: Thrugh-hle: Munt n a bard Natural cnvectin Lead (Pb) free Dimensins 40 40 mm (1600 mm 2 in ne side) Cpper (Cu) traces ccupy 50% f the bard area n tp and bttm layers Package heat sink tied t the cpper traces. (Bard f SOT-26 is used) Glass Epxy (FR-4) 1.6 mm 4 x 0.8 Diameter 2. Pwer Dissipatin vs. Ambient Temperature Bard Munt (Tjmax = 125 0 C) Evaluatin Bard (Unit: mm) Ambient Temperature, 0 C Pwer Dissipatin Pd, mw 25 500 85 200 Thermal Resistance, 0 C/W 200.00 2014 IXYS Crp. 13 Dc. N. IXD4902_DS, Rev. N0 Characteristics subject t change withut ntice
PACKAGE POWER DISSIPATION (CONTINUED) SOT-89 Pwer Dissipatin The pwer dissipatin varies with the munt bard cnditins. Please use this data as a reference nly. 1. Measurement Cnditins: Cnditin: Ambient: Sldering: Bard: Material: Thickness: Thrugh-hle: Munt n a bard Natural cnvectin Lead (Pb) free Dimensins 40 40 mm (1600 mm 2 in ne side) Cpper (Cu) traces ccupy 50% f the bard area n tp and bttm layers Package heat sink tied t the cpper traces. Glass Epxy (FR-4) 1.6 mm 5 x 0.8 Diameter 2. Pwer Dissipatin vs. Ambient Temperature Bard Munt (Tjmax = 125 0 C) Ambient Temperature, 0 C Pwer Dissipatin Pd, mw 25 1000 85 400 Thermal Resistance, 0 C/W 100.0 Evaluatin Bard (Unit: mm) 2014 IXYS Crp. 14 Dc. N. IXD4902_DS, Rev. N0 Characteristics subject t change withut ntice
PACKAGE POWER DISSIPATION (CONTINUED) USP-6C Pwer Dissipatin The pwer dissipatin varies with the munt bard cnditins. Please use this data as a reference nly. 1. Measurement Cnditins: Cnditin: Ambient: Sldering: Bard: Material: Thickness: Thrugh-hle: Munt n a bard Natural cnvectin Lead (Pb) free Dimensins 40 40 mm (1600 mm 2 in ne side) Cpper (Cu) traces ccupy 50% f the bard area n tp and bttm layers Package heat sink teed t cpper traces Glass Epxy (FR-4) 1.6 mm 4 x 0.8 Diameter 2. Pwer Dissipatin vs. Ambient Temperature Bard Munt (Tjmax = 125 0 C) Ambient Temperature, 0 C Pwer Dissipatin Pd, mw 25 1000 85 400 Thermal Resistance, 0 C/W 100.00 2014 IXYS Crp. 15 Dc. N. IXD4902_DS, Rev. N0 Characteristics subject t change withut ntice
MARKING SOT-23, SOT89 SOT-23 SOT-89 USP-6C - represents prduct series PACKAGE MARK PRODUCT SERIES SOT-23, SOT89 E IXD4902xxxxx-G USP-6C T - represents utput vltage range and type f regulatr MARK OUTPUT VOLTAGE PRODUCT SERIES A -0.9 - -3.8 IXD4902x091xx-G - IXD4902x381xx-G B -3.9 6.8 IXD4902x391xx-G - IXD4902x681xx-G C -6.9 9.8 IXD4902x691xx-G - IXD4902x981xx-G D -9.9 12.0 IXD4902x991xx-G - IXD4902xC01xx-G - represents utput vltage MARK OUTPUT VOLTAGE (V) MARK OUTPUT VOLTAGE (V) MARK OUTPUT VOLTAGE (V 0-0.9-3.9-6.9-9.9 A -1.9-4.9-7.9-10.9 N -2.9-5.9-8.9-11.9 1-1.0-4.0-7.0-10.0 B -2.0-5.0-8.0-11.0 P -3.0-6.0-9.0-12.0 2-1.1-4.1-7.1-10.1 C -2.1-5.1-8.1-11.1 R -3.1-6.1-9.1-3 -1.2-4.2-7.2-10.2 D -2.2-5.2-8.2-11.2 S -3.2-6.2-9.2-4 -1.3-4.3-7.3-10.3 E -2.3-5.3-8.3-11.3 T -3.3-6.3-9.3-5 -1.4-4.4-7.4-10.4 F -2.4-5.4-8.4-11.4 U -3.4-6.4-9.4-6 -1.5-4.5-7.5-10.5 H -2.5-5.5-8.5-11.5 V -3.5-6.5-9.5-7 -1.6-4.6-7.6-10.6 K -2.6-5.6-8.6-11.6 X -3.6-6.6-9.6-8 -1.7-4.7-7.7-10.7 L -2.7-5.7-8.7-11.7 Y -3.7-6.7-9.7-9 -1.8-4.8-7.8-10.8 M -2.8-5.8-8.8-11.8 Z -3.8-6.8-9.8 - - represents prductin lt number 01~09, 0A~0Z, 11~9Z, A1~A9, AA~AZ, B1~ZZ in rder, (G, I, J, O, Q, W excluded) 2014 IXYS Crp. 16 Dc. N. IXD4902_DS, Rev. N0 Characteristics subject t change withut ntice
Warranty and Use IXYS CORP. MAKES NO WARRANTY, REPRESENTATION OR GUARANTEE, EXPRESS OR IMPLIED, REGARDING THE SUITABILITY OF ITS PRODUCTS FOR ANY PARTICULAR PURPOSE, NOR THAT THE USE OF ITS PRODUCTS WILL NOT INFRINGE ITS INTELLECTUAL PROPERTY RIGHTS OR THE RIGHTS OF THIRD PARTIES WITH RESPECT TO ANY PARTICULAR USE OR APPLICATION AND SPECIFICALLY DISCLAIMS ANY AND ALL LIABILITY ARISING OUT OF ANY SUCH USE OR APPLICATION, INCLUDING BUT NOT LIMITED TO, CONSEQUENTIAL OR INCIDENTAL DAMAGES. IXYS Crp. prducts are nt designed, intended, r authrized fr use as cmpnents in systems intended fr surgical implant int the bdy, r ther applicatins intended t supprt r sustain life, r fr any ther applicatin in which the failure f the IXYS Crp. prduct culd create a situatin where persnal injury r death may ccur. IXYS Crp. reserves the right t make changes t r discntinue any prduct r service described herein withut ntice. Prducts with data sheets labeled "Advance Infrmatin" r "Preliminary" and ther prducts described herein may nt be in prductin r ffered fr sale. IXYS Crp. advises custmers t btain the current versin f the relevant prduct infrmatin befre placing rders. Circuit diagrams illustrate typical semicnductr applicatins and may nt be cmplete. IXYS Crp. 1590 Buckeye Dr. Milpitas, CA 95035-7418 Phne: 408. 457.9000 Dcument N:IXD4902_DS Fax: 408. 496.0222 Revisin: N0 http://www.ixys.cm Issue date: 2/12/2014 2014 IXYS Crp. 17 Dc. N. IXD4902_DS, Rev. N0 Characteristics subject t change withut ntice