OptiMOS TM -T2 Power-Transistor

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OptiMOS TM -T2 Power-Transistor Product Summary V DS 4 V R DS(on),max 7.2 mω I D 5 A Features Dual N-channel Logic Level Common Drain - Enhancement mode PG-TO252-5 AEC qualified MSL1 up to 26 C peak reflow 175 C operating temperature Green Product (RoHS compliant) 1% Avalanche tested Type Package Marking ITD5N4S4L-7 PG-TO252-5-311 4T4L7 Maximum ratings, at T j =25 C, unless otherwise specified 4) Parameter Symbol Conditions Value Unit Continuous drain current 1) I D T C =25 C, V GS =1V 5 A T C =1 C, V GS =1V 2) 42 Pulsed drain current 2) I D,pulse T C =25 C 2 Avalanche energy, single pulse 2) E AS I D =25A 45 mj Avalanche current, single pulse I AS - 5 A Gate source voltage V GS - +2/-16 V Power dissipation P tot T C =25 C 46 W Operating and storage temperature T j, T stg - -55... +175 C IEC climatic category; DIN IEC 68-1 - - 55/175/56 Rev. 1. page 1 213-6-5

Parameter Symbol Conditions Values Unit 2), 4) Thermal characteristics min. typ. max. Thermal resistance, junction - case R thjc - - - 3.2 K/W SMD version, device on PCB R thja minimal footprint - - 62 6 cm 2 cooling area 3) - - 4 Electrical characteristics, at T j =25 C, unless otherwise specified Static characteristics 4) Drain-source breakdown voltage V (BR)DSS V GS =V, I D = 1mA 4 - - V Gate threshold voltage V GS(th) V DS =V GS, I D =18µA 1.2 1.7 2.2 Zero gate voltage drain current I DSS V DS =4V, V GS =V, T j =25 C -.1 1 µa V DS =4V, V GS =V, T j =125 C 2) - 1 1 Gate-source leakage current I GSS V GS =2V, V DS =V - - 1 na Drain-source on-state resistance R DS(on) V GS =4.5V, I D =25A - 9. 1.6 mω V GS =1 V, I D =5 A - 5.9 7.2 Rev. 1. page 2 213-6-5

Parameter Symbol Conditions Values Unit min. typ. max. 2), 4) Dynamic characteristics Input capacitance C iss - 1911 248 pf Output capacitance C oss V GS = V, V DS =25 V, f =1 MHz - 37 48 Reverse transfer capacitance C rss - 16 37 Turn-on delay time t d(on) - 5.5 - ns Rise time t r V DD =3V, V GS =1V, - 5.5 - Turn-off delay time t d(off) I D =5A, R G =3.5Ω - 25.5 - Fall time t f - 19. - 2), 4) Gate Charge Characteristics Gate to source charge Q gs - 6.2 8.1 nc Gate to drain charge Q gd V DD =32V, I D =5A, - 2.7 6.3 Gate charge total Q g V GS = to 1V - 25 33 Gate plateau voltage V plateau - 3.2 - V Reverse Diode 4) Diode continous forward current 2) I S T C =25 C - - 5 A Diode pulse current 2) I S,pulse - - 2 Diode forward voltage V SD V GS =V, I F =5A, T j =25 C Reverse recovery time 2) t rr V R =2V, I F =5A, di F /dt =1A/µs -.95 1.3 V - 34 - ns Reverse recovery charge 2) Q rr - 29 - nc 1) Current is limited by bondwire; with an R thjc = 3.2K/W the chip is able to carry 66A at 25 C. 2) Defined by design. Not subject to production test. 3) Device on 4 mm x 4 mm x 1.5 mm epoxy PCB FR4 with 6 cm 2 (one layer, 7 µm thick) copper area for drain connection. PCB is vertical in still air. 4) Per channel Rev. 1. page 3 213-6-5

1 Power dissipation 2 Drain current P tot = f(t C ); V GS 6 V I D = f(t C ); V GS 6 V 5 5 4 4 3 P tot [W] 3 2 2 1 1 5 1 15 2 5 1 15 2 T C [ C] T C [ C] 3 Safe operating area 4 Max. transient thermal impedance, one chip I D = f(v DS ); T C = 25 C; D = Z thjc = f(t p ) parameter: t p parameter: D =t p /T 1 1 1 1 µs.5 1 1 1 µs Z thjc [K/W].1.5 1 1 µs 1-1.1 single pulse 1 ms 1.1 1 1 1 V DS [V] 1-2 1-6 1-5 1-4 1-3 1-2 1-1 1 t p [s] Rev. 1. page 4 213-6-5

5 Typ. output characteristics 6 Typ. drain-source on-state resistance I D = f(v DS ); T j = 25 C R DS(on) = f(i D ); T j = 25 C parameter: V GS 2 parameter: V GS 25 1 V 8 V 23 3.2 V 16 21 7.5 V 19 12 8 1 V R DS(on) [mω] 17 15 13 3.5 V 4 4.5 V 11 9 4 V 4.5 V 3.5 V 2.5 V 1 2 3 4 V DS [V] 7 5 6 V 8 V 1 V 25 5 5 V 7 Typ. transfer characteristics 8 Typ. drain-source on-state resistance I D = f(v GS ); V DS = 6V R DS(on) = f(t j ); I D = 5 A; V GS = 1 V parameter: T j 2 12 25 C -55 C 175 C 15 1 1 R DS(on) [mω] 8 5 6 1.6 2.6 3.6 4.6 5.6 V GS [V] 4-6 -2 2 6 1 14 18 T j [ C] Rev. 1. page 5 213-6-5

9 Typ. gate threshold voltage 1 Typ. capacitances V GS(th) = f(t j ); V GS = V DS C = f(v DS ); V GS = V; f = 1 MHz parameter: I D 2.5 1 4 2 1 3 Ciss V GS(th) [V] 1.5 1 18 µa 18 µa C [pf] 1 2 Crss Coss 1 1.5-6 -2 2 6 1 14 18 T j [ C] 1 5 1 15 2 25 3 35 4 V DS [V] 11 Typical forward diode characteristicis 12 Avalanche characteristics IF = f(v SD ) I A S = f(t AV ) parameter: T j 1 3 parameter: T j(start) 1 1 2 1 C 15 C I F [A] I AV [A] 1 25 C 1 1 175 C C 25 C 1.2.4.6.8 1 1.2 1.4 1 1 1 1 1 V SD [V] t AV [µs] Rev. 1. page 6 213-6-5

13 Avalanche energy 14 Drain-source breakdown voltage E AS = f(t j ) V BR(DSS) = f(t j ); I D = 1 ma parameter: I D 2 44 18 16 14 42 E AS [mj] 12 1 8 12.5 A V BR(DSS) [V] 4 6 4 25 A 38 2 5 A 25 75 125 175 T j [ C] 36-55 -15 25 65 15 145 T j [ C] 15 Typ. gate charge 16 Gate charge waveforms V GS = f(q gate ); I D = 5 A pulsed parameter: V DD 1 V GS 9 8 V 32 V Q g 8 7 6 V GS [V] 5 4 V gs(th) 3 2 1 Q g(th) Q sw Q gate 2 Q gs Q gd Q gate [nc] Rev. 1. page 7 213-6-5

Published by Infineon Technologies AG 81726 Munich, Germany Infineon Technologies AG 213 All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 1. page 8 213-6-5

Revision History Version Revision.1 Revision 1. Date 8.4.211 5.6.213 Changes Initial target data sheet Final Datasheet Rev. 1. page 9 213-6-5