OptiMOS P Small-Signal-Transistor Features P-channel Enhancement mode Super Logic Level (.5V rated) Avalanche rated Qualified according to AEC Q % lead-free; RoHS compliant Product Summary V DS - V R DS(on),max V GS =-4.5 V 5 mω V GS =-.5 V 8 I D -.5 A PG-SOT3 3 Halogen-free according to IEC649-- Type Package Tape and Reel Information Marking Lead Free Packing BSS5P PG-SOT3 H637: 3 pcs/ reel YDs Yes Non dry Maximum ratings, at T j =5 C, unless otherwise specified Parameter Symbol Conditions Value Unit Continuous drain current I D T A =5 C -.5 A T A =7 C -.8 Pulsed drain current I D,pulse T A =5 C -6 Avalanche energy, single pulse E AS I D =-.5 A, R GS =5 Ω mj Reverse diode dv /dt dv /dt I D =-.5 A, V DS =-6V, di /dt =-A/µs, T j,max =5 C 6 kv/µs Gate source voltage V GS ± V Power dissipation ) P tot T A =5 C.5 W Operating and storage temperature T j, T stg -55... 5 C ESD Class JESD-A4 -HBM (<5V) V Soldering Temperature 6 C C IEC climatic category; DIN IEC 68-55/5/56 C Rev.3 page -7-8
Parameter Symbol Conditions Values Unit min. typ. max. Thermal characteristics Thermal resistance, junction - ambient R thja minimal footprint ) - - 5 K/W Electrical characteristics, at T j =5 C, unless otherwise specified Static characteristics Drain-source breakdown voltage V (BR)DSS V GS = V, I D =-5 µa - - - V Gate threshold voltage V GS(th) V DS =V GS, I D =- µa -. -.9 -.6 Drain-source leakage current I DSS V DS =-V, V GS = V, T j =5 C - - - μa V DS =-V, V GS =V, T j =5 C - - - Gate-source leakage current I GSS V GS =-V, V DS =V - - - na V Drain-source on-state resistance R GS =.5 V, DS(on) I D =-. A V GS =4.5 V, I D =-.5 A Transconductance g fs V DS > I D R DS(on)max, I D =.8 A - 66 8 mω - 5 5-4.5 - S ) Performed on 4mm FR4 PCB. The traces are mm wide, 7μm thick and mm long; they are present on both sides of the PCB. Rev.3 page -7-8
Parameter Symbol Conditions Values Unit min. typ. max. Dynamic characteristics Input capacitance C iss - 6 346 pf Output capacitance C oss V GS = V, V DS =-5 V, f = MHz - 35 Reverse transfer capacitance C rss - 85 8 Turn-on delay time t d(on) - 6.7 - ns Rise time t r V DD =- V, V GS =-4.5 V, - 9.7 - Turn-off delay time t d(off) I D =-.5 A, R G =6 Ω - 4.5 - Fall time t f - 4. - Gate Charge Characteristics Gate to source charge Q gs - -.49 - nc Gate to drain charge Q gd V DD =6 V, - -.9 - I D =-.5 A, Gate charge total Q g V GS = to -4.5 V - -3.6 - Gate plateau voltage V plateau - -.9 - V Reverse Diode Diode continous forward current I S - - -.5 A T A =5 C Diode pulse current I S,pulse - - -6 Diode forward voltage V SD V GS = V, I F =-.5 A, T j =5 C - -.8 -. V Reverse recovery time t rr V R = V, I F =-.5 A, -. - ns Reverse recovery charge Q rr di F /dt = A/µs - -3.7 - nc Rev.3 page 3-7-8
Power dissipation Drain current P tot =f(t A ) I D =f(t A ); V GS -4.5 V.5.5.375 P tot [W].5.5.5 4 8 T A [ C] 4 8 6 T A [ C] 3 Safe operating area 4 Max. transient thermal impedance I D =f(v DS ); T A =5 C; D = Z thja =f(t p ) parameter: t p parameter: D =t p /T µs 3 µs µs ms.5. ms. - Z thja [K/W].5.. DC single pulse - -3 - - -5-4 -3 - - V DS [V] t p [s] Rev.3 page 4-7-8
5 Typ. output characteristics 6 Typ. drain-source on resistance I D =f(v DS ); T j =5 C R DS(on) =f(i D ); T j =5 C parameter: V GS 7 parameter: V GS 5 6 5 V 3.3 V.5 V 45 4.8 V V 5 V 35 4 3.3 V R DS(on) [mω] 3 5.5 V.3 V V 5 3.3 V.8 V 5 5 V V 7 V 3 V DS [V] 3 4 7 Typ. transfer characteristics 8 Typ. forward transconductance I D =f(v GS ); V DS > I D R DS(on)max g fs =f(i D ); T j =5 C 6 5 8 4 6 3 g fs [S] 4 5 C 5 C 3 V GS [V] 4 6 8 Rev.3 page 5-7-8
9 Drain-source on-state resistance Typ. gate threshold voltage R DS(on) =f(t j ); I D =-.5 A; V GS =-4.5 V V GS(th) =f(t j ); V DS =V GS ; I D =- µa parameter: I D 4.6 6 98 %. 98 % R DS(on) [mω] typ V GS(th) [V].8 typ 8 %.4 4-6 - 6 4 8 T j [ C] -6-6 4 8 T j [ C] Typ. capacitances Forward characteristics of reverse diode C =f(v DS ); V GS = V; f = MHz; T j =5 C I F =f(v SD ) parameter: T j 3 Ciss 5 C, 98% C [pf] Coss Crss I F [A] - 5 C 5 C, 98% 5 C - 5 5 V DS [V] -3.4.8..6 V SD [V] Rev.3 page 6-7-8
3 Avalanche characteristics 4 Typ. gate charge I AS =f(t AV ); R GS =5 Ω parameter: T j(start) V GS =f(q gate ); I D =-.5 A pulsed parameter: V DD 6 5 4 V V 6 V 4 I AV [A] C 5 C V GS [V] 3 5 C - t AV [µs] 3 3 4 5 Q gate [nc] 5 Drain-source breakdown voltage 6 Gate charge waveforms V BR(DSS) =f(t j ); I D =5 µa 4 V GS 3 Q g V BR(DSS) [V] 9 V gs(th) 8 7 Q g(th) Q sw Q gate 6-6 - 6 4 T j [ C] Q gs Q gd Rev.3 page 7-7-8
SOT3 Package Outline: Footprint: Packaging: Rev.3 page 8-7-8
Published by Infineon Technologies AG 876 Munich, Germany 8 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev.3 page 9-7-8