FPGA RF eck A[0..] A[0..] A[0..] MHZ MHZ Sheet 0MHZ MHZ 0MHZ MHZ LOKS 0MHZ MHZ Sheet OE Sheet A FPGA_ PWM[0..] USR[0..] A FPGA_ PWM[0..] USR[0..] A Sheet FPGA_ PWM[0..] USR[0..] opyright 00, Phil Harman, VKAPH and Lyle Johnson, KKP. Penelope: TOP HPSR0000 A ate: Tuesday, January, 00 Sheet of
U V ONT 0 MHz ALT U V 0MHZ 0MHZ ONT 0 MHz Install U or U, NOT both! R 0R0 U R 0R0 MHZ V MHZ R0 R 00 nf ONT. MHz K K0 R V L FERRITE 00 nf 0 uf/.v 0 n 0 nf K 0 nf nf nf Install or, NOT both! R 00R Install or, NOT both! J U A R MHZ Y 0 Z RE E LVS V SNLVM0 00 nf opyright 00, Phil Harman, VKAPH and Lyle Johnson, KKP. Penelope: locks HPSR0000 A ate: Tuesday, January, 00 Sheet of
U0 0 uf/.v FL USR[0..] USR[0..] SIN RLINEIN 0 uf/.v SLK LLINEIN 0 PWM[0..] S FL PWM[0..] R MOE L 0 uf/.v IN RHP 0 0 uf/.v LHP LK JP LRIN R0 R 0 0 uf/.v LR MIN K0 K0 MI AU U USR0 O0 XTI/MLK MIAS FL USR O J USR O ATS V USR O MI USR FL O USR R K0 O XTO VMI USR 0 O OREF LK V JP V ULN00A AV 0 uf/.v 00 nf V MI IAS JP V 0 uf/.v 00 nf HPV AVSS VSS Q HP AT FPGA_ FPGA_ N00K TLV0AI J R 0R R K0 V R 0K 0 pf OREF O O L FERRITE FL O U O V A O A IN AIN O 00 nf 0 uf/.v SLK AIN O0 AIN S AIN AIN FL U R K0 AIN 0 PWM0 AIN AIN V V AV PWM R K0 V 00 nf IN opyright 00, Phil Harman, VKAPH and Lyle Johnson, KKP. R 00R A U A R K0 PWM R 00R OPA0 Penelope: OE HPSR0000 A ate: Tuesday, January, 00 Sheet of OPA0 FL 0 nf 0 nf 00 nf L FERRITE A AH0IMT FL R 00R P ANALOG U OPA0 0 uf/.v 0 0 S 0 nf 00 nf
PLL LOK opyright 00, Phil Harman, VKAPH and Lyle Johnson, KKP. HPSR0000 A Penelope: FPGA Tuesday, January, 00 ate: Sheet of MSEL0 MSEL A A ISK 0 A A0 SOAK A 0 A A A ISK A A ISA A SOAK A A A A A ISA A A A A A[0..] FPGA_ nnf 0 nnf 0 nstat nstat 0 MHZ 0MHZ A LE LE LE LE USR[0..] A PWN[0..] A A A A LE LE LE LE LE LE LE LE FPGA_ USR USR USR USR USR USR USR0 A PWM0 PWM PWM ISA ISK nnf A A A A 0 A A0 A A A A A 0 A A A SOAK A A A A A A0 A 0 A A A A A A A A A 0 A A ISA A A ISK A0 A A A A0 A A A A A A A A A 0MHZ MHZ VA V VA V V V V V US US US US US US US US V V VA V V VA V V V US V V V V V US US US V 00 nf 0 00 nf U EPPQ0 0 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 / /O /R_ERR /LKUSR LK0 LK nonfig LK LK /PLL_P /PLL_N _PLL _PLL _PLL A_PLL A_PLL INIT_/ O/ nstatus ONF_ MSEL MSEL0 LK LK LK LK /PLL_P /PLL_N _PLL _PLL _PLL A_PLL A_PLL R K0 0 uf/.v 00 nf 00 nf RP 00K 0 00 nf TP 00 nf 00 nf R K0 RP K 0 LE RE L0 FERRITE RP 00K 0 0 uf/.v RP 00K 0 P SONFIG 0 JP I YP RP 00K 0 LE RE JP ONFIGA P ALTERA JTAG 0 00 nf 00 nf 0 00 nf LE RE JP LAST JTAG 00 nf JP ONE WIRE LE RE TP R0 K0 JP0 I YP 00 nf P 0 0 0 0 LE RE PA 0 A A A A A A A A A A0 A A A A A A A A A A0 A A A A A A A A A A0 A A 00 nf JP ONFIG R 0K U LTR AJ IN 0 00 nf LE RE U EPS S ATA ASI RP 00K 0 RP 00K 0 U SP I/O 00 nf 0 uf/.v 00 nf U FANSX AJ IN 00 nf R K0 00 nf L FERRITE 00 nf LE RE RP 0K 0 00 nf P 0 0 0 0 J ALT POWER A[0..] FPGA_ 0MHZ MHZ A USR[0..] PWM[0..]
V L FERRITE 00 nf VA 0 uf/.v L FERRITE 0. pf /. 0 pf % 0 pf % V V 00 nf 0 uf/.v L 0 nh L 0 nh L 0 nh R K0 US A[0..] A0 A A A A A A A A A A0 A A A 0 U 0 0 UTA UT R T pf % JP 0 pf % 00 pf % TT EXT FIL EXT FIL T FSAJ 00 nf R K0 REF TT 0 uf/v REFLO R0 00 nf AT. U AV K VA AOM 0 00 nf R 00R OPAI R MHZ LK V MHZ V R V 00 nf MOE SLEEP OM R K0 R K0 UA T AARU JP RF 00 nf R K0 R UA R 00K 00 nf T U J R LMAM XVTR/PA opyright 00, Phil Harman, VKAPH and Lyle Johnson, KKP. 0 LMAM SMA A 00 nf 00K R R A R 0K 0K T R 0K J is OPTNAL and NOT ILUE in kits or assemblies. AT R 00K Penelope: RF eck V 00 nf HPSR0000 A ate: Wednesday, January, 00 Sheet of OPAI A[0..] 0R JP pf % R 00R L FERRITE R R R 00R J Antenna/PA AT L FERRITE 00 nf