crystals were phase-pure as determined by x-ray diffraction. Atomically thin MoS 2 flakes were

Similar documents
Contact Engineering of Two-Dimensional Layered Semiconductors beyond Graphene

Wafer Scale Homogeneous Bilayer Graphene Films by. Chemical Vapor Deposition

Supplementary information for Nonvolatile Memory Cells Based on MoS 2 /Graphene Heterostructures

Supporting Information

Supplementary Information

A. Optimizing the growth conditions of large-scale graphene films

SUPPLEMENTARY INFORMATION

Supporting Online Material for

Supporting Information for: Electrical probing and tuning of molecular. physisorption on graphene

SUPPLEMENTARY INFORMATION. Observation of tunable electrical bandgap in large-area twisted bilayer graphene synthesized by chemical vapor deposition

Supporting Information

Two-Dimensional (C 4 H 9 NH 3 ) 2 PbBr 4 Perovskite Crystals for. High-Performance Photodetector. Supporting Information for

Supporting information

Multicolor Graphene Nanoribbon/Semiconductor Nanowire. Heterojunction Light-Emitting Diodes

Supporting Information

Supplementary Information for

Fermi Level Pinning at Electrical Metal Contacts. of Monolayer Molybdenum Dichalcogenides

Supporting Information

Intrinsic Electronic Transport Properties of High. Information

(a) (b) Supplementary Figure 1. (a) (b) (a) Supplementary Figure 2. (a) (b) (c) (d) (e)

Wafer-Scale Single-Domain-Like Graphene by. Defect-Selective Atomic Layer Deposition of

Spin-Conserving Resonant Tunneling in Twist- Supporting Information

Supplementary materials for: Large scale arrays of single layer graphene resonators

Supplementary Figure 1 Dark-field optical images of as prepared PMMA-assisted transferred CVD graphene films on silicon substrates (a) and the one

Graphene photodetectors with ultra-broadband and high responsivity at room temperature

Supplementary Figure 1: Micromechanical cleavage of graphene on oxygen plasma treated Si/SiO2. Supplementary Figure 2: Comparison of hbn yield.

2D-2D tunneling field effect transistors using

Supplementary Figure 1 Experimental setup for crystal growth. Schematic drawing of the experimental setup for C 8 -BTBT crystal growth.

Controlling Graphene Ultrafast Hot Carrier Response from Metal-like. to Semiconductor-like by Electrostatic Gating

Supporting Information for: Sustained sub-60 mv/decade switching via the negative capacitance effect in MoS 2 transistors

Low Temperature Plasma CVD Grown Graphene by Microwave Surface-Wave Plasma CVD Using Camphor Precursor

Supplementary Figure S1. AFM images of GraNRs grown with standard growth process. Each of these pictures show GraNRs prepared independently,

Supplementary Information

Large Scale Direct Synthesis of Graphene on Sapphire and Transfer-free Device Fabrication

Modulation-Doped Growth of Mosaic Graphene with Single Crystalline. p-n Junctions for Efficient Photocurrent Generation

Supplementary Information for. Origin of New Broad Raman D and G Peaks in Annealed Graphene

Supporting information. Gate-optimized thermoelectric power factor in ultrathin WSe2 single crystals

Electric Field-Dependent Charge-Carrier Velocity in Semiconducting Carbon. Nanotubes. Yung-Fu Chen and M. S. Fuhrer

Supplementary Figure 1 Detailed illustration on the fabrication process of templatestripped

Supplementary Figure 1. Selected area electron diffraction (SAED) of bilayer graphene and tblg. (a) AB

Highly Confined Tunable Mid-Infrared Plasmonics in Graphene Nanoresonators

Stretchable Graphene Transistors with Printed Dielectrics and Gate Electrodes

Fundamentals of the Metal Oxide Semiconductor Field-Effect Transistor

A Novel Approach to the Layer Number-Controlled and Grain Size- Controlled Growth of High Quality Graphene for Nanoelectronics

Supplementary Information. High-Performance, Transparent and Stretchable Electrodes using. Graphene-Metal Nanowire Hybrid Structures

UNIVERSITY OF CALIFORNIA College of Engineering Department of Electrical Engineering and Computer Sciences. EECS 130 Professor Ali Javey Fall 2006

Supplementary material for High responsivity mid-infrared graphene detectors with antenna-enhanced photo-carrier generation and collection

NiCl2 Solution concentration. Etching Duration. Aspect ratio. Experiment Atmosphere Temperature. Length(µm) Width (nm) Ar:H2=9:1, 150Pa

SUPPLEMENTARY INFORMATION

2D Materials for Gas Sensing

Supporting Information. Fast Synthesis of High-Performance Graphene by Rapid Thermal Chemical Vapor Deposition

Figure 1: Graphene release, transfer and stacking processes. The graphene stacking began with CVD

SUPPLEMENTARY INFORMATION

Highly Conductive 3D Nano-Carbon: Stacked Multilayer Graphene System with Interlayer Decoupling

Two-Dimensional Thickness-Dependent Avalanche Breakdown Phenomena in MoS 2 Field Effect Transistors under High Electric Fields

Graphene Chemical Vapor Deposition (CVD) Growth

Supplementary Figure S1. AFM characterizations and topographical defects of h- BN films on silica substrates. (a) (c) show the AFM height

Hopping in CVD Grown Single-layer MoS 2

Stretchable, Transparent Graphene Interconnects for Arrays of. Microscale Inorganic Light Emitting Diodes on Rubber

Electrical Transport Measurements Show Intrinsic Doping and Hysteresis in Graphene p-n Junction Devices

Supplementary information for Tunneling Spectroscopy of Graphene-Boron Nitride Heterostructures

Solvothermal Reduction of Chemically Exfoliated Graphene Sheets

Metallic: 2n 1. +n 2. =3q Armchair structure always metallic = 2

Electrical Contacts to Carbon Nanotubes Down to 1nm in Diameter

Supplementary Figure 1. Supplementary Figure 1 Characterization of another locally gated PN junction based on boron

Drift-diffusion model for single layer transition metal dichalcogenide field-effect transistors

Supporting Information

Lecture 0: Introduction

Self-study problems and questions Processing and Device Technology, FFF110/FYSD13

Supporting information

ECE 340 Lecture 39 : MOS Capacitor II

Ultrafast Lateral Photo-Dember Effect in Graphene. Induced by Nonequilibrium Hot Carrier Dynamics

Extrinsic Origin of Persistent Photoconductivity in

Supporting Information

Section 12: Intro to Devices

Supplementary Methods A. Sample fabrication

A Bottom-gate Depletion-mode Nanowire Field Effect Transistor (NWFET) Model Including a Schottky Diode Model

Supplementary Figure 1 shows overall fabrication process and detailed illustrations are given

Low-Resistance 2D/2D Ohmic Contacts: A Universal Approach to High-Performance WSe 2, MoS 2, and MoSe 2 Transistors

Ferroelectric Field-Effect Transistors Based on MoS 2 and

Final Examination EE 130 December 16, 1997 Time allotted: 180 minutes

Enhancing the Performance of Organic Thin-Film Transistor using a Buffer Layer

Wafer-scale fabrication of graphene

Transport Properties of Graphene Nanoribbon Transistors on. Chemical-Vapor-Deposition Grown Wafer-Scale Graphene

Electrical Characteristics of Multilayer MoS 2 FET s

Graphene FETs EE439 FINAL PROJECT. Yiwen Meng Su Ai

1 Name: Student number: DEPARTMENT OF PHYSICS AND PHYSICAL OCEANOGRAPHY MEMORIAL UNIVERSITY OF NEWFOUNDLAND. Fall :00-11:00

Supporting Information Available:

Observation of topological surface state quantum Hall effect in an intrinsic three-dimensional topological insulator

Field effect = Induction of an electronic charge due to an electric field Example: Planar capacitor

Woo Jin Hyun, Ethan B. Secor, Mark C. Hersam, C. Daniel Frisbie,* and Lorraine F. Francis*

Supplementary Information. Graphene field-effect transistor array with integrated electrolytic gates. scaled to 200 mm

Steep-slope WSe 2 Negative Capacitance Field-effect Transistor

Lecture 04 Review of MOSFET

Supporting Information

Monolayer Semiconductors

Graphene devices and integration: A primer on challenges

SUPPLEMENTARY INFORMATION

High Performance, Low Operating Voltage n-type Organic Field Effect Transistor Based on Inorganic-Organic Bilayer Dielectric System

Chemical Vapor Deposition Graphene Grown on Peeled- Off Epitaxial Cu(111) Foil: A Simple Approach to Improved Properties

Transcription:

Nano Letters (214) Supplementary Information for High Mobility WSe 2 p- and n-type Field Effect Transistors Contacted by Highly Doped Graphene for Low-Resistance Contacts Hsun-Jen Chuang, Xuebin Tan, Nirmal Jeevi Ghimire, Meeghage Madusanka Perera Bhim Chamlagain, Mark Ming-Cheng Cheng, Jiaqiang Yan, David Mandrus, David Tománek and Zhixian Zhou 1. Sample preparation and device fabrication WSe 2 crystals were synthesized by chemical vapor transport using iodine as transport agent. The asgrown crystals were phase-pure as determined by x-ray diffraction. Atomically thin MoS 2 flakes were produced from the bulk crystal by a mechanical cleavage method and subsequently transferred onto degenerately doped silicon substrate covered with a 29 nm-thick thermal oxide layer. An optical microscope was used to identify thin flakes, which were further characterized by Park Systems atomic force microscopy (AFM) in the non-contact mode. Thin h-bn crystals (1-5 nm thick) were first exfoliated from commercially available h-bn crystals onto a PDMS stamp. Using a home-built precision transfer stage, they were subsequently transferred onto a few-layer WSe 2 flake to cover its middle section while exposing its two ends for electrical contacts. The graphene used in this study was grown on copper using a chemical vapor deposition (CVD) method. 1-3 Briefly, the CVD graphene was grown on a 25 µm thick copper foil (Alfa Aesar) in a mixture of methane and hydrogen at 1 o C. A layer of 2 nm thick Poly(methyl methacrylate) (PMMA) was spin-coated and dried at room temperature. After removing the graphene on the back side of the copper using oxygen plasma, the copper foil was etched away using diluted copper etchant (APS-1) for 24 hours. The PMMA/graphene film was cleaned using a modified RCA cleaning procedure. 2 PMMA/graphene films were transferred onto the silicon substrate with a fewlayer WSe 2 sample by carefully scooping it out from the solution. Finally, PMMA was dissolved by acetone. Electron beam lithography and oxygen plasma etching were used to pattern the graphene electrodes. Metal electrodes, consisting of 5 nm of Ti covered by 5 nm of Au, were fabricated to electrically wire up the graphene electrodes using standard electron beam lithography (EBL) and electron 1

beam deposition. Ionic liquid gate electrodes were also fabricated in the same step. A schematic illustration of the dry transfer process used to passivate the WSe 2 channel with a clean h-bn microcrystal is presented in Figure S1. Figure S1. Schematic illustration of the process to cover the WSe 2 channel with a h-bn crystal using a transfer stage equipped with a micromanipulator and a long working distance microscope objective. 2. Transfer characteristics and field-effect mobility of an Al 2 O 3 passivated WSe 2 device 2

For the sake of comparison, we have also measured a graphene-contacted WSe 2 device with its channel passivated with 5 nm of electron beam deposited Al 2 O 3. Figures S2a and S2b show the transfer characteristics of the device, while the graphene contacts have been either highly "p-doped by applying a very high ionic liquid (IL) gate voltage of -6 V or n-doped" by applying an IL gate voltage of +6V. Clearly, the threshold voltage for both the hole and electron channels in the Al 2 O 3 passivated device is much larger than in the h-bn passivated device shown in Figure 4 of the main manuscript. Figure S2c shows that the field-effect mobility is also much lower in the Al 2 O 3 passivated device than in the h-bn passivated device, which can be attributed to additional charge traps and interface roughness introduced by Al 2 O 3. (a) 1 1 1 1-1 V = - 6 V ILg V ds = 1 mv (b) 1 2 1 1 1 1-1 = 6 V V ds = 1 mv 1-2 1-2 1-3 (c) 1-3 -1-5 5 2 1-4 -4 4 8 12 V bg (V) 15 = 6 V 1 5 = - 6 V 6 1 14 18 T(K) Figure S2 (a-b) Transfer characteristics of a 7 nm thick WSe 2 FETs with ionic-liquid gated graphene contacts, measured at = -6 V (hole channel) and = 6 V (electron channel). (c) Field-effect mobility of the devices in the hole- ( = -6 V) and electron-doped ( = 6 V) regions. 3

3. Output, transfer characteristics and field effect mobility of a bear WSe 2 device As shown in Figures S3a and S3b, the output characteristics of a 8 nm thick bear, i.e. not passivated WSe 2 channel with IL-gate graphene contacts shows Ohmic behavior. The highest current in this device approaches 2 µa/µm at 4. µm channel length at the back-gate voltage V bg = 1 V, drain-source voltage V ds = -5 V, and IL-gate voltage = -4.5 V. The transfer characteristics of the bear WSe 2 device is qualitatively consistent with that of the h-bn passivated devices. However, the ON/OFF ratio in the bear device is substantially reduced due to the IL-gating of the channel as well, especially at high IL-gate voltages, as seen in Figure S3c. Figures S3e and S3f show the field-effect mobility of the bear WSe 2 device for both the hole and electron channels. The mobility observed in the bear sample is also smaller in comparison to the h-bn passivated device discussed in the main text, further indicating that channel passivation with ultraclean h-bn is critical for studying intrinsic channel properties. 4

(a) V bg = 6 V (b) 6 V bg = 8 V (c) -5-1 V -2 V -4 V -6 V -15-8 V = -4.5 V -1 V -2-6 -4-2 V (V) ds (d) 4 2 18 K V = 5 V ILg 7 V 6 V 5 V 5 V 4 V 2 V 1 2 3 V (V) ds.4 Vgs-Id#1_77K_2_-1mV@8_-1V_Vtg_-2.5V = -4.5 V.4 Vgs-Id#1_77K_1_1mV@3_8V_Vtg_1V = 5 V.3.3.2-3.5 V.2 4 V (e) V = -1 mv ds.1-3 V -2.5 V -15-1 -5 5 1 (f) 3 V.1 V = 1 mv ds 2 V 1 V -2 2 4 6 8 1 WSe2_5-3-13_no4_-61_55_mobility_vs_T_vs_Vtg 2:35:24 PM 7/23/213 WSe2_5-3-13_no4_-61_55_mobility_vs_T_vs_Vtg 2:4:32 PM 7/23/213 1 = -4.5 V 25 6 15 = 5 V 2 5 5 1 15 2 T(K) 5 1 15 2 T(K) Figure S3. An 8 nm thick WSe 2 FET device with a channel length of L = 4 µm and IL-gated graphene contacts. (a-b) Output characteristics for the hole and electron channels. (c-d) Transfer characteristics for the hole and electron channels. (e-f) Field effect mobility extracted from the low-bias (V ds = 1 mv) transfer characteristics for the hole and electron channels. 5

4. Estimation of the contact resistance from a short-channel WSe 2 device Figure S4a shows the output characteristics of a short-channel device (channel length L 2 nm) with IL-gated graphene contacts. The ON-state resistance of the device, measured at a high ILgate voltage and a high back-gate voltage in the linear low drain-source voltage region between electrodes labeled 3L and 4 in Figure S4c, is determined to be 5 kω. This resistance consists of the metal/graphene contact resistance, the graphene electrode sheet resistance, the WSe 2 channel resistance, and the graphene/ WSe 2 contact resistance. To isolate the contact resistance of the graphene/wse 2 junctions, we also measured the resistance of a graphene sheet and the graphene/metal contacts separately. As shown in Figure S4b, the total resistance measured between electrodes 2L and 2R in Figure S4c is 2.2 kω. As suggested by the device layout in Figure S4c, i) the total resistance between electrodes 2L and 2R should be comparable to that between electrodes 3L and 3R; and ii) the metal/graphene contact resistance and graphene electrode sheet resistance are likely much smaller for electrode 4 than electrode 3L, given the much longer metal/graphene contact length and smaller L/W ratio for electrode 4 than 3L. Therefore, the maximum contact resistance of a graphene/wse 2 junction is estimated to be R c = (R ON -R G-ele ) /2 = (5 kω- 2.2 kω/2)/2 2 kω. Since the width of this particular WSe 2 sample is 1. µm, the normalized contact resistance of the graphene/wse 2 junction is less than 2 kω µm. In order to quantitatively study the graphene/wse 2 junction and the intrinsic WSe 2 channel properties, it is important to minimize the graphene sheet resistance and graphene/metal contact resistance. Low sheet resistance of ~1 Ω/sq has been obtained in monolayer graphene that had been electrostatically doped up to 3 1 13 cm -2 by ferroelectric dipoles 4. Low metal/graphene contact resistance of the order of 1 2 Ω μm has been routinely achieved by selecting proper contact metal 5. The graphene sheet resistance and the graphene/metal contact resistance can be further minimized (i) by shaping the graphene electrodes in such a way that the metal/graphene contact area is much larger than that of the graphene/wse 2 interface, and (ii) by electrostatically doping the graphene electrodes up to a very high carrier concentration of ~1 14 cm -2 using an IL. 6

(a) 2 15 = 6 V R ON =R c + R G-ele V bg = 8 V (b) 3 2 = 6 V 1 = 5 k 6 V R G-ele = 2.2 k 5 4 V 2 V 1 ( c).4.8 1.2 V (V) ds -4-2 2 4 Figure S4. (a) Output characteristics of a short channel (L 2 nm) WSe 2 device shown between electrodes 3L/3R and 4, depicted in panel (c), at a high IL-gate voltage of 6 V. (b) The resistance of a graphene FET device between electrodes 2L and 2R, depicted in panel (c), at a high IL-gate voltage of 6 V. (c) Optical micrograph of a 8 nm think WSe 2 sample contacted by graphene electrodes in the area highlighted by the white dashed lines. The channel length between electrodes 3L/3R and 4 is about 2 nm. 7

5. Conductance versus back-gate voltage curves corresponding to the opposite sweeping directions of a double-sweep measurement (a) 8 6 4 1 K 12 K 14 K 16 K (b) 8 6 4 1 K 12 K 14 K 16 K (c) 2 V = 6 V ILg V = 1 mv ds -2 2 4 6 8 1 5 12 K 4 16 K 3 2 1 = -7 V V ds = -1 mv -1-8 -6-4 -2 2 (d) 5 1 2 4 12 K V = 6 V ILg V = 1 mv ds -2 2 4 6 8 1 V bg (V) 16 K 3 V = -7 V ILg 2 V = -1 mv ds n MIT = (V MIT - V th )C bg /e = 1.1 X 1-12 cm -2-1 -8-6 -4-2 2 Figure S5. Temperature dependent two-terminal conductivity as a function of the gate voltage for the WSe 2 device shown in Figure 2 of the main text with dual-gate sweep directions, obtained after it was cooled down from 23 K at the IL gate voltages (a-b) = 6 V and (c-d) = -7 V. The direction of the gate sweep is indicated by the arrow in the figure. 6. Transfer characteristics of a graphene FET on WSe 2 substrate. Field-effect mobility is extracted from the V bg dependence of σ using the expression µ=(1/c bg ) (dσ/ dv bg ) in the linear region of the σ vs V bg curves, where C bg is the back-gate capacitance per unit area. Based on a simple parallel-plate capacitor model, C bg is determined to be 1.2 1-8 F cm -2 for 29 nm SiO 2 (C bg = 8

3.9 ε /29 nm). We have previously shown that the IL deposited on our FET devices is unlikely to change the back-gate capacitance of the device below the freezing temperature of the IL. 6 To further rule out the possibility of the IL droplet changing the back-gate capacitance in our graphene-contacted WSe 2 devices even below the freezing temperature of the IL, we have measured the transfer characteristics of a graphene FET fabricated on WSe 2 before and after depositing the IL. Figure S6 shows that the overall shape of the transfer curve of a graphene FET on the WSe 2 substrate does not change after depositing IL with the exception of the Dirac point, which is slightly shifted due to the small amount of IL-induced doping. This further confirms that the deposition of the IL on our devices does not change the back-gate capacitance. 6 5 4 3 2 1 = V Before IL deposition -6-4 -2 2 4 6 Figure S6. Conductance of a graphene FET device on WSe 2 substrate as a function of the back-gate voltage before and after deposition of the ionic liquid. 7. Change of the graphene work function caused by gating The Fermi energy of a graphene monolayer changes as ΔE F =(h/2π)v F (π n) ½, where v F = 1.1 1 6 m/s is the Fermi velocity and n is the carrier density. The Fermi energy of a graphene monolayer is expected to be tunable by up to ±1.5 ev using an IL gate due to its extremely large electric double layer (EDL) capacitance. Such a wide range of Fermi energy tunability in graphene enables us to continuously change the work function of graphene from ~ 3 ev to ~6 ev, opening up the possibility of controllably making low-resistance Ohmic contacts with a vanishing or even negative Schottky barrier for both the electrons and holes in most semiconducting TMDs. In addition 9

to lowering the contact barrier at the graphene/tmd interface, the high carrier density induced by the IL gating is also expected to reduce the sheet resistance of graphene. 1. Li, X. S.; Cai, W. W.; An, J. H.; Kim, S.; Nah, J.; Yang, D. X.; Piner, R.; Velamakanni, A.; Jung, I.; Tutuc, E.; Banerjee, S. K.; Colombo, L.; Ruoff, R. S. Science 29, 324, (5932), 1312 1314. 2. Liang, X. L.; Sperling, B. A.; Calizo, I.; Cheng, G. J.; Hacker, C. A.; Zhang, Q.; Obeng, Y.; Yan, K.; Peng, H. L.; Li, Q. L.; Zhu, X. X.; Yuan, H.; Walker, A. R. H.; Liu, Z. F.; Peng, L. M.; Richter, C. A. Acs Nano 211, 5, (11), 9144 9153. 3. Tan, X.; Chuang, H. J.; Lin, M. W.; Zhou, Z.; Cheng, M. M. C. The Journal of Physical Chemistry C 213, 117, (51), 27155 2716. 4. Ni, G. X.; Zheng, Y.; Bae, S.; Tan, C. Y.; Kahya, O.; Wu, J.; Hong, B. H.; Yao, K.; Özyilmaz, B. ACS Nano 212, 6, (5), 3935 3942. 5. Xia, F.; Perebeinos, V.; Lin, Y. m.; Wu, Y.; Avouris, P. Nat Nano 211, 6, (3), 179 184. 6. Perera, M. M.; Lin, M. W.; Chuang, H. J.; Chamlagain, B. P.; Wang, C.; Tan, X.; Cheng, M. M. C.; Tománek, D.; Zhou, Z. ACS Nano 213, 7, (5), 4449 4458. 1