Thermal behavir f Surface Munt Device (SMD) fr Spicer case Sandip Kumar Saha, Frederik Rgiers, Martine Baelmans sandipkumar.saha@mech.kuleuven.be 3 th Octber 20
Outline Thermal analysis f existing Spicer test case SMD: thermal characterizatin f PCB PCB with thermal via Case studies with SMD
Spicer test case Cnsists f sme thrugh-hle MOSFET transistrs These are munted n tw cling clamps which are cnnected t the husing
Thermal analysis f the present test case Side surface is expsed t ambient Adiabatic cnditin Cntact resistance Spreading resistance due t change in area Bttm is expsed t ambient Thermal resistance netwrk is cnstructed Heat transfer thrugh the leads t the PCB is neglected as the thermal resistance f leads is high Heat transfer t ambient by natural cnvectin (h = 0 W/m 2.K) Steady state thermal analysis is carried ut by resistance netwrk mdel
Thermal resistance netwrk q = Ttal pwer f 7 chips, W q 2 = Ttal pwer f 2 chips, W T a,s and T a,b = ambient temperatures at side and bttm f the husing (T a,s =T a,b = T a ) R al,i = Thermal resistance f aluminum bar (K/W) and i =,., 5 R a = Cnvective resistance t ambient (K/W) R sp,j = Spreading resistance (K/W) and j =,., 3 R cnt = Cntact resistance (K/W) R f = Fin resistance (K/W) Hw t calculate?
Thermal resistance Surface area nrmal t the directin f heat transfer (A) Thickness (t) ΔT (Temperature difference). Q Steady state: Thermal resistance [K/W] - Cnductin R = t / (ka) - Cnvectin R = / (ha) V T R=V/I T R = Q
Spreading resistance q k d surce 2 k q d surce t k t 2 2 2 t t d plate d plate R = R + R T D S R T = ttal thermal resistance R D = thermal resistance assuming full area available fr heat cnductin = underestimatin f R T R S = spreading resistance = crrectin fr R D Maximum and average resistance fr R s, crrespnding t max. and av. T in surce Heat equatin can be quasi-exactly slved numerically (FEM r CFD)
Spreading resistance: Analytical estimatin Apprximate frmulatin (Lee): R0 = thermal resistance at bttm side A = area f the heat surce A s p = area f the base plate Ref: Lee, S., Sng, S., Au, V., and Mran, K.P., Cnstrictin/Spreading Resistance Mdel fr Electrnic Packaging, Prceedings f ASME/JSME Engineering Cnference, Vl. 4, 995. R S Ap AS λkapr0 + tanh( λt) = k π AA + λka R tanh( λt) p S p 0 3/2 π λ = + A p A S R = R + R This frmulatin is used in T D S the calculatin
Validatin f Lee s apprximate mdel with numerical results Rati f PCB t chip surface area: 400 Heat transfer cefficient at bttm: 0 W/m 2.K T j Five thermal cnductivities are used 40 30 Analytical & insulated tp Relative predictin (%) 20 0 0-0 -20-30 -40 Numerical & tp h = 0 W/m².K 0,268 4 25 237 390 h bttm = 0 W/m².K Very gd agreement between Lee s apprximate mdel and numerical results fr k plate 4 W/m.K fr tp surface insulated -50 k plate (W/m.K)
Cntact resistance Cntact resistance per unit area (m 2.K/W) R " cnt ( T T ) A q " B = h c Material Surface Rughness Temperature Pressure h c Cnditin Μm ⁰C MPa W/m 2 C Identical Metal Pairs 46 Stainless steel Grund 2.54 90-200 0.3-2.5 3800 304 Stainless steel Grund.4 20 4-7 900 Used in calculatins Thermal cntact cnductance f sme metal surfaces in air Ref: Yunus A. Cengel, Heat and Mass Transfer: A Practical Apprach, 2nd Editin, McGraw- Hill, 2002. Aluminum Grund 2.54 50.2-2.5 400 Cpper Grund.27 20.2-2.0 43000 Cpper Milled 3.8 20-5 55500 Cpper (vacuum) Milled 0.25 30 0.7-7 400 Dissimilar Metal Pairs Stainless steel- Aluminium 20-30 20 0 20 2900 3600 Stainless steel- Aluminium.0-2.0 20 0 20 6400 20800 Steel Ct-30- Aluminium Grund.4-2.0 20 0 5-35 50000 59000 Steel Ct-30- Aluminium Milled 4.5-7.2 20 0 30 4800 8300 Aluminium- Cpper Grund.3-.4 20 5 5 42000 56000 Aluminium- Cpper Milled 4.4-4.5 20 0 20-35 2000 22000
Fin resistance N number f fins Overall fin efficiency, where, single fin efficiency, NAf η = η f A η L f m c = = t ( ) tanh ml hp ka = L + c ( ml ) c t 2 c A t = Ttal surface area, m 2 = Base area + N number f fin surface area A f = Fin surface area, m 2 A c = Crss sectinal area f fin, m 2 P = Perimeter f fin, m L = Length f fin, m t = thickness f fin, m
Estimatin f thermal resistances in Spicer case Parallel resistances Thermal resistance netwrk can be slved using Kirchhff s current law (KCL) Instead individual resistance is evaluated t identify the dminant nes which affects the chip temperature Thermal resistance (K/W) (apprx.) R al,3 and R al,4 0.6 R cnt 0.23 R a 0 R sp, and R sp,2 0.5 Minimum ttal resistance (R ttal ) = ~3. K/W R f 4.5 R al,2, R al,6 and R al,7 are negligible
Part I Thermal characterizatin f PCB fr Surface Munt Device (SMD)
Thermal analysis f SMD Ftprint area f surface munt device (r chip): 6.4 5.8 mm 2 Thickness f PCB:.6 mm PCB cnfiguratin: 3 FR4 laminates and 3 alternate layer f z. Cu (thickness 35 μm) Tp and bttm cnvective heat transfer cefficient: 0 W/m 2.K N heat transfer thrugh sidewalls Simplified mdel Thermal cnductivity f Cpper: 390 W/m.K Whereas, thermal cnductivity f FR4 laminates: 0.25 W/m.K Fr a Cu layer having a % (r fractin) f Cu, all the effective prperties can be evaluated as, k eff = δkcu + ( δ ) k ρ = δρ + ( δ ) ρ eff eff cu cu lam ( ρc ) = δ ( ρc) + ( δ )( ρc) lam lam Where δ = fractin f Cu present in a layer
Thermal analysis f SMD: Analytical mdel PCB surface area = SMD s ftprint area Thermal resistance f cmpnent package is nt taken T incrprate cmpnent package. R jc (Junctin t casing thermal resistance) 2. R jb (Junctin t bard thermal resistance) Thermal resistance netwrk (Steady state -D heat transfer mdel) Heat transfer t the ambient: R ttal h, R jc R + = R h, FR4 laminates: Cu layer: + R = cu, i N l, i i= R = + lam N cu R t l, i t l j= ( k l A l ) i cu ( k cu A cu ) i R cu, j T jc q = R + R h,2 T ttal a + R jb And cntact resistance Cnvective resistance at tp and bttm: R R h, = h, 2 = ( h A ) tp tp ( h A ) bttm bttm R l,i (K/W) 53.67 R cu,i (K/W) 0.0025 R h, ; R h,2 2693.97 R ttal 386.
Thermal analysis f SMD: Numerical mdel PCB surface area = SMD s ftprint area FLUENT R3 is used /4 th f the PCB Resistances are determined frm: T R = surf, q T 2 surf,2 Numerical: R l,i (K/W) 53.67 R cu,i (K/W) 0.0025 R h, ; R h,2 2693.97 R ttal 386. Same as analytical values
Effect f tp and bttm heat transfer cefficients Case : h tp = 0 (i.e. insulated) and h bttm = 0 W/m 2.K Case 2: h tp = 0 W/m 2.K and h bttm = 0 W/m 2.K Case 3: h tp = 0 W/m 2.K and h bttm = 20 W/m 2.K Case 4: h tp = 20 W/m 2.K and h bttm = 20 W/m 2.K 3000 2500 R ttal (W/m².K) 2000 500 000 500 Increase in h Cnvective resistance reduces 0 0 0 0 20 0 0 20 20 h tp ; h bttm (W/m².K)
Effect f PCB surface area: Analytical and numerical mdel Cu heat spreader and SMD ftprint area are same Simplified mdel Influence n the spreading and cnvective resistances Heat transfer frm tp and sidewalls is neglected h bttm = 0 W/m 2.K Cmbined spreading and cnvective resistances reach the lwest at PCB t chip surface area rati f 25 Accrdingly, PCB dimensin can be selected Resistance netwrk mdel Ttal thermal resistance (R ttal ): R ttal = R h, + N i= + lam N cu R l, i j= R cu, j + R sp + R h,2
Effect f PCB surface area: Analytical and numerical mdel (Cntd..) Cu heat spreader and SMD ftprint area are same Spreading resistance can be rughly estimated frm Lee s apprximatin cnsidering an equivalent thermal cnductive medium equal t the nrmal effective thermal cnductivity f PCB (k n,eff ) Nrmal (perpendicular t bard) thermal cnductivity f PCB In-plane thermal cnductivity f PCB Numerical mdel k p, eff = k N n, eff Chip pwer: W Ambient temperature: 70 ⁰C Tp and bttm h = 0 W/m²K lam N cu i= t l, i = k N lam i= l, i + t k t l, i l, i j= t + t N cu j= cu, i k t k cu, i cu, i cu, i Mst part f PCB remains at ambient temperature due t less spreading f heat Maximum temperature (⁰C) Analytical 7.25 Numerical 4.2 Temperature plt (⁰C) Discrepancy is due t (i) nature f heat flw and (ii) spreading resistance calculatin
Effect f Cu heat spreader area h tp Heat transfer frm these surfaces is neglected Cu layers thickness: 35μm PCB surface area = 400 SMD ft print area Mdel is slved numerically 45 h bttm Maximum temperature ( C) 35 25 5 05 95 Increase f Cu heat spreader area n tp f PCB will decrease maximum temperature n PCB 85 0 00 200 300 400 Cu spreader surface area / SMD ft print area
Effect f Cu heat spreader area (Cntd ) Cu heat spreader and PCB ftprint area are same Simplified mdel Temperature plt (⁰C) Chip pwer: W Ambient temperature: 70 ⁰C Tp and bttm h = 0 W/m²K Cu layers thickness: 35μm Heat spreads unifrmly acrss PCB T max = 89.82 C Can the SMD temperature further be reduced withut change in h?
Parameters affecting thermal perfrmance f PCB Cnvective heat transfer (h = 0 W/m²K) cntributes majr t the ttal thermal resistance fr PCB with 3 layers f FR4 and Cu each Thermal resistance f PCB FR4 laminates (k = 0.25 W/m.K) + thinner Cu layers lwer the verall thermal cnductivity f PCB Can be imprved by using higher thermal cnductive laminates (k ~ 4 W/m.K) + thicker r mre number f thinner Cu layers Thicker Cu layers Metal cre PCB (MCPCB) can be used metal cre in centre MCPCB 2 symmetrical metal cre layers
Metal cre PCB (MCPCB) Cnfiguratin: 2 symmetrical metal cre layers Higher thermal cnductive laminate Thickness f metal cre (Cu) layer: 40 μm Theretical R ttal = 6.7 K/W Chip pwer: W Ambient temperature: 70 ⁰C Tp and bttm h = 0 W/m²K Spreading f heat is better than ther tw cases Temperature plt (⁰C) PCB cnfiguratin (laminates + Cu) T max (⁰C) ΔT max (⁰C) 3 + 3 4.2 7.2 3 + 4 89.82 9.82 MCPCB 80.4 0.4
Existing 6-layer PCB stack up Mre number f thinner Cu layers Thickness f uter (Tp and Bttm) Cu-layers (Cu-layer # and #6) = 35 μm ( z.) Thickness f inner Cu-layers (Cu-layer #2 t #5) = 35 μm ( z.) Temperature plt (⁰C) Chip pwer: W Ambient temperature: 70 ⁰C Tp and bttm h = 0 W/m²K PCB cnfiguratin (laminates + Cu) T max (⁰C) ΔT (⁰C) 3 + 3 4.2 7.2 3 + 4 89.82 9.82 MCPCB 80.4 0.4 Existing 6-layer PCB stack up 87.42 7.42
SMDs spacing n PCB Spacing f electrnic cmpnents arund chip is crucial fr better temperature distributin n the PCB Tw cases are cnsidered: Centre t Centre distance between 2 SMDs is (i) 2 and (i) 4 times f their length and width PCB dimensin is chsen as 28 6.6 (height) mm which has surface area 400 times larger than that f a SMD
SMDs spacing n PCB: Temperature plt (⁰C) T max : 66.56 ⁰C T max : 6.32 ⁰C Chip pwer: W Ambient temperature: 70 ⁰C Tp and bttm h = 0 W/m²K T max : 99. ⁰C 2x 2x 2x T max : 56.38 ⁰C T max : 08.28 ⁰C T max : 95.64 ⁰C 4x 4x 4x Cu heat spreader and SMD ftprint area are same Cu heat spreader and PCB ftprint area are same MCPCB
Summary: PCB Ttal thermal resistance is a functin f surface area available fr heat transfer, layer material f PCB specially the laminate, layer thickness and cnvective heat transfer ver the surfaces f PCB. Minimum ttal thermal resistance fr existing thrugh-hle setup is ~ 3. K/W cmpared t ~ 6.7 K/W fr MCPCB with surface area 400 times larger than that f chip. Ttal resistance in case f SMD is higher than the existing case. Slutin? Cnvective resistance is the dminant ne in the ttal resistance fr h = 0 W/m 2.K which is a typical value fr natural cnvectin. PCB dimensins can be ptimized based n the applicatin. As the spacing between SMDs increases, the SMD temperature tends t lw. The metal-cre PCB is perfrming better in terms f lwering the chip temperature.
Part II Thermal characterizatin f PCB with thermal via fr Surface Munt Device (SMD)
Thermal via Vertical staking f lw thermal cnductive laminates and adhesives (thermal cnductivity ~O() cmpared t cpper and silicn) in PCB reduces its ttal thermal resistance and thereby the heat transfer thrugh it. Thermal vias can prvide an extra path fr heat dissipatin. In general, via is a hllw cylinder f cpper in which a thin layer f cpper is plated n the drilled hle thrugh the PCB Thrugh-hle via Hwever, in sme cases, thermal vias culd be cmpletely filled Thrugh hle via Cmpletely filled via Standard via dimensins Via uter diameter (OD) = 200 μm - 250 μm - 300 μm - 350 μm - 400 μm - 500 μm - 600 μm Via Cu-plating thickness (t) = 20 μm - 25 μm - 30 μm
Thermal analysis f a thrugh-hle via Cu heat spreader and SMD ftprint area are same Simplified mdel (a) Analytical mdel- Resistance netwrk mdel = + R R R + R R ttal = h, R + PCB via PCB via via N Rl, i + i= lam N cu j= h,2 R cu, j L 2 2 via R via = ( dod d ID ) where Avia = ( k A ) π via via 4 PCB R ttal (K/W) With via 378.3 Withut via 386. Via: OD/t: 0.25/0.02 mm
Thermal analysis f a thrugh-hle via (Cntd ) (b) Analytical mdel- Circular fin thery Cncept R ttal = R substrate + R circ fin, tp N + R via via + R circ fin, bttm R cir fin K K 0 = 2πk m ( mr ) ( ) ( ) ( ) v, I mreq, + I0 mrv, K mreq, ( mr ) I ( mr ) I ( mr ) K ( mr ) v, eff t eff r v, eq, v, eq, Where, I 0 and K 0 are the mdified, zer-rder Bessel functins f the first and secnd kinds r v, = uter radius f via m = 2h keff t eff, t eff r eq, = equivalent uter radius f unit cell Effective cnductin n plane f tp plate: = eff A π eff N via k t = k tp layer t tplayer Ref: Guenin, B., Thermal Vias - A Packaging Engineer's Best Friend, ElectrnicsCling, Issue: August, 2004. If silicn die attached t the tp layer is taken int cnsideratin: k eff teff = ksitsi + k tp layer t tplayer
Circular fin thery (Cntd ) If the tp plane f via is cnnected t a via, then the effective heat transfer cefficient fr tp is used instead f cnvective heat transfer cefficient: h eff, t = t k DIE DIE + t k DIE ATTACH DIE ATTACH If the slder layer is attached with the bttm plane f via, then the effective heat transfer cefficient fr bttm: h eff, b cverage fractin k = tslder PCB Circular fin mdel One-dimensinal heat transfer mdel Numerical analysis Cu heat spreader and SMD ftprint area are same 385.60 373.48 379.08 Cu heat spreader and PCB ftprint area are same 375.87 373.29 373.56 MCPCB 348.43 349.67 347.55 slder Ttal thermal resistance (K/W) fr thrugh-hle via (OD/ID:0.25 and 0.2 mm)
Effect f via diameter and thickness. Via: OD/t: 0.25/0.02 mm 2. Via: OD/t: 0.25/0.03 mm 3. Via: OD/t: 0.5/0.03 mm PCB with R via (K/W) R ttal (K/W) Via: OD/t: 0.25/0.02 mm 544. 378.9 Via: OD/t: 0.25/0.03 mm 370.5 375.9 PCB with R via (K/W) R ttal (K/W) Via: OD/t: 0.25/0.02 mm 544. 378.9 Via: OD/t: 0.5/0.03 mm 79.5 374.3 Ttal thermal resistance f PCB decreases with increase in diameter and thickness f via
Multiple thrugh-hle via PCB R ttal (K/W) With via 373.5 With 2 vias 363.7 Via: OD/t: 0.25/0.02 mm Increase in number f via reduces the ttal resistance f PCB
Dividing ne large thrugh-hle via int multiple small diameter thrugh-hle vias via f OD 500 μm is divided int large number f (i) 200 μm and (ii) 250 μm vias (thickness 20 μm) 380 378 R ttal (K/W) 376 374 372 370 368 366 364 OD/t: 0.5/0.02; N. OD/t: 0.25/0.02; N. 5 OD/t: 0.2/0.02; N. 5 Ttal thermal resistance f PCB decreases
Number f thrugh-hle vias Rttal (K/W) 540 520 500 480 460 440 420 400 380 360 Theretical: ttal thermal resistance (K/W) Numerical: ttal thermal resistance (K/W) 0 20 40 60 80 00 20 Number f vias R ttal decreases initially up t the number f via = 5 and then it increases again Due t the reductin f cnvective heat transfer surface (in turn cnvective resistance increases) Althugh the cmbined PCB and via resistances decrease An ptimum number f thrugh-hle vias fr which the ttal resistance is minimum. Depends upn PCB dimensin. Thermal resistance (K/W) 3500 3000 2500 2000 500 000 500 0 Thrugh-hle vias f OD/t: 0.25/0.02 mm Heat transfer frm inner walls f via is neglected Cnvective resistance (K/W) Bard+Vias resistance (K/W) 0 20 40 60 80 00 20 Number f vias
Number f cmpletely filled vias Cmpletely filled via: OD 0.25 mm Thrugh-hle via: OD/t: 0.25/0.02 mm 540 Thermal resistance (K/W) 520 500 480 460 440 420 400 380 360 340 320 Theretical: Cmpletely filled via Theretical: Thrugh-hle via 0 20 40 60 80 00 20 Number f vias R ttal decreases with increase in number f cmpletely filled vias. Hwever, n significant reductin in R ttal fr cmpletely filled via number greater than 0.
Psitin f via in PCB A centrally lcated and fur cmpletely filled vias (ttal number f vias = 5) f diameter 0.25 mm are placed at a distance f i. /4 th f the length and width f a chip frm its center (i.e. within the chip ftprint area f 6.4 5.8 mm) ii. 8 times f the length and width f a chip frm its center PCB surface area = 400 surface area f SMD (i) (ii)
Psitin f via in PCB: Temperature plt (⁰C) T max : 34.87 ⁰C T max : 84.23 ⁰C Chip pwer: W Ambient temperature: 70 ⁰C Tp and bttm h = 0 W/m²K T max : 76.49 ⁰C Under chip T max : 9.8 ⁰C T max : 87.9 ⁰C Under chip Under chip T max : 76.56 ⁰C Outside chip Outside chip Cu heat spreader and SMD ftprint area are same Cu heat spreader and PCB ftprint area are same MCPCB Outside chip
Effect f Cu-trace dimensins y y x 3 x Traces Heat spreader thickness: 35 μm Cmpletely filled via: OD: 0.4 mm Cu heat spreader surface area T max (⁰C) ΔT (⁰C) = SMD ft print area & withut via 34.87 64.87 = 3 SMD ft print area & withut via 96.7 26.7 = 3 SMD ft print area & with via 88.4 8.4 Traces 5.68 45.68 Thermal resistance t heat transfer thrugh Cu heat spreader in lateral directin: = Length ThermalCnductivity Thickness
Summary: Thermal via. Reductin in ttal resistance f PCB can be achieved by including via Hwever, it depends n the type f via, via diameter and number f via, placing f via and the ftprint area f PCB. 2. Smaller sized thrugh-hle via reduces the ttal resistance initially, hwever, additin f this type f via leads t decrease in surface area expsed fr heat transfer t the ambient and in turn, the ttal thermal resistance increases. 3. Cmpletely filled via always decreases the ttal resistance, hwever, the ttal resistance des nt decrease significantly after a certain number f vias. 4. Fr Cu heat spreader area equals t SMD area; vias placed far frm the chip imprve the thermal perfrmance f PCB whereas, in case f MCPCB, the chip temperature increases. 5. Heat transfer t via is affected by Cu-tracer dimensins.
Part III Case studies with SMD
Ways f further imprvement f heat transfer Heat remval frm PCB s bttm and tp surface is by natural cnvectin. The heat remval rate frm any surface by cnvectin is given by, T increase q remval q remval ( ) = ha T T Increase f h (which may nt pssible fr certain applicatin) Increase f A by adding fins n the bttm surface Fins help t imprve heat transfer frm bttm surface Effective heat transfer cefficient is determined as: UA = R f Based n the findings, case study with SMD is carried ut
Case study with SMD withut via Each SMD pwer: W N. f SMD: 7 Ambient temperature: 70 ⁰C Tp and side h = 0 W/m²K Fins are munted n bttm surface effective h PCB: MCPCB (3 high cnductive laminates + 2 n. 3z. Cu layer) T max : 97.32 ⁰C (ΔT: 27.32 ⁰C) Temperature plt (⁰C)
Case study with SMD with via Each SMD pwer: W N. f SMD: 7 N. f via: 5 belw each SMD Ambient temperature: 70 ⁰C Tp and side h = 0 W/m²K Fins are munted n bttm surface effective h PCB: MCPCB (3 high cnductive laminates + 2 n. 3z. Cu layer) T max : 97.04 ⁰C (ΔT: 27.04 ⁰C) Temperature plt (⁰C)
Case study with SMD spaced unifrmly Each SMD pwer: W N. f SMD: 7 N. f via: 5 belw each SMD Ambient temperature: 70 ⁰C Tp and side h = 0 W/m²K Fins are munted n bttm surface effective h PCB: MCPCB (3 high cnductive laminates + 2 n. 3z. Cu layer) SMD distributin n PCB T max (⁰C) ΔT (⁰C) Side by side (existing) (w/ via) 97.32 27.32 Temperature plt (⁰C) Side by side (existing) (w via) 97.04 27.04 Unifrmly distributed (w/ via) 92.6 22.6
Summary SMDs placed unifrmly n the PCB and near t the side surfaces f casing have lwer temperature
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