4Bit Binary Counter and Oscillator The MC4060B is a 4stage binary ripple counter with an onchip oscillator buffer. The oscillator configuration allows design of either RC or crystal oscillator circuits. Also included on the chip is a reset function which places all outputs into the zero state and disables the oscillator. A negative traition on Clock will advance the counter to the next state. Schmitt trigger action on the input line permits very slow input rise and fall times. Applicatio include time delay circuits, counter controls, and frequency dividing circuits. This device contai protection circuitry to guard agait damage due to high static voltages or electric fields. However, precautio must be taken to avoid applicatio of any voltage higher than maximum rated voltages to this highimpedance circuit. For proper operation, in and out should be cotrained to the range SS ( in or out ) DD. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either SS or DD ). Unused outputs must be left open. Fully Static Operation Diode Protection on All Inputs Supply oltage Range = 3.0 to 8 Capable of Driving Two Lowpower TTL Loads or One Lowpower Schottky TTL Load Over the Rated Temperature Range Buffered Outputs Available from Stages 4 Through 0 and 2 Through 4 Common Reset Line PinforPin Replacement for CD4060B PbFree Packages are Available* MAXIMUM RATINGS (oltages Referenced to SS ) Symbol Parameter alue Unit DD DC Supply oltage Range 0.5 to +8.0 in, out I in, I out P D Input or Output oltage Range (DC or Traient) Input or Output Current (DC or Traient) per Pin Power Dissipation, per Package (Note ) 0.5 to DD +0.5 ±0 ma 500 mw T A Ambient Temperature Range 55 to +25 C T stg Storage Temperature Range 65 to +0 C T L Lead Temperature (8 Second Soldering) 260 C Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditio) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.. Temperature Derating: Plastic P and D/DW Packages: 7.0 mw/ C from 65 C To 25 C. *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PDIP P SUFFIX CASE 648 SOIC D SUFFIX CASE 75B TSSOP DT SUFFIX CASE 948F SOEIAJ F SUFFIX CASE 966 A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week MARKING DIAGRAMS MC4060BCP AWLYYWW 4060B AWLYWW 4 060B ALYW MC4060B ALYW ORDERING INFORMATION See detailed ordering and shipping information in the package dimeio section on page 6 of this data sheet. Semiconductor Components Industries, LLC, 2004 Publication Order Number: MC4060B/D
Î ELECTRICAL CHARACTERISTICS (oltages Referenced to SS ) Î 55 C 25 C 25 C Î Symbol Characteristic DD Typ dc Min Max Min (Note 2) Max Min Max Unit OL Output oltage 0 Level 0.05 0 0.05 0.05 Î in = DD or 0 0 0.05 0 0.05 0.05 0 0.05 0.05 OH in = 0 or DD LevelÎ 4.95 4.95 0 9.95 9.95 0 4.95 9.95 4.95 4.95 4.95 Î IL Input oltage 0 Level ( O = 4.5 or 0.5 ) Î ( O = 9.0 or.0 ).5 0 3.0 2.25 4.50.5 3.0.5 3.0 ( O = 3.5 or.5 ) 4.0 6.75 4.0 4.0 Î IH ( O = 0.5 or 4.5 ) Level 3.5 3.5 2.75 3.5 ( O =.0 or 9.0 ) 0 7.0 7.0 5.50 7.0 Î ( O =.5 or 3.5 ).0.0 8.25.0 IL Input oltage 0 Level dc ( Î O = 4.5 dc) (For Input.0 2.25.0.0 ( O = 9.0 dc) and Output 0) 0 2.0 4.50 2.0 2.0 ( Î O = 3.5 dc) 2.5 6.75 2.5 2.5 IH ( O = 0.5 dc) Level 4.0 4.0 2.75 4.0 dc ( Î O =.0 dc) 0 8.0 8.0 5.50 8.0 ( O =.5 dc) 2.5 2.5 8.25 2.5 I OH Output Drive Current ma ( Î OH = 2.5 ) (Except Source 3.0 2.4 4.2.7 ( OH Î = 4.6 ) Pi 9 and 0) 0.64 0.5 0.88 0.36 Î ( OH = 9.5 ) 0.6.3 2.25 0.9 ( Î OH = 3.5 ) 4.2 3.4 8.8 2.4 Î I OL ( OL = 0.4 ) Sink 0.64 0.5 0.88 0.36 ma ( OL = 0.5 ) 0.6.3 2.25 0.9 Î ( OL =.5 ) 4.2 3.4 8.8 2.4 I in Input Current ± 0. ±0.0000 ± 0. ±.0 A C in Input Capacitance ( in = 0) 7.5 pf I DD Quiescent Current 0.005 0 A (Per Package) 0 0 0.00 0 300 20 0.0 20 600 I T Total Supply Current (Notes 3, 4) I T = (0.25 A/kHz) f + I DD A Î (Dynamic plus Quiescent, 0 I T = (0.54 A/kHz) f + I DD Per Package) I Î ( = 50 pf on all outputs, T = (0.85 A/kHz) f + I DD Î all buffers switching) Î 2. Data labelled Typ is not to be used for design purposes but is intended as an indication of the IC s potential performance. 3. The formulas given are for the typical characteristics only at 25 C. 4. To calculate total supply current at loads other than 50 pf: I T ( ) = I T (50 pf) + ( 50) fk where: I T is in A (per package), in pf, = ( DD SS ) in volts, f in khz is input frequency, and k = 0.002. 3
Î SWITCHING CHARACTERISTICS ( = 50 pf, T A = 25 C) DD Typ Symbol Characteristic dc Min (Note 5) Max Î Unit t Î TLH Output Rise Time (Counter Outputs) 40 200 Î 0 25 00 20 80 Î t THL Output Fall Time (Counter Outputs) 50 200 0 30 00 Î 20 80 Î t PLH Î Propagation Delay Time 4 740 Î t PHL Clock to Q4 0 75 300 25 200 Î Clock to Q4.5 2.7 s 0 0.7.3 0.4.0 Î t wh Clock Pulse Width 00 65 0 40 30 30 20 Î f Clock Pulse Frequency 5 3.5 0 4 8 MHz 7 2 Î t Î TLH Clock Rise and Fall Time t THL 0 No Limit Î t w Reset Pulse Width 20 40 0 60 40 0 Î t PHL Î Propagation Delay Time 70 350 Reset to On 0 80 0 5. Data labelled Typ is not to be used for design purposes but is intended as an indication of the IC s potential performance. 60 00 DD DD PULSE GENERATOR 500 F I D 0.0 F Q4 OUT Q5 OUT2 Qn R SS PULSE GENERATOR 20 Q4 OUT Q5 OUT2 Qn R SS 0% 20 0% 20 20 DUTY CYCLE DD SS Q t TLH t PLH 0% t WH t THL t PHL Figure. Power Dissipation Test Circuit and Waveform Figure 2. Switching Time Test Circuit and Waveforms 4
ORDERING INFORMATION Device Package Shipping MC4060BCP PDIP 500 Units / Rail MC4060BCPG PDIP (PbFree) 500 Units / Rail MC4060BD SOIC 48 Units / Rail MC4060BDR2 SOIC 2500 / Tape & Reel MC4060BDR2G MC4060BFEL SOIC (PbFree) SOEIAJ (PbFree) 2500 / Tape & Reel 2000 / Tape & Reel MC4060BDTR2 TSSOP (PbFree) 2500 / Tape & Reel For information on tape and reel specificatio, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specificatio Brochure, BRD80/D. 6
PACKAGE DIMENSIONS PDIP P SUFFIX CASE 64808 ISSUE T A 9 8 B NOTES:. DIMENSIONING AND TOLERAING PER ANSI Y4.5M, 982. 2. CONTROLLING DIMENSION: IH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT ILUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. H G F S C K SEATING T PLANE D PL 0.25 (0.00) M T A M J L M IHES MILLIMETERS DIM MIN MAX MIN MAX A 0.740 0.770 8.80 9.55 B 0.250 0.270 6.35 6.85 C 0.45 0.75 3.69 4.44 D 0.0 0.02 0.39 0.53 F 0.040 0.70.02.77 G 0.00 BSC 2.54 BSC H 0.050 BSC.27 BSC J 0.008 0.0 0.2 0.38 K 0.0 0.30 2.80 3.30 L 0.295 0.305 7.50 7.74 M 0 0 0 0 S 0.020 0.040 0.5.0 T SEATING PLANE 9 8 G A K B D PL 0.25 (0.00) M T B S A S SOIC D SUFFIX PLASTIC SOIC PACKAGE CASE 75B05 ISSUE J P 8 PL 0.25 (0.00) M B S C M R X 45 J F NOTES:. DIMENSIONING AND TOLERAING PER ANSI Y4.5M, 982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT ILUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0. (0.006) PER SIDE. 5. DIMENSION D DOES NOT ILUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.27 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS IHES DIM MIN MAX MIN MAX A 9.80 0.00 0.386 0.393 B 3.80 4.00 0.0 0.7 C.35.75 0.054 0.068 D 0.35 0.49 0.04 0.09 F 0.40.25 0.0 0.049 G.27 BSC 0.050 BSC J 0.9 0.25 0.008 0.009 K 0.0 0.25 0.004 0.009 M 0 7 0 7 P 5.80 6.20 0.229 0.244 R 0.25 0.50 0.00 0.09 7