TMP0: Low Power, Programmable Temperature Controller (Temperature Sensor) Product Description The TMP0 is a temperature sensor which generates a voltage output proportional to absolute temperature and a control signal from one of two outputs when the device is either above or below a specific temperature range. Both the high/low temperature trip points and hysteresis (overshoot) band are determined by userselected external resistors. For high volume production, these resistors are available on-board. The TMP0 consists of a bandgap voltage reference combined with a pair of matched comparators. The reference provides both a constant 2. V output and a voltage proportional to absolute temperature (VPTAT) which has a precise temperature coefficient of mv/k and is.9 V (nominal) at +2 C. The comparators compare VPTAT with the externally set temperature trip points and generate an open-collector output signal when one of their respective thresholds has been exceeded. Hysteresis is also programmed by the external resistor chain and is determined by the total current drawn out of the 2. V reference. This current is mirrored and used to generate a hysteresis offset voltage of the appropriate polarity after a comparator has been tripped. The comparators are connected in parallel, which guarantees that there is no hysteresis overlap and eliminates erratic transitions between adjacent trip zones. The TMP0 utilizes proprietary thin-film resistors in conjunction with production laser trimming to maintain a temperature accuracy of ± C (typ) over the rated temperature range, with excellent linearity. The open-collector outputs are capable of sinking 20 ma, enabling the TMP0 to drive control relays directly. Operating from a + V supply, quiescent current is only 00 µa (max). The TMP0 is available in the low cost -pin epoxy mini-dip and SO (small outline) packages, and in die form. Features C to +2 C ( 67 F to +27 F) Operation ±.0 C Accuracy Over Temperature (typ) Temperature-Proportional Voltage Output User Programmable Temperature Trip Points User Programmable Hysteresis 20 ma Open Collector Trip Point Outputs TTL/CMOS Compatible Single-Supply Operation (. V to 3.2 V) Low Cost -Pin DIP and SO Packages
Functional Block Diagram for TMP0 Model Package Pins ROHS Compilant TMP0FPZ ld PDIP Y Material Declaration TMP0FSZ ld SOIC Y Material Declaration
a FEATURES C to +2C ( 67F to +27F) Operation 6.0C Accuracy Over Temperature (typ) Temperature-Proportional Voltage Output User-Programmable Temperature Trip Points User-Programmable Hysteresis 20 ma Open Collector Trip Point Outputs TTL/CMOS Compatible Single-Supply Operation (. V to 3.2 V) Low-Cost -Pin DIP and SO Packages APPLICATIONS Over/Under Temperature Sensor and Alarm Board Level Temperature Sensing Temperature Controllers Electronic Thermostats Thermal Protection HVAC Systems Industrial Process Control Remote Sensors R R2 R3 Low Power Programmable Temperature Controller FUNCTIONAL BLOCK DIAGRAM VREF HIGH LOW GND 2 3 TEMPERATURE 2.V SENSOR AND SENSOR VOLTAGE REFERENCE WINDOW COMPARATOR HYSTERESIS GENERATOR TMP0 TMP0* 7 6 V+ OVER UNDER VPTAT GENERAL DESCRIPTION The TMP0 is a temperature sensor that generates a voltage output proportional to absolute temperature and a control signal from one of two outputs when the device is either above or below a specific temperature range. Both the high/low temperature trip points and hysteresis (overshoot) band are determined by userselected external resistors. For high volume production, these resistors are available on-board. The TMP0 consists of a band gap voltage reference combined with a pair of matched comparators. The reference provides both a constant 2. V output and a voltage proportional to absolute temperature (VPTAT) which has a precise temperature coefficient of mv/k and is.9 V (nominal) at 2 C. The comparators compare VPTAT with the externally set temperature trip points and generate an open-collector output signal when one of their respective thresholds has been exceeded. Hysteresis is also programmed by the external resistor chain and is determined by the total current drawn out of the 2. V reference. This current is mirrored and used to generate a hysteresis offset voltage of the appropriate polarity after a comparator has been tripped. The comparators are connected in parallel, which guarantees that there is no hysteresis overlap and eliminates erratic transitions between adjacent trip zones. The TMP0 utilizes proprietary thin-film resistors in conjunction with production laser trimming to maintain a temperature accuracy of ± C (typical) over the rated temperature range, with excellent linearity. The open-collector outputs are capable of sinking 20 ma, enabling the TMP0 to drive control relays directly. Operating from a V supply, quiescent current is only 00 µa (max). The TMP0 is available in low-cost -pin epoxy mini-dip and SO (small outline) packages.
TMP0FP, TMP0ES/TMP0FS SPECIFICATIONS Packages (V+ = V, GND = O V, 0 C T A + C, unless otherwise noted.) Plastic DIP and Surface Mount Parameter Symbol Conditions Min Typ Max Unit INPUTS HIGH, LOW Offset Voltage V OS 0.2 mv Offset Voltage Drift TCV OS 3 µv/ C Input Bias Current, E I B 2 0 na Input Bias Current, F I B 2 00 na OUTPUT VPTAT Output Voltage VPTAT T A = 2 C, No Load.9 V Scale Factor TC VPTAT mv/k Temperature Accuracy, E T A = 2 C, No Load. ± 0.. C Temperature Accuracy, F T A = 2 C, No Load 3 ±.0 3 C Temperature Accuracy, E 0 C < T A < 0 C, No Load ± 0.7 C Temperature Accuracy, F 0 C < T A < 0 C, No Load ±. C Temperature Accuracy, E 0 C < T A < C, No Load 3.0 ± 3.0 C Temperature Accuracy, F 0 C < T A < C, No Load.0 ± 2.0 C Temperature Accuracy, E C < T A < 2 C, No Load ±. C Temperature Accuracy, F C < T A < 2 C, No Load ± 2. C Repeatability Error VPTAT 0.2 Degree Long-Term Drift Error 2,6 0.2 0. Degree Power Supply Rejection Ratio PSRR T A = 2 C,. V V+ 3.2 V ± 0.02 ± 0. %/V OUTPUT VREF Output Voltage, E VREF T A = 2 C, No Load 2.9 2.00 2.0 V Output Voltage, F VREF T A = 2 C, No Load 2.90 2.00 2.0 V Output Voltage, E VREF 0 C < T A < C, No Load 2.90 2.00 2.0 V Output Voltage, F VREF 0 C < T A < C, No Load 2. 2.00 2. V Output Voltage, E VREF C < T A < 2 C, No Load 2. ± 0.0 V Output Voltage, F VREF C < T A < 2 C, No Load 2. ± 0.0 V Drift TC VREF 0 ppm/ C Line Regulation. V V+ 3.2 V ± 0.0 ± 0.0 %/V Load Regulation 0 µa I VREF 00 µa ± 0. ± 0.2 %/ma Output Current, Zero Hysteresis I VREF 7 µa Hysteresis Current Scale Factor SF HYS.0 µa/ C Turn-On Settling Time To Rated Accuracy 2 µs OPEN-COLLECTOR OUTPUTS OVER, UNDER Output Low Voltage V OL I SINK =.6 ma 0.2 0. V V OL I SINK = 20 ma 0.6 V Output Leakage Current I OH V+ = 2 V 00 µa Fall Time t HL See Test Load 0 ns POWER SUPPLY Supply Range V+. 3.2 V Supply Current I SY Unloaded, +V = V 00 00 µa I SY Unloaded, +V = 3.2 V 0 00 µa Power Dissipation P DISS +V = V 2.0 2. mw K = C + 273.. 2 Guaranteed but not tested. 3 Does not consider errors caused by heating due to dissipation of output load currents. Maximum deviation between 2 C readings after temperature cycling between C and +2 C. Typical values indicate performance measured at T A = 2 C. 6 Observed in a group sample over an accelerated life test of 00 hours at 0 C. Specifications subject to change without notice. Test Load V+ k 20pF
TMP0FJ SPECIFICATIONS TO-99 Metal Can Package (V+ = V, GND = O V, 0 C T A + C, unless otherwise noted.) TMP0 Parameter Symbol Conditions Min Typ Max Unit INPUTS HIGH, LOW Offset Voltage V OS 0.2 mv Offset Voltage Drift TCV OS 3 µv/ C Input Bias Current, F I B 2 00 na OUTPUT VPTAT Output Voltage VPTAT T A = 2 C, No Load.9 V Scale Factor TC VPTAT mv/k Temperature Accuracy, F T A = 2 C, No Load 3 ±.0 3 C 0 C < T A < 0 C, No Load ±. C 0 C < T A < C, No Load.0 ± 2.0 C C < T A < 2 C, No Load ±2. C Repeatability Error VPTAT 0.2 Degree Long-Term Drift Error 2,6 0.2 0. Degree Power Supply Rejection Ratio PSRR T A = 2 C,. V V+ 3.2 V ±0.02 ±0. %/V OUTPUT VREF Output Voltage, F VREF T A = 2 C, No Load 2.90 2.00 2.0 V VREF 0 C < T A < C, No Load 2.0 2.00 2.20 V VREF C < T A < 2 C, No Load 2. ± 0.0 V Drift TC VREF 0 ppm/ C Line Regulation. V V+ 3.2 V ±0.0 ±0.0 %/V Load Regulation 0 µa I VREF 00 µa ±0. ±0.2 %/ma Output Current, Zero Hysteresis I VREF 7 µa Hysteresis Current Scale Factor SF HYS.0 µa/ C Turn-On Settling Time To Rated Accuracy 2 µs OPEN-COLLECTOR OUTPUTS OVER, UNDER Output Low Voltage V OL I SINK =.6 ma 0.2 0. V V OL I SINK = 20 ma 0.6 V Output Leakage Current I OH V+ = 2 V 00 µa Fall Time 2 t HL See Test Load 0 ns POWER SUPPLY Supply Range V+. 3.2 V Supply Current I SY Unloaded, +V = V 00 00 µa I SY Unloaded, +V = 3.2 V 0 00 µa Power Dissipation P DISS +V = V 2.0 2. mw K = C + 273.. 2 Guaranteed but not tested. 3 Does not consider errors caused by heating due to dissipation of output load currents. Maximum deviation between 2 C readings after temperature cycling between C and +2 C. Typical values indicate performance measured at T A = 2 C. 6 Observed in a group sample over an accelerated life test of 00 hours at 0 C. Specifications subject to change without notice.
TMP0 ABSOLUTE MAXIMUM RATINGS Maximum Supply Voltage................ 0.3 V to + V Maximum Input Voltage (HIGH, LOW)......... 0.3 V to [(V+) +0.3 V] Maximum Output Current (VREF, VPTAT)......... 2 ma Maximum Output Current (Open-Collector Outputs).. 0 ma Maximum Output Voltage (Open-Collector Outputs).... V Operating Temperature Range........... C to +0 C Dice Junction Temperature...................... 0 C Storage Temperature Range............ 6 C to +0 C Lead Temperature (Soldering 60 sec).............. 300 C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating; functional operation at or above this specification is not implied. Exposure to the above maximum rating conditions for extended periods may affect device reliability. 2 Digital inputs and outputs are protected, however, permanent damage may occur on unprotected units from high energy electrostatic fields. Keep units in conductive foam or packaging at all times until ready to use. Use proper antistatic handling procedures. 3 Remove power before inserting or removing units from their sockets. Package Type θ JA θ JC Unit -Pin Plastic DIP (P) 03 3 C/W -Lead SOIC (S) 2 3 C/W -Lead TO-99 Can (J) 0 C/W θ JA is specified for device in socket (worst-case conditions). 2 θ JA is specified for device mounted on PCB. GENERAL DESCRIPTION The TMP0 is a linear voltage-output temperature sensor, with a window comparator that can be programmed by the user to activate one of two open-collector outputs when a predetermined temperature setpoint voltage has been exceeded. A low drift voltage reference is available for setpoint programming. The temperature sensor is basically a very accurate, temperature compensated, band gap-type voltage reference with a buffered output voltage proportional to absolute temperature (VPTAT), accurately trimmed to a scale factor of mv/k. See the Applications Information following. The low drift 2. V reference output VREF is easily divided externally with fixed resistors or potentiometers to accurately establish the programmed heat/cool setpoints, independent of temperature. Alternatively, the setpoint voltages can be supplied by other ground referenced voltage sources such as userprogrammed DACs or controllers. The high and low setpoint voltages are compared to the temperature sensor voltage, thus creating a two-temperature thermostat function. In addition, the total output current of the reference (I VREF ) determines the magnitude of the temperature hysteresis band. The open collector outputs of the comparators can be used to control a wide variety of devices. VREF HYSTERESIS CURRENT CURRENT MIRROR ENABLE I HYS V+ ORDERING GUIDE Temperature Package Package Model/Grade Range l Description Option TMP0FP XIND Plastic DIP N- TMP0ES XIND SOIC SO- TMP0FS XIND SOIC SO- TMP0FJ 2 XIND TO-99 Can H-0A XIND = 0 C to + C. 2 Consult factory for availability of MIL/3 version in TO-99 can. HIGH LOW GND 2 3 VOLTAGE REFERENCE AND SENSOR WINDOW COMPARATOR k HYSTERESIS VOLTAGE TEMPERATURE OUTPUT TMP0 7 6 OVER UNDER VPTAT Figure 2. Detailed Block Diagram
TMP0 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). -Lead Epoxy DIP (N-) 0.20 (7.) 0.20 (6.0) 0.30 (0.92) 0.3 (.) 0.070 (.77) 0.0 (.) 0.32 (.2) 0.300 (7.62) 0.20 (.33) MAX 0.0 (0.3) TYP 0.9 (.9) 0. (2.93) 0.60 (.06) 0. (2.93) 0.30 (3.30) MIN 0.0 (0.3) 0.00 (0.20) 0.022 (0.) 0.0 (0.36) 0.00 (2.) SEATING PLANE 0 - -Lead SOIC (R-) 0.20 (6.20) 0.22 (.0) 0.7 (.00) 0.97 (3.0) 0.009 (0.2) 0.000 (0.0) 0.96 (.00) 0.90 (.0) 0.02 (2.9) 0.09 (2.39) 0.096 (0.0) 0.0099 (0.2) 0-0.000 (.27) 0.092 (0.9) 0.03 (0.3) SEATING PLANE 0.009 (0.2) 0.007 (0.9) 0.000 (.27) 0.060 (0.) -Lead TO-99 (TO-99) 0.33 (.) 0.30 (7.7) 0.370 (9.0) 0.33 (.) 0. (.70) 0.6 (.9) 0.00 (.27) MAX REFERENCE PLANE 0.70 (9.0) 0.00 (2.70) 0.20 (6.3) MIN 0.230 (.) 0. (2.92) 0.00 (.02) MAX 0.09 (0.) 0.06 (0.) 0.0 (.) 0.02 (0.3) 0.00 (0.2) 0.06 (0.) BASE & SEATING PLANE 3 2 0. (2.92) 6 7 0.03 (0.6) 0.027 (0.69) 0.60 (.06) 0.0 (2.79) 0.0 (.) 0.027 (0.69)