V V Way type onnector US Type onnector x.v.v Regulators Headers for all pins sorted by pin no. (unpopulated) Prototyping area with power and GNs (unpopulated) RS Transceiver US to Serial onverter Expansion onnector x LEs x Pushbuttons GPIO URT TSX00 ortexm0 //Opamps Input Jack Potentiometer udio mp 0Way oresight SW onnector SW SPI SYSLK XTL Reset Output Jack S ard Slot Touch Screen QVG isplay (MQVGTSisplay) Oscillator MHz rystal.mhz Reset utton MTSX00 lock iagram ate: Number: HI0 Revision: 0 0/0/0 Time: :: Sheet of lock_iagram.schoc www.keil.com/mtsx00
OS_EN JP V R K U EN GN MHz OS EN HEER X V OUT R 00n V R 00K 0p R K X.MHz R M 0p V_ 00n V V V V J HEER X Prototyping power headers J HEER X J HEER X V_ PIN_ GPIO_0 GPIO_ GPIO_ GPIO_ GPIO_ GPIO_0 GPIO_ GPIO_ SWLK PIN_ OS_EN INT PIN_ PIN_ SLK SS SS PIN_ PIN_ J0 0 0 HEER X J 0 0 PIN_ PIN_ GPIO_ GPIO_ GPIO_ GPIO_ GPIO_ GPIO_ GPIO_ GPIO_ SWIO PIN_ TEST PIN_0 PIN_ PIN_ SS TS PIN_ PIN_ V_ 00n V_ PIN_ PIN_ PIN_ GPIO_0 GPIO_ GPIO_ GPIO_ GPIO_ GPIO_ GPIO_ GPIO_ GPIO_ GPIO_ GPIO_0 GPIO_ GPIO_ GPIO_ GPIO_ GPIO_ SWLK SWIO PIN_ PIN_ 0 0 V GPIO_0 GPIO_ GPIO_ GPIO_ GPIO_ GPIO_ GPIO_ GPIO_ GPIO_ GPIO_ GPIO_0 GPIO_ GPIO_ GPIO_ GPIO_ GPIO_ SWLK SWIO VSS PIN_ LK_IN SYSLK INT XOUT XIN OUT IN IN IN IN OUT VREF IN0 IN0 IN IN IN IN IN IN 00 0 0 V OUT OUT OUT OUT OUT OUT OUT0 OUT0 VSS VSS TOUT THLT TLK PEN POUT V VSS LK_IN SYSLK INT XOUT XIN V OUT IN IN IN IN OUT VREF IN0 IN0 IN IN IN IN IN IN VSS V TEST0 TEST INT SLK SS SS SS TS VSS 0 0 U TSX00 OUT OUT OUT OUT OUT OUT OUT0 OUT0 PIN_ PIN_ PIN_ PIN_ PIN_0 PIN_ PIN_ TOUT THLT TLK PEN POUT V_ V_ 00n 00n IN IN OUT IN0 IN IN IN LK_IN INT XIN OUT IN IN VREF IN0 IN IN IN PIN_0 PIN_ TOUT TLK POUT J 0 0 J 0 0 HEER X PIN_ SYSLK XOUT OUT OUT OUT OUT0 PIN_ PIN_ OUT OUT OUT OUT0 PIN_ PIN_ PIN_ THLT PEN V_ V_ V_ HEER X V_ 0 0 0 HEER X V 00n J 0 MIPI 0 ortex debug connector (oresight interface) 0K R 0K R 0K R V 0K R R SWIO SWLK TP TP 00n V V R R0 OS_EN TEST INT PIN_0 PIN_ PIN_ PIN_ PIN_ SLK SS SS SS TS PIN_ PIN_ PIN_ PIN_ V_ V_ These links can be replaced with low value resistors for current measurement puposes. TP TP SS SS SS SLK R R R R R R R V 0K 0K 0K 0K 0K 0K 0K V GPIO_ GPIO_ SLK 0 0 J HEER X EXP TS GPIO_0 INT MU ate: 0/0/0 MU.Schoc Number: HI0 Revision: 0 Time: :: Sheet of www.keil.com/mtsx00
US, Power & Serial HI0 0 0/0/0 US_Power_Serial.Schoc Number: ate: Revision: Sheet of Time: :: www.keil.com/mtsx00 STE V V TOUT RIN ROUT TIN 0 TIN ROUT RIN TOUT GN V U LS J VOUT U LS J VOUT U US VUS GN SHIEL SHIEL J V E SOKET 0 J OM T0 T0 00n 00n 00n 00n V TS WY J V V 0u 0u 0u 0u 0 u L R V 00n 0 0n 0 M R FTRQ 0 TR VIO RI GN N SR TS US US 0 US USP USM VOUT GN V GN 0 US US0 N GN TEST OSI OSO N N N N GN P U US_N US_P V 00n 00n 00n TS _US _US TS_US _US _US _US TS_US _US TS USLS IO GN IO IO VUS IO U US_N US_P V V VUS 00n HEER X JP HEER X JP HEER X JP HEER X JP Serial port selection jumpers. RS interface US interface Expansion interface VUS 0K R 0K R 0K R0 0K R V US US USSHL V R R R V_REG V_REG V K R K R 0 R K R K R K R 0 R K R
JP,,, placed together to allow loopback connections from OUT/ to IN0/ JP JP JP JP TP JP0 HEER X 00n R 0K R0 K VOLUME Fully clockwise = MX Fully anticlockwise = MIN U GIN IN IN GN LM GIN YP VS VOUT 00n V 00n R n 00u JP HEER X J JK SOKET SP N N Speaker JP To select MI jack V JP JP JP JP JP JP JP JP JP To select POT NOTE: For IFF input, remove shunts and attach cable to: JP. (IFF) JP. (IFF) JP. (GN) To select LN IFF JP To select JK input OUT R NOTE: For IFF input, remove JP/ shunts and attach cable to: JP. (IFF) JP. (IFF) JP. (GN) JP n 0K V IN IN 00n R 0K 00n R R0 n Fully clockwise =.V Fully anticlockwise = 0V R K/0K 0K 0K JP HEER X JP HEER X JP HEER X 00n R0 n n R OUT OUT R MI_VREF MI_VREF IN R R R IN R R R JP HEER X JP HEER X OUT0 OUT0 VREF REF J JK SOKET 00n JP R K HEER X 00n JP HEER L JK_YPSS 0 00n 00n R 00K R 00K 00n IN IN IN MI_VREF IN OUT OUT R 00K R K R 00K R0 00K MI_VREF JK_YPSS JP HEER T R K R K JP HEER T IN IN R R n K OUT OUT K n JP IN0 HEER X JP IN0 HEER X nalog ate: Number: HI0 Revision: 0 0/0/0 Time: :: nalog.schoc Sheet of www.keil.com/mtsx00
Misc HI0 0 0/0/0 Misc.Schoc Number: ate: Revision: Sheet of Time: :: www.keil.com/mtsx00 MQVGTSISPLY N T_INT S RS SK R P P P 0 P P P P P P0 P P P P 0 P P P L_GN L_ENLE V V GN GN L_V 0 SO SI T_S SK J S P S P S P S P P 0 P P P MIRO S S V SLK GN SW 0 J R 00n V R 00n R 00n R 00n GPIO_ GPIO_ GPIO_ GPIO_ 00K R 00K R 00K R 00K R V SS SLK SLK SS V 00n R R R R GPIO_ GPIO_ GPIO_ GPIO_ GPIO_ GPIO_0 GPIO_ GPIO_ P P0 P P R R R0 R 0K R V V 00n STM00 VSS RST V U S 0K R 0n 0 0 R0 V GPIO_ GPIO_ 0K R 00n V 00K R 00K R 00K R 00K R 00K R 00K R 00K R0 00K R V SLK SS INT 0K R V SPI isplay, SPI Touchscreen
lock iagram lock_iagram.schoc US, Power & Serial US_Power_Serial.Schoc MU MU.Schoc nalog nalog.schoc Misc Misc.Schoc P text www.keil.com/ MTSX00 HPI0 KEIL Tools by RM (logo) escriptions on all jumper links escriptions on prototyping power pads escriptions on power LEs Polarity markings on pads micros next to card connector OM next to way connector ortex debug next to debug connector M Prototyping areas M FOOT LUE M FOOT LUE M FOOT LUE M FOOT LUE GN GN Fiducial pads FI FI FI FI PROTOXX00TH M M M M M M M0 M M M M M PROTO0XX0SM M M M M M M0 M M M M See efault_jumper_settings.pdf for jumper link placement. THUMWHEEL LUE FIT TO R PROTOXX0SM SYM SYM P Pb PbFREE WEEE SYM MO MOIENT NOTE This sheet may be omitted from customer schematics HPI0 MTSX00 Evaluation oard ate: Number: HI0 Revision: 0 0/0/0 Time: :: MTSX00.Schoc Sheet of www.keil.com/mtsx00