Lecture 49 Danger f Instability/Oscillatin When Emplying Feedback In PWM Cnverters A. Guessing Clsed Lp Stability Frm Open Lp Frequency Respnse Data. T(s) versus T(s) + T(s) 2. Phase Margin Test fr T(s) a. Uncnditinally Stable φ m = 90 fr ple T(s) b. Cnditinally Stable Case. Tw Near-by Ples T(s) crsses 0 db at 20 db/dec 20 db/dec 0 db 40 db/dec Phase margin = 76 deg. gal T(s) = T(s) + T(s) subsequent ple S W (+ s W ) 2 2 s _ + s ( W W ) 2 W a. Lw Q Apprximatin b. High Q Apprximatin B.Prblem 9.5 f Ericksn C.Clsing Tidbits n an Unstable T(s) 2
Lecture 49 Danger f Oscillatin/ Instability When Emplying Feedback In PWM Cnverters 2 A. Guessing Clsed Lp Stability Frm Open Lp Frequency Respnse Data T(s). T(s) versus If we make lp gain, T(s), + T(s) arbitrarily large we benefit via /+T factrs in the reductins in Z ut r G vg fr the clsed lp respnse,as cmpared t the pen lp respnse. On the ther hand emplying feedback brings the pssibilities f system INSTABILITY nce we clse the lp. That is, even if all ples f T(s) = N(s) are stable and in the left-hand D(s) plane, that des nthing fr guaranteeing that the ples f the tw clsed lp factrs T/(+T) and /(+T) are als in the left-hand plane. They may nt be as we shw belw. T(s) N(s) = + T(s) N(s) + D(s) Same ples but nt D(s) = + T(s) N(s) + D(s) the ples f T(s) Let s illustrate the pint! Take a stable cubic T(s) in pen lp, that suddenly ges unstable in clsed lp due t the applicatin f feedback. This is the dwnside r darkside f feedback- it s dirty little secret revealed that we will cver tday.
3 00 (+s) 3 stable T(s) = T(s) + T(s) 00 (+ s) 3 = 00 3 (s+ ) + 00 system stability? T(s) 00 = + T(s) 3 s + 2 3s + 3s+0 Use an HP 48 rt slver t find right half plane ples are frmed in T/ (+T) as sn as we clse the lp n T(s). 9.6 x.32+j4.0 x.32-j4.0 Instability with right-hand plane ples ccurred with a feedback lp clsed, even thugh the riginal T(s) has nly left half plane ples. Is there any way t predict frm the pen lp T(s) whether r nt the clsed lp will be unstable s we prevent unpleasant suprises?? 2. Phase Margin Test We will examine belw the relatin between the pen lp phase margin and the CLOSED LOOP Q. Fr large clsed lp Q can bring dynamic prblems like versht ti devices and cmpnents. Frm the Bde plts f the pen lp gain, T(s), we will be able t predict stability f + T(s) r T(s). Intuitively, we expect when T(s) =, the + T(s) phase shift term r phase f T(s) cannt be 80 because
4 this will turn gd stabilizing negative feedback int bad destabilizing psitive feedback. But hw far frm 80 can we get when the magnitude f T(s) is unity and still be stable. The amunt f angle separating the phase f T(s) and 80 degrees is termed the Phase Margin φ m. Psitive phase margin is a stable leading indicatr but negative phase margin is an unstable leading indicatr. Based n prir experience we state φ m f 76 in the pen lp T(s) is a desired rule f thumb fr always achieving stable clsed lp situatin with lw enugh Q t als avid versht prblems! Lets lk at several T(s) amplitude and phase plts and see what we mean. In general we will find that increasing the psitive phase margin f the pen lp T(s) reduces the Q f the clsed lp functins T/ (+T) and /( +T) and results in n transient versht and ringing in the clsed lp respnses. A small phase margin in the pen lp T(s) means a high Q in the clsed lp functins, such as T/ (+T), with a transient respnse that bth vershts and rings. Lecture 50 will detail the transient respnse f the clsed lp functins versus Q. We will first at first be dealing with VOLTAGE CONTROLLED cnverters perating in the CCM mde, later in Chapters 0 and we will als include DCM dynamic respnse and add current cntrl lps respectively. Clearly transfrmer islatin within cnverters will primarily change nly the DC respnse, unless transfrmer parasitic s play a big rle. The cntrl t utput pen lp characteristic f vltage cntrlled cnverters, T(s), is the behavir f the cnverter with the errr amplifier remved as shwn belw.
Cmmn tplgies fr this feedback apprach include buck, half and full bridge as well as half-frward and push-pull. T(s) versus frequency can either be calculated (never wrks) r measured (the safe way). We break the vltage feedback lp at the input t the errr amplifier since it has such high input impedance. The pint where the utput vltage enters the errr amplifier s negative input is cnsidered as the utput prt fr T(s) measurement r calculatin. The full circuit diagram f a frward cnverter with it s T(s) under test is given in the diagram belw. Nte the ESR f the filter capacitr, which is a parasitic element that will intrduce an imprtant zer t the pen lp T(s). Nte als hw the errr amplifier in it s wn feedback lps is remved fr pen lp T(s) measurements r calculatins. Later in Lecture 50 it will be cmpensatin netwrks that we will intrduce int the pen lp gain that will fix the prblems in the riginal pen lp gain leading t system scillatin r pr transient respnse. Fr nw we will be cntent in birddgging the prblems frm the T(s) plts. 5
We can guesstimate the T(s) behavir fr the frward cnverter as fllws. The DC gain will be V in / V errr which will be equal t the buck circuit D(n duty cycle), which culd be as large as unity. Hence in db the DC gain culd be as large as 20 db t start. The L-C utput filter will cntribute a DOUBLE ple at f P = / 2π ( L 0 C 0 ) /2. Hence we expect after f P the amplitude plt f T(s) will rll-ff at 40 db per decade. We assume that the zer frm the ESR f the filter capacitr will ccur at a frequency much higher than f P due t the expected lw value f the ESR resistance. Specifically, f ESR =/ 2π R ESR C 0. With this set f assumptins in mind we can plt bth the amplitude and phase plts f T(s) as shwn n the tp f page 6. Typically, f ESR (Tantalum capacitr) =20-30 khz but the chice f an aluminum electrlytic capacitr culd change f ESR (Al electrlytic) = 3 khz. Des the chice f a mere capacitr type change the pen lp T(s)?? 6
7 The abve plts shw hw t measure the phase margin f T(s) fr this case. Depending n details f cmpnent chices in the frward cnverter the T(s) indicates the pssibility f scillatin ccurring when we clse the lp. We culd get either stable r unstable behavir depending upn the sign and the magnitude f the phase margin. Stable Unstable f m > 0 f m < 0 On the left abve the T(s) phase margin is +68 degrees and n the right abve the phase margin is-50 degrees. Which is unstable and why? Several pen lp T(s) cases present themselves as easy t determine clsed lp stability, which we
will deal with first. Later we will challenge mre cmplex T(s). a. Uncnditinally Stable T(s) Case An islated ple r single ple always has φ m = 90 r mre since the phase shift cannt exceed 90 degrees. This wuld be the chice fr highly critical systems with feedback that we never want t g unstable. The DCM flyback is an example f this T(s). b. Cnditinally stable T(s) Cases A T(s) cntaining a ple lcated at lw frequencies tgeather with a secnd ple sufficiently far away frm the first is a cmmn situatin. Depending n hw far apart the ples are we get φ m at unity gain frm 80 t nearly zer. Many such T(s) are purpsely designed s that the T(s) = cnditin ccurs at a T(s) slpe f 20 db/decade. Only after the unity gain pint ccurs, des the secnd ple break. T(s) = s W (+ s/ W 2) f >> W + S S W W f 2 say f sw φ m 90 f 2 say the crssver frequency f 0. Nw we have φ m smaller phase margin than 76, maybe even 80 wrst case when the ple lies belw f 0 If,T(s) = ω S and ω 2 may be clse r far apart. W (+ S/ W 2) 8
T(s) + T(s) = + S W + ( S W ) 2 c Cmpare t the standard tw ple frm W c = WW2, Q = W W = W W c 2 + S QW + ( S W ) c c 2 9. The lw Q Clsed Lp apprximatin This case says the tw ples are widely separated. Unity gain is crssed @20dB/decade and later the secnd ple breaks. ω = ω c Q lying well belw ω c in frequency ω 2 = ω c /Q lying well abve ω c in frequency T(s) then has a higher unity + T(s) gain crss-ver frequency than the riginal T(s) functin as shwn. T Higher f c fr implies we achieve a faster transient respnse + T with feedback emplyed than with pen lp, due t reduced gain f T/ (+T) cmpared t T. 2. High Q Clsed Lp apprximatin Fr Q > /2 f 2 decreases twards f and T(s) unity gain is nw crssed @ 40db/decade which can lead t instability in the clsed lp r scillatry transient respnse.
0 Big Q peaking will ccur in the T/(+T) functin as shwn abve, even thugh there is n strng Q peaking in the riginal T(s). T(s) Value f + T(s) @ f f f c is Q abve the asymptte. Q. f c f 2 If f 2 f Q = and the φ m 52 as shwn n next page. Methd is find f fr T = < T (f fr unity) is evaluated and 80 - < T φ m. Clearly φ m = f(f /f 2 r Q 2 ) =tan - ( +( +4Q 4 ) /2 ) /2Q 4 ) /2 which we plt belw n page. The plt is nly gd fr the tw ples near f c apprximatin. A clsed lp Q = /2 r -6 db has φ m = 76. A clsed lp Q = r 0 db has a φ m = 52 Likewise fr φ m 0 Q fr the clsed lp then skyrckets
Abve plt f Q versus the phase margin is gd nly fr tw clse ples. It is nt gd fr 3 ples near f c. The Q versus ϕ m abve is als gd fr the case f T(s) crssing unity @ 40db/decade with an additinal zer at f 2 just past the unity gain crssing as we saw ccurred via the f ESR fr the frward cnverter. 40 db/dec (fp/f) 2 f2-20 db/dec f2/f See Pbm. 9.5 fr mre details n hw t analyze this special case. There are ther mre interesting T(s) pssibilities as shwn belw. What d we d with these cases?? Any suggestins? FOR HW #4 explain what excess phase will d t the clsed lp.
Vltage Cntrlled Flyback Let s cnsider next the discntinuus mde flyback cnverter cntrlled by a vltage lp, which has a T(s) very different frm the frward cnverter examined previusly. In particular we will find that T(s) has nly a single ple, rather than a duble ple. The ESR f the filter capacitr still intrduces a zer t T(s) at a frequency abve that f the ple as shwn f the Bde plts f a DCM flyback shwn belw. 2 The utput filter ple in the vltage-cntrlled flyback perating in DCM DEPENDS n R L = V OUT / I OUT, the lad resistance. This means that as we change the lad cnditins ( light versus heavy lad) we are mving the ple lcatin f the utput filter arund: f P = / 2π R L C 0 As lad current decreases( heading t pen lad) the ple frequency decreases and vice versa. This makes errr amplifier cmpensatin schemes mre challenging fr the flyback.
3 B. PROBLEM 9.5 f Ericksn The frward cnverter system f Fig. 9.43 is cnstructed with the element values shwn. The quiescent value f the input vltage is Vg = 380V. The transfrmer has turns rati n/n3 = 4.5. The duty cycle prduced by the pulse-width mdulatr is restricted t the range 0 < d(t) < 0.5. Within this range, d(t) fllws the cntrl vltage v c (t) accrding t d(t) = ½ v c (t)/v m with V m = 3 vlts. (a) Determine the quiescent values f: duty cycle D, the utput vltage V, and the cntrl vltage V c. (b) Sketch a blck diagram which mdels the small-signal ac variatins in the system, and determine the transfer functin f each blck. (c) Cnstruct a Bde plt f the lp gain magnitude and phase. What is the crssver frequency? What is the phase margin? (d) Cnstruct a Bde plt f the clsed-lp line-t-utput transfer functin magnitude v$ $ v g. Label imprtant features. What is the gain at 20 Hz? At what frequency d disturbances in vg have the greatest influence n the utput vltage? vg(t) islated transistr gate driver Sensr Circuit Find D fr frward cnverter 3 V = ( n n ) D V D = 0.332 28 (4.5) 380 g. n : n2 : n3. pulse-width mdulatr vc. fs=50khz L 500uH 3nF - + C 0uF H(s) = 8.2/(8.2+8.8) = 0.82 V /V ref /H fr T V = 5./0.82 = 28V 5.6k vref 5.V R 7 + v(t) - 8.8k 8.2k
d(t) = V c (t) 2 VM Cntrl Lp Blcks V = 2 V c ^ ilad(s) 4 in general G R(s) here unity vg(s) ^ Gvg(s) Zut(s) vref(s) ^ GR(s) ve(s) ^ Gc(s) vc(s) ^ Vm=3V /2Vm T(s) d(s) ^ Gvd(s) v(s) ^ H(s) PWM Flyback Mdel: Open lp with independent inputs: Frward Mdel: ^ vg ^ ig ^ din3/n. :Dn3/n. ^ i L ^ (n3/n)vg d C + v^ - $V g, d $ R Fr the flyback cnverter: $V(s) = G (s) $V (s) + G (s) $ d(s) - Z (s) i (s) vg g vd L n3 g n V n3-380 n D + S QW + ( s W ) 2 + S QW + ( S pen lp W ) 2 G g (4.5)(380) = db G d = (4.5)(.332) = db
W = LC = 500 0 = 2 4 x0 rad sec 5 µ H µ F f = W 2π = 2.25 KHz Q W = R L W = R L LC = R c L.0 Z element f cntrl blck pen lp Z ut = R SC = + sl S QW + ( S W ) 2 Op Amp sectin f cntrl blck vref dc nly nt f(w) GR unity fr dc nly H Vut ve Gc vc p amp transfer functin vc/ve errr vltage f p amp = 0 if A That is: V c (s) = G c (s)[g R (s) V ref (s) - H(s) V(s)] Nw islate each cntributin Op Amp relates bth V c /V ref and V c /V
Vc Vref V=0 = G G c R Op amp respnse G(s) V/V e R 8.8k R 2 8.2k v(t) virtual grund R 3 5.6k vref 5.V C 2 3nF - + vc 6 input t p amp V in 0 s V ref appears n Z chain frm gnd. R R 2 + R 3 + Vc SC2 = V R R ref v=0 2 Bde Plt V c /V ref vs f vc/vref -20 db/dec Next, Vc - v fz G c (s ) = [R 3 + R R 2 ] / [R R 2 ] R 3 + Vc 2 = SC } V V = c - v V R ref =0 R R3+ / sc2 V } s V = R + / sc R R 3 + SC2 c Gc H = = G c [ + W R S ] V ref =0 G R (s) fr nn-dc des have a frm p amp. f c 3 2
Fr HW # 4 Graduate students shw: R 3 + 2 SC + R R 2 2 3 2 G R = = + SC [R + R R ] + 3 2 R 3 + sr C SC2 G r (0) fr dc & V ref nly d.c. Other cases V ref = f(w) Lp Gain: T(s) = G c 2 V G vd H M Break the lp @V e and inject T(s) = c T (+ W s ) + S/ WQ+ (S/ W ) 2, T = Gc 2 V G d H M c = 0.96 T (+ W T(s) = s ) S + QW + ( S W ) 2 Q < /2 and is.0 as calculated. Use Q fr phase asympttes. 0 -/2 f 0 +/2 f -----------------f ------------------- 72 Hz 2.25 khz 7.2 khz 90 90 *0 f range fr full 80 phase swing 7 f c /0 f c 0f c ------------------- ------------------ 220 Hz 2.2 khz 22 khz 45 /decade 45 /decade *00 f c fr full 90 range
8 Of special interest is T(f = f c ) t evaluate φ m T inverted zer 0 db 220 Hz 72 Hz /(+T) -20 db/dec fc 7.2 khz 2.2kHz f 2.25kHz f = fc duble ple 0 fc 22kHz -40 db/dec duble ple T 45/dec 80/2 decades frm duble ple -90 fc/0 35 phase margin = 45 deg. inverted zer fc 45/dec 80 [ vg ] V OL Clsed lp transfer functin fr = G (s) V g + T(s) CL G vg des nt pssess an inverted zer in the numeratr frm G c. s 2 [ G g(s) ] V wq ( s w ) + + = Same ples V g [+ T(s)] CL same Q as + T(s)
Gvg(s) pen lp 9 Gg = 0.074 r -23 db f 2.2 khz -40 db/dec f Next use algebra n graph t get the cmbined plts. G vg (s) + T(s) frm: 20 Hz f = 2.2 khz 48 db 20 db/dec -23 db Gg -40 db/dec Gg(2.2 khz)*20/2200 = 0.004 r -48db V g ripple @ 20 Hz V g ripple @ 2.2 khz is reduced at V ut by is reduced by (23 db) 48 db(0.04) @ V ut V g @ 20 Hz = 0V V g @ 2.2 khz is 0V V ut @ 20 Hz = 40mV V ut @ 2.2 khz is 74mV C. Clsing Tidbits We hit n a few trends in T(s) plts at very high frequencies t clse ut lecture 49. We chse a sick pen lp T(s) and prepare fr Lecture 50 which will tailr the sick T(s) t achieve a healthy T(s) that will nt scillate when we clse the lp arund it
with feedback. Belw we lk at a measured pen lp gain plt fr T(s) f a vltage and current cntrlled frward cnverter and speculate n it s stability in clsed lp. We als speculate hw t add cmpensatin t the pen lp respnse t achieve clsed lp stability. The vltage feedback prvides fr the single ple at arund khz that presents n prblems t clsed lp stability. 20 The current feedback prvides fr a DOUBLE POLE at ½ the switch frequency, as we will see in Chapter. This puts a big dent in the T(s) plts as shwn abve. Especially nte the pssibility f NEGATIVE phase margin, which wuld guarantee system instability in clsed lp. Atthugh the frequencies emplyed in feedback lps and the cnverter mdels themselves are nt valid at these high frequencies, if we make the clsed lp gain t high this may cause instability prblems at ½ the switch frequency in the clsed lp respnse. Fr HW # 4 Of the fur cmpensatin schemes listed n page 2, which is best suited t achieve clsed lp stability fr the given T(s) abve
and WHY. 2 Draw sketches f the expected ptimum cmpensatin scheme yu chse.