CHAPTER 3 ANALYSIS OF KY BOOST CONVERTER

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70 CHAPTER 3 ANALYSIS OF KY BOOST CONERTER 3.1 Intrductn The KY Bst Cnverter s a recent nventn made by K.I.Hwu et. al., (2007), (2009a), (2009b), (2009c), (2010) n the nn-slated DC DC cnverter segment, whch s well recgnzed fr lw utput rpple vltage n the rder f few hundred mllvlts when cmpared t the cnventnally avalable DC DC cnverters. In ths chapter the structure and dfferent peratng mdes f the pstve utput and negatve utput KY Bst Cnverter s dscussed n detal. 3.2 Pstve utput KY bst cnverter The pstve utput KY Bst Cnverter shwn n the fllwng fgure 3.1 s a cmbnatn f KY cnverter (Hwu, et. al., 2007), (Hwu, et. al., 2009a) wth tradtnal SR bst cnverter. The KY Bst Cnverter classfed as a nn-slated bst cnverter perates n Cntnuus Cnductn Mde (CCM). The KY Bst Cnverter utput current rpples are very small as the cnverter pssesses bth nput nductrs and utput nductrs whch lead t Output ltage Rpple (OR) arund 200m. It s a cmbnatn f KY cnverter sectn cmbned wth SR bst cnverter s as t ncrease the vltage rat f KY cnverter. In ths cmbnatn, KY cnverter cnssts f tw swtches S 1 and

71 S 2 ; energy transferrng capactr C b ; frward dde D b ; utput capactr C ; and utput nductr L. The nput f KY cnverter s replaced wth a buffer capactr C m. The SR bst cnverter cnssts f tw swtches S 1 and S 2 wth an nput nductr L and the buffer capactr C m replaces the utput f SR bst cnverter. Hence capactr C m acts a buffer between SR bst cnverter and KY cnverter whch frms the KY Bst Cnverter. The KY Bst Cnverter always perates n Cntnuus Cnductn Mde (CCM) wth tw swtches; hence there are tw mdes f peratn represented as peratng mde 1 and mde 2. Fgure 3.1 Pstve utput KY bst cnverter The vltage drp acrss the swtches and ddes n turn ON tme s cnsdered as neglgble. Let the current flwng thrugh the nput nductr L be represented by L ; the current flwng thrugh the utput nductr L be represented by L ; the vltage acrss the buffer capactance C m be represented by v Cm and the vltage acrss energy transferrng capactance C b be represented by v Cb. The vltage acrss the buffer capactance C m and the energy transferrng capactance C b are equal and s represented by the

72 fllwng Equatn 3.1. 1 vcm vcb v (3.1) 1 D The pwer flw peratn n each mde, crrespndng dfferental Equatns and the relatnshp between the nput DC vltage and utput DC vltage were explaned n fllwng sectns. 3.2.1 Mde 1 peratn The KY Bst Cnverter mde 1 peratn s represented by fgure 3.2 n whch swtch S 1 s turned OFF and swtch S 2 s turned ON whch grund the negatve termnal f C b leadng t frward basng f dde D b due t whch capactr C m s dscharged and capactr C b s charged. The vltage acrss the nput nductr L s nput vltage (v ) whch magnetze the nput nductr L and hence demagnetze the utput nductr L. The current flwng thrugh the capactr C m s the sum f the current flwng thrugh energy transferrng capactr C b and the utput nductr, L. The current flwng thrugh C s the dfference n current flwng between L and R L. The mde 1 peratn s represented by the fllwng dfferental Equatns 3.2. L L v t L L vcm v t v v C L t RL v m C b t c m c L (3.2)

73 Fgure 3.2 Mde 1 peratn f pstve utput KY bst cnverter 3.2.2 Mde 2 peratn The KY Bst Cnverter mde 2 peratn s represented by fgure 3.3 n whch swtch S 1 s turned ON and swtch S 2 s turned OFF whch reverse-bas dde D b and the buffer capactr C m gets charged, whle energy transferrng capactr C b gets dscharged. The vltage acrss the nput nductr L s the dfference between the vltage acrss capactr C m (v Cm ) and the nput vltage (v ) whch demagnetze the nput nductr L and magnetze the utput nductr L snce the vltage acrss nductr L s the dfference n vltages v and 2v Cm. The current thrugh capactr C m s the dfference between currents flwng thrugh nductr L and L. The current flwng thrugh the capactr C s the dfference n current flwng thrugh the utput nductr L and the lad resstr R L. The mde 2 peratn s represented by the fllwng dfferental Equatns 3.3.

74 L L v cm v t L L 2v m v t v v C L t RL vcm Cm LL t c (3.3) Fgure 3.3 Mde 2 peratn f pstve utput KY bst cnverter The average value f vltage r current s btaned frm the Equatn 3.4 n whch varable x represents vltage r current and s a tme varyng quantty. x 1 Ts xd T (3.4) s 0 The averaged Equatns are btaned frm the Equatns 3.2 t 3.4 and represented by the set f Equatns gven n 3.5.

75 L L v 1 d vcm t L L 2 d vcm v t v v C L t RL vcm C 1 d d t m L L c b (3.5) Based n the ampere-secnd balance, cb can be expressed as a functn f L as shwn n Equatn 3.6 c b (1 d) L (3.6) d Equatn 3.7 and hence substtutng Equatn 3.6 n 3.5, t can be rewrtten as n L L v 1 d vcm t L L 2 d vcm v t v v C L t RL vcm C (2 d) 1d t m L L (3.7) T determne the perturbatn and lnearzatn f (3.7) x s represented by crrespndng dc quescent value X and supermpsed small ac value ˆx, assumng that ac varatn s small n magntude when cmpared t the dc quescent value. Let

76 v vˆ d D dˆ L ILˆ L L ILˆ L v vˆ v vˆ c c c m m m vˆ dˆ ˆ L and ˆ L vˆ vˆ c m D I L I L c m (3.8) By equatng the Equatns 3.8 and 3.7, we get Equatn 3.9, IL ˆ L L vˆ 1Ddˆ cmvˆcm t L ˆL I 2 ˆ cm ˆcm ˆ L Dd v v t vˆ vˆ C ILˆL t RL cmvˆcm C (2 Ddˆ) I ˆ 1Dd I ˆ t m L L L L (3.9) Equatn 3.10 The quescent Equatns that are btaned frm 4.9 were gven by 0 (1 D ) cm 0 (2 D) cm 0 IL RL 0 (2 DI ) L (1 DI ) L (3.10) where D s duty cycle f the PWM sgnal. The vltage cnversn rat f the pstve utput KY Bst Cnverter btaned frm Equatn 3.10 s gven n Equatn 3.11

77 2 D (3.11) 1 D 3.2.3 Pstve utput KY bst cnverter specfcatns The specfcatns f Pstve Output KY Bst Cnverter taken nt accunt are depcted by the fllwng Table 3.1. In ths wrk, the specfcatns cnsdered are as adpted by Hwu, et. al., (2010) n hs prpsed PID cntrlled cnverter t cmpare the results f the prpsed Fuzzy and Neur-Fuzzy cntrl technques wth the result f exstng PID cntrlled cnverter. Table 3.1 Specfcatns f pstve utput KY bst cnverter Parameter Symbl alue Unt Input vltage 12 Rated utput vltage 36 Rated lad current I 2.5 A Input nductance L 15 µh Output nductance L 15 µh Buffer capactance C m 1000 µf Energy transferrng capactance C b 680 µf Output capactance C 470 µf Lad resstance R L 14.4 Swtchng frequency f s 195 khz 3.3 Negatve utput KY bst cnverter The negatve utput KY Bst Cnverter ntrduced by Hwu. K.I, et. al., (2009b) cnssts f a MOSFET swtch S wth prtectve bdy dde D s ; energy transferrng capactr C b ; nductr L; utput lad resstr R and the utput capactr C wth energy transferrng dde D b and freewheelng dde D f as shwn n fgure 3.4.

78 Fgure 3.4 Negatve utput KY bst cnverter The negatve utput KY Bst Cnverter perates n tw mdes based n MOSFET (swtch S) swtchng sequence, namely Mde 1 and Mde 2 peratn. In Mde 1 peratn, swtch S s turned ON whereas, n Mde 2 peratn, swtch S s turned OFF. 3.3.1 Mde 1 peratn In ths mde swtch S s turned ON, thereby magnetzng the nductr L equal t the supply vltage and smultaneusly chargng capactr C b as dde D f cnducts. The lad R s suppled by capactr vltage C as shwn n fgure 3.5. The dfferental equatns gven by Equatn 3.12 represent the mde 1 peratn. L L v t v C t R L Cb t v v (3.12)

79 Fgure 3.5 Mde 1 peratn f negatve utput KY bst cnverter 3.3.2 Mde 2 peratn In ths mde swtch S s turned OFF, thereby nductr L s demagnetzed and dscharges the capactr C b, hence D b s frward based and pwer flws acrss the lad R as shwn n fgure 3.6, whch s represented by the dfferental Equatn 3.13 as fllws. Fgure 3.6 Mde 2 peratn f negatve utput KY bst cnverter L v v L L t b (3.13)

80 Frm the abve equatns (4.12) and (4.13) f the peratng mde 1 and the peratng mde 2, the relatnshp between the DC nput vltage ( ) and the DC utput vltage ( ) s llustrated by Equatn 3.14 as fllws, n whch D s the duty cycle. 1 1 D (3.14) 3.3.3 Negatve utput KY bst cnverter specfcatns Table 3.2 gves the specfcatn f negatve utput KY Bst Cnverter whch K. I. Hwu et. al. (2009b) had put frward wth a PI cntrller fr the cntrl f negatve utput KY Bst Cnverter. The belw specfcatns has been taken nt cnsderatn n ths wrk fr cmparng the utput f the prpsed Neur-Fuzzy Cntrller utput wth the exstng ne. Table 3.2 Specfcatns f negatve utput KY bst cnverter Parameter Symbl alue Unt Input vltage 5 Rated utput vltage 12 Input nductr L 10 µh Output capactr C 2200 µf Energy transferrng capactr C b 1000 µf Lad resstr R 6 Ohm Swtchng frequency f s 195 KHz 3.4 Summary Thus Chapter 3 enumerates the pstve and negatve utput KY bst cnverter peratng mdes, vltage gan and ts specfcatns. Ths

81 pstve utput KY Bst Cnverter cntrlled by exstng PID cntrller (Hwu, et. al., 2009a, 2010) yelds an Output ltage Rpple f 200m whch s beynd the essental lmt, yet lwer than the ther class f DC DC cnverters. The negatve utput KY Bst Cnverter wth the exstng PI cntrlled system (Hwu, et. al., 2009b) yelds an Output ltage Rpple f 60m whch can be reduced further t perate wthn the prescrbed rpple cntent. Hence bth the cnverters can be cntrlled by an ntellgent cntrller t reduce the Output ltage Rpple (OR) cntent.