A crash course in Digital Logic

Transcription

1 crash course in Digital Logic Computer rchitecture 1DT016 distance Fall Per Foyer Mail:

2 We start from here Gates Flip-flops Multiplexers (MUX) Demultiplexers (DEMUX) Registers Latches Shift registers RM ROM

3 and get here! The MIPS CPU

4 Where in the machine now? Translation (compiler) Level 5 Level 4 Translation (assembler) Level 3 Partial interpretation (OS) Interpretation (microprogram) Executed by hardware Level 2 Level 1 Level 0 Problem-oriented language level ssembly language level Operating system machine level Conventional machine level Microprogramming level Digital Logic Level int addmul( int t ) { return (t + 2) * 2; } addmul: addi $r1, $zero, 2 mul $r1, $r1, 2 jr $ra li $v0, 4 syscall 0x x c 0x03E Per.Foyer@it.uu.se

5 Binary representation rbitrary numbers can be represented in binary format. x = 2 n - 1 where n is the number of bits and x the maximum (positive) decimal number that can be represented. So: Byte (8 bits): = 0 to 255 Half word (16 bits): = 0 to Word (32 bits): = 0 to Bits are numbered from right to left MSB LSB Per.Foyer@it.uu.se

6 Negative binary numbers (1) One s complement: The most significant bit used as sign bit (negative number when set): S This gives two representations of zero: -0 and +0 which is a problem in arithmetic calculations. Example: = = 0 so = = 127 which is seriously wrong. Per.Foyer@it.uu.se

7 Negative binary numbers (2) Two s complement: -m 2 = inv( n 2 ) where n is the (negative) number and inv() is bitwise invert for a specific number of bits. Example: Convert 3 2 to negative in 8 bit representation: inv( ) = symmetric representation! Examples: For 8 bits: -128 to 127 For 16 bits: to We can still see that a number is positive or negative by inspecting the most significant bit. Per.Foyer@it.uu.se

8 Binary arithmetic Example: and are to be added binary: 1 1 Carry Row (69) (12) (81) Example: is to be substracted from using add 69+(-12) Use two s complement: Convert to binary: (12) Invert: dd one: (-12) Carry Row So: (69) (-12) (57) Per.Foyer@it.uu.se

9 Boolean algebra (1) The algebraic logic behind gate logic. Three operators: OR logical sum, written + ND logical product, written * NOT logical negation (inversion) Let and B be two inputs and R output. Then: R is true only if is true ND B is true ( R = * B ) R is true if is true OR B is true ( R = + B ) R is true only if is NOT true ( R = ) Per.Foyer@it.uu.se

10 Boolean algebra (2) There are several laws of Boolean algebra that are helpful in manipulating logic equations. Identity law: + 0 = and * 1 = Zero and One laws: + 1 = 1 and * 0 = 0 Inverse laws: + =1 and * = 0 Commutative laws: + B = B + and * B = B * ssociative laws: + (B + C) = ( + B) + C and * (B * C) = ( * B) * C Distributive laws: * (B + C) = ( * B) + ( * C) and + (B * C) = ( + B) * ( + C) Remember: ND is *, OR is + Per.Foyer@it.uu.se

11 Numbers in different bases Decimal Binary Octal Hexadecimal B C D E F Per.Foyer@it.uu.se

12 Buffers and inverters In = Out with more current In = Out with more current if E is true. Else Hi-Z E = NOT = NOT if E is true. Else Hi-Z E Hi stands for High (voltage) Lo stands for Low voltage (often) zero volts Hi-Z means High Impedance (Z) Per.Foyer@it.uu.se

13 OR and ND B R ( R = + B ) B R OR B ND R ( R = * B ) B R Per.Foyer@it.uu.se

14 NOR and NND B NOR R ( R = + B ) B R B NND R ( R = * B ) B R Per.Foyer@it.uu.se

15 XOR and XNOR R B XOR exclusive OR True if only one of and B is true but not both B R B XNOR exclusive NOR The opposite of the above. R B R (XNOR is very seldom used) Per.Foyer@it.uu.se

16 _ Negative logic It s sometimes easier and more convenient to invert inputs than rewriting logic using boolean algebra. B R = B R B R Per.Foyer@it.uu.se

17 1-bit full adder C IN B R C OUT B C IN R C OUT C1 IN 2-bit adder? Right or Wrong? B C1 OUT C2 IN R1 C R2 C2 OUT Per.Foyer@it.uu.se

18 Square waves Rising edge Falling edge Logic 1 Logic 0 Duty cycle Period (t) f = 1 / t Per.Foyer@it.uu.se

19 Demo: How to use LogSim Our first digital playground: Testing simple gates Toying with a four bit counter Per.Foyer@it.uu.se

20 Buses Bus is a number of parallel lines (bus width), often binary, that has something in common. Examples: Data bus (1, 2, 4, 8, 16, 32, 64, 2 n bits wide) ddress bus (1, 2, 4,, 2 n bits wide) Control bus (1, 2, 4,, 2 n bits wide) 8-bit bus dress bus (32) Data bus (16) M e m o r y Control bus (2) ( CE, R/W ) Per.Foyer@it.uu.se

21 The rithmetic Logic Unit (LU) rithmetic Logic + B B * B / B < B == B ND B OR B XOR B LU Per.Foyer@it.uu.se

22 The MIPS LU in Verilog Look at the picture. What s wrong with the Verilog code? Per.Foyer@it.uu.se

23 LogSim 4-bit LU Exterior design view Status flags (out) Operand 1 (in) Operand 2 (in) Result (out) LU function (in) Per.Foyer@it.uu.se

24 Demo: LogSim: 4-bit LU Testing the LU

25 Finito la musica!