Arithmetic logic unit
|
|
- Wesley Ellis
- 5 years ago
- Views:
Transcription
1 FEATURES Provides arithmetic operation: add, subtract, compare, and double; plus 12 other arithmetic operatio Provides all logic operatio of two variables: Exclusive-OR, Compare, AND, NAND, NOR, OR, plus 10 other logic operatio Full look-ahead carry for high speed arithmetic operation on long words 0% faster than S181 with only 0% S181 power coumption Available in 00mil-wide Slim 2-pin Dual In-Line package DESCRIPTION The is a -bit high-speed parallel Arithmetic Logic Unit (ALU). Controlled by the four Function Select inputs (S0 S) and the Mode Control input (M), it can perform all the possible logic operatio or different arithmetic operatio on active-high or active-low operands. The Function Table lists these operatio. PIN CONFIGURATION B0 1 2 A0 S S2 S1 S0 Cn M F0 F1 F2 GND V CC A1 B1 A2 B2 A B G C n+ P A=B F SF0019 TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) ma ORDERING INFORMATION DESCRIPTION 2-Pin Plastic Slim DIP (00 mil) 2-Pin Plastic SOL COMMERCIAL RANGE V CC = 5V ±10%, T amb = 0 C to +0 C NN ND INPUT AND OUTPUT LOADING AND FAN-OUT TABLE NOTE: PINS DESCRIPTION F (U.L.) HIGH/LOW LOAD VALUE HIGH/LOW A0 A A operand inputs 1.0/ 20µA/1.8mA B0 B B operand inputs 1.0/ 20µA/1.8mA M Mode control input 1.0/1.0 20µA/0.6mA S0 S Function select input 1.0/ 20µA/2.mA Cn Carry input 1.0/ 20µA/mA C n+ Carry output 50/ 1.0mA/20mA P Carry Propagate output 50/ 1.0mA/20mA G Carry Generate output 50/ 1.0mA/20mA A=B Compare output OC/ OC/20mA F0 F Outputs 50/ 1.0mA/20mA One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state. OC = Open Collector March,
2 LOGIC SYMBOL IEC/IEEE SYMBOL Active-High Operands A0 B0 A1 B1 A2 B2 A B Cn M S0 S1 S2 C n+ A=B G P S F0 F1 F2 F ALU 0 [T] 5 M 0 CP 21 CG CO 8 P=G CI 2 1 P0 Q0 2 P1 22 Q1 21 P2 20 Q2 19 P 18 Q Active-Low Operands SF A0 B0 A1 B1 A2 B2 A B Cn M S0 S1 S2 C n+ A=B G P S F0 F1 F2 F 1 1 V CC = Pin 2 GND = Pin SF00196 March,
3 LOGIC DIAGRAM S0 6 S1 5 S2 S B 18 1 G A 19 C n+ B2 20 P A2 21 B F A F2 B0 1 1 A=B A0 2 M 8 Cn 10 9 F1 F0 V CC = Pin 2 GND = Pin 12 SF0019 March, 1989
4 When the Mode Control input (M) is High, all internal carries are inhibited and the device performs logic operatio on the individual bits as listed. When the Mode control input is Low, the carries are enabled and the device performs arithmetic operatio on the two -bit words. The device incorporates full internal carry look-ahead and provides for either ripple carry between device using the C n+ output, or for carry look-ahead between packages using the signals P (Carry Propagate) and G (Carry Generate). P and G are not affected by carry in. When speed requirements are not stringent, it can be used in a simple ripple carry mode by connecting the Carry output (C n+ ) signal to the Carry input (Cn) of the next unit. For high-speed operation, the device is used in conjunction with the F182 carry look-ahead circuit. One carry look-ahead package is required for each group of four devices. Carry look-ahead can be provided at various levels and offers high speed capability over extremely long word lengths. The A=B output from the device goes High when all four F outputs are High and can be used to indicate logic equivalence over -bits when the unit is in the subtract mode. The A=B output is open-collector and can be wired-and with other A=B outputs to give a comparison for more than bits. The A=B signal can also be used with the C n+ signal to indicate A>B and A<B. The Function Table lists the arithmetic operatio that are performed without a carry in. An incoming carry adds a one to each operation. Thus select code LHHL generates A minus B minus 1 (two s complement notation) without a carry in and generates A minus B when a carry is applied. Because subtraction is actually performed by complementary addition (one s complement), a carry out mea borrow; thus, a carry is generated when there is no underflow and no carry is generated when there is underflow. As indicated, this device can be used with either active-low inputs producing active-low outputs or with active-high inputs producing active-high outputs. For either case, the table lists the operatio that are performed to the operands labeled iide the logic symbol. MODE-SELECT FUNCTION TABLE MODE SELECT INPUTS ACTIVE HIGH INPUTS & OUTPUTS ACTIVE LOW INPUTS & OUTPUTS S S2 S1 S0 Logic (M=H) Arithmetic** (M=L) (Cn=H) Logic (M=H) Arithmetic** (M=L) (Cn=L) L L L L A A A A minus 1 L L L H A+B A+B AB AB minus 1 L L H L AB A+B A+B AB minus 1 L L H H Logical 0 minus 1 Logical 1 minus 1 L H L L AB A plus AB A+B A plus (A+B) L H L H B (A+B) plus AB B AB plus (A+B) L H H L A B A minus B minus 1 A B A minus B minus 1 L H H H AB AB minus 1 A+B A+B H L L L A+B A plus AB AB A plus (A+B) H L L H A B A plus B A B A plus B H L H L B (A+B) plus AB B AB plus (A+B) H L H H AB AB minus 1 A+B A+B H H L L Logical 1 A plus A* Logical 0 A plus A* H H L H A+B (A+B) plus A AB AB plus A H H H L A+B (A+B) plus A AB AB plus A H H H H A A minus 1 A A H = High voltage level L = Low voltage level * = Each bit is shifted to the next more significant position. ** = Arithmetic operatio expressed in two s complement notation. March, 1989
5 Table 1. Sum Mode Test Function Inputs: S0 = S = V, S1 = S2 = M = 0V INPUT OTHER INPUT, SAME BIT OTHER DATA INPUTS OUTPUT UNDER TEST Apply V Apply GND Apply V Apply GND UNDER TEST, A i B i None Remaining A and B Cn F i, B i A i None Remaining A and B Cn F i, A i B i None None Remaining A, B, Cn P, B i A i None None Remaining A, B, Cn P, A i None B i Remaining B Remaining A, Cn G, B i None A i Remaining B Remaining A, Cn G, A i None B i Remaining B Remaining A, Cn C n+, B i None A i Remaining B Remaining A, Cn C n+, Cn None None All A All B Any F or C n+ Table 2. Diff Mode Test Function Inputs: S1 = S2 = V, S0 = S = M = 0V INPUT OTHER INPUT, SAME BIT OTHER DATA INPUTS OUTPUT UNDER TEST Apply V Apply GND Apply V Apply GND UNDER TEST, A i None B i Remaining A Remaining B, Cn F i, B i A i None Remaining A Remaining B, Cn F i, A i None B i None Remaining A, B, Cn P, B i A i None None Remaining A, B, Cn P, A i B i None None Remaining A, B, Cn G, B i None A i None Remaining A, B, Cn G, A i None B i Remaining A Remaining B, Cn A=B, B i A i None Remaining A Remaining B, Cn A=B, A i B i None None Remaining A, B, Cn C n+, B i None A i None Remaining A, B, Cn C n+, Cn None None All A and B None Any F or C n+ Table. Logic Mode Test Function Inputs: S1 = S2 = V, S0 = S = 0V INPUT OTHER INPUT, SAME BIT OTHER DATA INPUTS OUTPUT UNDER TEST Apply V Apply GND Apply V Apply GND UNDER TEST, A i B i None None Remaining A, B, Cn F i, B i A i None None Remaining A, B, Cn F i ABSOLUTE MAXIMUM RATINGS (Operation beyond the limits set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free-air temperature range.) SYMBOL RATING UNIT V CC Supply voltage 0.5 to + V V IN Input voltage 0.5 to + V I IN Input current 0 to +5 ma V OUT Voltage applied to output in High output state 0.5 to V CC V I OUT Current applied to output in Low output state 0 ma T amb Operating free-air temperature range 0 to +0 C T stg Storage temperature range 65 to +0 C March,
6 RECOMMENDED OPERATING CONDITIONS LIMITS SYMBOL MIN NOM MAX UNIT V CC Supply voltage V V IH High-level input voltage 2.0 V V IL Low-level input voltage 0.8 V I IK Input clamp current 18 ma V OH High level output voltage A=B only V I OH High-level output current Any output except A=B 1 ma I OL Low-level output current 20 ma T amb Operating free-air temperature range 0 +0 C DC ELECTRICAL CHARACTERISTICS (Over recommended operating free-air temperature range unless otherwise noted.) LIMITS SYMBOL TEST CONDITIONS 1 MIN TYP 2 MAX UNIT I OH V OH High-level output current High-level output voltage A=B only V CC = MIN, V IL = MAX; V IH = MIN, V OH = MAX 250 µa Any output except A=B V CC = MIN, V IL = MAX, I OH = MAX V IH = MIN V CC = MIN, V OL Low-level output voltage V IL = MAX, I OL = MAX V IH = MIN ±10%V CC ±5%V CC 2.. ±10%V CC ±5%V CC V IK Input clamp voltage V CC = MIN, I I = I IK V I I Input current at maximum input voltage V CC = MAX, V I = V 100 µa I IH High-level input current V CC = MAX, V I = 2.V 20 µa I IL I OS I CC Low-level input current Short-circuit output current Supply current (total) M 0.6 ma A0 A, B0 B S0 S V CC = MAX, V I = 0.5V V V 1.8 ma 2. ma Cn ma Any output except A=B I CCH V CC = MAX I CCL V CC = MAX 60 0 ma S0 S=M=A0 A=V, B0 B=Cn=GND S0 S=M=V, B0 B=Cn=A0 A=GND 65 ma 65 ma NOTES: 1. For conditio shown as MIN or MAX, use the appropriate value specified under recommended operating conditio for the applicable type. 2. All typical values are at V CC = 5V, T amb = 25 C.. Not more than one output should be shorted at a time. For testing I OS, the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, I OS tests should be performed last. March,
7 AC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL TEST CONDITIONS V CC = +V T amb = +25 C C L = 50pF R L = 500Ω V CC = +V ± 10% T amb = 0 C to +0 C C L = 50pF R L = 500Ω UNIT Mode Table Waveform Condition MIN TYP MAX MIN MAX Cn to C n+ Sum Diff M=0V Sum 1 2 M=S1=S2=0V, An or Bn to C n+ S0=S=V Diff 2 2 M=S0=S=0V, An or Bn to C n+ S1=S2=V Cn to Fn Diff Sum M=0V An or Bn to G Sum 1 1 M=S1=S2=0V, S0=S=V An or Bn to G Diff 2 2 M=S0=S=0V, S1=S2=V An or Bn to P Sum 1 2 M=S1=S2=0V, S0=S=V 2.0 An or Bn to P Diff 2 1, 2 M=S0=S=0V, S1=S2=V 2.0 Sum 1 1, 2 M=S1=S2=0V, A i or B i to F i S0=S=V Diff 2 1, 2 M=S0=S=0V, A i or B i to F i S1=S2=V An or Bn to Fn Sum 1, 2 An or Bn to Fn Diff 1, Logic 1, 2 M=V A i or B i to F i An or Bn to A=B Diff 2 1, 2 M=S0=S=0V, S1=S2=V NOTES: An or Bn to Fn mea any A or any B to any F; A i or B i to F i mea A1, B1 to F1; A2, B2 to F2 (the identifying number must be the same) March, 1989
8 AC ELECTRICAL CHARACTERISTICS SYMBOL S i to F i (Inverting) S i to F i (Non-Inverting) S i to A=B (Inverting) S i to A=B (Non-Inverting) S i to C n+ (Inverting) S i to G (Non-Inverting) S i to P (Non-Inverting) M to F i (Inverting) M to F i (Non-Inverting) M to F i (Inverting) M to F i (Non-Inverting) M to A=B (Inverting) M to A=B (Non-Inverting) M to A=B (Inverting) M to A=B (Non-Inverting) TEST CONDITIONS V CC = +V T amb = +25 C C L = 50pF R L = 500Ω LIMITS V CC = +V ± 10% T amb = 0 C to +0 C C L = 50pF R L = 500Ω Mode Waveform MIN TYP MAX MIN MAX Sum 1 Sum 2 Diff 1 Diff 2 Sum Sum Diff Diff UNIT AC WAVEFORMS For all waveforms, = 1.5V. V IN V IN V OUT V OUT SF00092 SF0009 Waveform 1. Propagation Delay for Non-Inverting Paths Waveform 2. Propagation Delay for Inverting Paths March,
9 TEST CIRCUIT AND WAVEFORMS PULSE GENERATOR V IN V CC D.U.T. V OUT R L V NEGATIVE PULSE 90% 10% t THL ( t f ) t w t TLH ( t r ) 10% 90% AMP (V) 0V R T C L R L Test Circuit for Open Collector Outputs SWITCH POSITION TEST SWITCH Open Collector closed All other open POSITIVE PULSE 10% t TLH ( t r ) t THL ( t f ) 90% 90% t w Input Pulse Definition 10% AMP (V) 0V DEFINITIONS: R L = Load resistor; see AC electrical characteristics for value. C L = Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value. R T = Termination resistance should be equal to Z OUT of pulse generators. family F INPUT PULSE REQUIREMENTS amplitude rep. rate t w t TLH t THL V 1.5V 1MHz 500 SF00195 March,
FEATURES OF 74F06A, 74F07A
7F0, 7F0A, 7F07, 7F07A FEATURES OF 7F0, 7F07 Open Collector output drive ma High speed V output termination voltage Symmetrical propagation delays FEATURES OF 7F0A, 7F07A Open Collector output drive ma
More informationINTEGRATED CIRCUITS. 74ALS11A Triple 3-Input AND gate. Product specification 1991 Feb 08 IC05 Data Handbook
INTEGRATED CIRCUITS Triple 3-Input AND gate 1991 Feb 08 IC05 Data Handbook TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 5.5ns 1.3mA PIN CONFIGURATION 1A 1 1B 2 14 13 V CC 1C ORDERING INFORMATION
More informationINTEGRATED CIRCUITS. 74F521 8-bit identity comparator. Product specification May 15. IC15 Data Handbook
INTEGRATED CIRCUITS 1990 May IC Data Handbook FEATURES Compares two 8-bit words in 6.5ns typical Expandable to any word length DESCRIPTION The is an expandable 8-bit comparator. It compares two words of
More informationUp/down binary counter with separate up/down clocks
FEATURES Synchronous reversible 4-bit counting Asynchronous parallel load capability Asynchronous reset (clear) Cascadable without external logic DESCRIPTION The is a 4-bit synchronous up/down counter
More informationINTEGRATED CIRCUITS. 74F154 1-of-16 decoder/demultiplexer. Product specification Jan 08. IC15 Data Handbook
INTEGRATED CIRCUITS 1-of-16 decoder/demultiplexer 1990 Jan 08 IC15 Data Handbook Decoder/demultiplexer FEATURES 16-line demultiplexing capability Mutually exclusive outputs 2-input enable gate for strobing
More information4-bit magnitude comparator
FEATURES High-impedance NPN base inputs for reduced loading (0µA in High and ow states) Magnitude comparison of any binary words Serial or parallel expaion without extra gating PIN CONFIGURATION B V CC
More informationINTEGRATED CIRCUITS. 74ALS138 1-of-8 decoder/demultiplexer. Product specification 1996 Jul 03 IC05 Data Handbook
INTEGRATED CIRCUITS 1996 Jul 03 IC05 Data Handbook FEATURES Demultiplexing capability Multiple input enable for easy expansion Ideal for memory chip select decoding DESCRIPTION The decoder accepts three
More information74F393 Dual 4-bit binary ripple counter
INTEGRATED CIRCUITS 1988 Nov 01 IC15 Data Handbook FEATURES Two 4-bit binary counters Two Master Resets to clear each 4-bit counter individually PIN CONFIGURATION CPa 1 MRa 2 14 13 V CC CPb DESCRIPTION
More informationINTEGRATED CIRCUITS. 74ALS30A 8-Input NAND gate. Product specification 1991 Feb 08 IC05 Data Handbook
INTEGRATED CIRCUITS -Input NAND gate 1991 Feb 0 IC05 Data Handbook TPE TPICAL PROPAGATION DELA TPICAL SUPPL CURRENT (TOTAL) 5.0ns 0.5mA PIN CONFIGURATION A 1 B 2 14 13 V CC NC ORDERING INFORMATION C 3
More information74F181 4-Bit Arithmetic Logic Unit
4-Bit Arithmetic Logic Unit General Description The 74F181 is a 4-bit Arithmetic logic Unit (ALU) which can perform all the possible 16 logic operatio on two variables and a variety of arithmetic operatio.
More informationINTEGRATED CIRCUITS. 74F804, 74F1804 Hex 2-input NAND drivers. Product specification Sep 14. IC15 Data Handbook
INTEGRATED CIRCUITS F0, F0 0 Sep IC5 Data Handbook F0/0 FEATURES High capacitive drive capability Choice of configuration Corner V CC and GND F0 Center V CC and GND F0 Typical propagation delay of.5ns
More informationNTE74LS181 Integrated Circuit TTL Arithmetic Logic Unit/Function Generator
NTE74LS181 Integrated Circuit TTL Arithmetic Logic Unit/Function Generator Description: The NTE74LS181 is an arithmetic logic unit (ALU)/function generator in a 24 Lead DIP type package that has the complexity
More information8-bit shift register with 2:1 mux-in, latched B inputs, and serial out N74F835N FEATURES PIN CONFIGURATION
FATURS Specifically designed for Video applicatio Combines the 74F373, two 74F57s, and the 74F66 functio in one package Interleaved loading with : mux ual 8-bit parallel inputs Traparent latch on all B
More informationDM54LS181 DM74LS181 4-Bit Arithmetic Logic Unit
DM54LS181 DM74LS181 4-Bit Arithmetic Logic Unit eneral Description The LS181 is a 4-bit Arithmetic Logic Unit (ALU) which can perform all the possible 16 logic operatio on two variables and a variety of
More informationDM74LS181 4-Bit Arithmetic Logic Unit
DM74LS181 4-Bit Arithmetic Logic Unit General Description The LS181 is a 4-bit Arithmetic Logic Unit (ALU) which can perform all the possible 16 logic operations on two variables and a variety of arithmetic
More informationINTEGRATED CIRCUITS. 74F85 4-bit magnitude comparator. Product specification 1994 Sep 27 IC15 Data Handbook. Philips Semiconductors
INTEGRATED CIRCUITS 1994 Sep 27 IC15 Data Handbook Philips Semiconductors FEATURES High-impedance NPN base inputs for reduced loading (20µA in High and ow states) Magnitude comparison of any binary words
More information74F382 4-Bit Arithmetic Logic Unit
4-Bit Arithmetic Logic Unit General Description The 74F382 performs three arithmetic and three logic operatio on two 4-bit words, A and B. Two additional Select input codes force the Function outputs LOW
More informationNTE74HC109 Integrated Circuit TTL High Speed CMOS, Dual J K Positive Edge Triggered Flip Flop w/set & Reset
NTE74HC109 Integrated Circuit TTL High Speed CMOS, Dual J K Positive Edge Triggered Flip Flop w/set & Reset Description: The NTE74HC109 is a dual J K flip flip with set and reset in a 16 Lead plastic DIP
More information74HC574; 74HCT574. Octal D-type flip-flop; positive edge-trigger; 3-state
Rev. 7 4 March 2016 Product data sheet 1. General description 2. Features and benefits 3. Ordering information The is an 8-bit positive-edge triggered D-type flip-flop with 3-state outputs. The device
More information74HC General description. 2. Features. 3-to-8 line decoder, demultiplexer with address latches; inverting. Product data sheet
3-to-8 line decoder, demultiplexer with address latches; inverting Product data sheet 1. General description 2. Features The is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky
More informationNTE74HC165 Integrated Circuit TTL High Speed CMOS, 8 Bit Parallel In/Serial Out Shift Register
NTE74HC165 Integrated Circuit TTL High Speed CMOS, 8 Bit Parallel In/Serial Out Shift Register Description: The NTE74HC165 is an 8 bit parallel in/serial out shift register in a 16 Lead DIP type package
More informationLow Power Quint Exclusive OR/NOR Gate
100307 Low Power Quint Exclusive OR/NOR Gate General Description The 100307 is monolithic quint exclusive-or/nor gate. The Function output is the wire-or of all five exclusive-or outputs. All inputs have
More informationSynchronous 4 Bit Counters; Binary, Direct Reset
Synchronous 4 Bit Counters; Binary, Direct Reset This synchronous, presettable counter features an internal carry look-ahead for application in high-speed counting designs. Synchronous operation is provided
More information74F193 Up/Down Binary Counter with Separate Up/Down Clocks
April 1988 Revised September 2000 Up/Down Binary Counter with Separate Up/Down Clocks General Description The is an up/down modulo-16 binary counter. Separate Count Up and Count Down Clocks are used, and
More informationSN74LS151D LOW POWER SCHOTTKY
The TTL/MSI SN74LS5 is a high speed 8-input Digital Multiplexer. It provides, in one package, the ability to select one bit of data from up to eight sources. The LS5 can be used as a universal function
More informationCONDITIONS T amb = 25 C; GND = 0V. C L = 50pF; V CC = 5V 4.4 ns. Outputs disabled; V O = 0V or V CC
9-bit -type flip-flop with reset and enable FEATUES High speed parallel registers with positive edge-triggered -type flip-flops Ideal where high speed, light loading, or increased fan-in are required with
More information74F283 4-Bit Binary Full Adder with Fast Carry
74F283 4-Bit Binary Full Adder with Fast Carry General Description The 74F283 high-speed 4-bit binary full adder with internal carry lookahead accepts two 4-bit binary words (A 0 A 3, B 0 B 3 ) and a Carry
More informationNTE4501 Integrated Circuit CMOS, Dual 4 Input NAND Gate, 2 Input NOR/OR Gate, 8 Input AND/NAND Gate
NTE4501 Integrated Circuit CMOS, Dual 4 Input NAND Gate, 2 Input NOR/OR Gate, 8 Input AND/NAND Gate Description: The NTE4501 is a triple gate device in a 16 Lead DIP type package constructed with MOS P
More informationSN74LS153D 74LS153 LOW POWER SCHOTTKY
74LS153 The LSTTL/MSI SN74LS153 is a very high speed Dual 4-Input Multiplexer with common select inputs and individual enable inputs for each section. It can select two bits of data from four sources.
More information74HC238; 74HCT to-8 line decoder/demultiplexer
Product data sheet 1. General description 2. Features 74HC238 and 74HCT238 are high-speed Si-gate CMOS devices and are pin compatible with Low-Power Schottky TTL (LSTTL). The 74HC238/74HCT238 decoders
More information74HC257; 74HCT257. Quad 2-input multiplexer; 3-state
Product data sheet 1. General description 2. Features The is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). The has four identical 2-input multiplexers with
More information74LS195 SN74LS195AD LOW POWER SCHOTTKY
The SN74LS95A is a high speed 4-Bit Shift Register offering typical shift frequencies of 39 MHz. It is useful for a wide variety of register and counting applications. It utilizes the Schottky diode clamped
More informationINTEGRATED CIRCUITS. 74LV688 8-bit magnitude comparator. Product specification Supersedes data of 1997 May 15 IC24 Data Handbook.
INTEGRATED CIRCUITS Supersedes data of 1997 May 15 IC24 Data Handbook 1998 Jun 23 FEATURES Wide operating voltage: 1.0 to 5.5V Optimized for low voltage applications: 1.0V to 3.6V Accepts TTL input levels
More informationNTE74177 Integrated Circuit TTL 35Mhz Presettable Binary Counter/Latch
NTE74177 Integrated Circuit TTL 35Mhz Presettable Binary Counter/Latch Description: The NTE74177 is a high speed monolithic counter in a 14 Lead plastic DIP type package consisting of four DC coupled master
More information74HC123; 74HCT123. Dual retriggerable monostable multivibrator with reset
Product data sheet 1. General description 2. Features The are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard
More information74F269 8-Bit Bidirectional Binary Counter
74F269 8-Bit Bidirectional Binary Counter General Description The 74F269 is a fully synchronous 8-stage up/down counter featuring a preset capability for programmable operation, carry lookahead for easy
More information74HC General description. 2. Features. 3-to-8 line decoder, demultiplexer with address latches; inverting
3-to-8 line decoder, demultiplexer with address latches; inverting Rev. 03 11 November 2004 Product data sheet 1. General description 2. Features The is a high-speed Si-gate CMOS device and is pin compatible
More informationUNISONIC TECHNOLOGIES CO., LTD U74HC164
UNISONIC TECHNOLOGIES CO., LTD 8-BIT SERIAL-IN AND PARALLEL-OUT SHIFT REGISTER DIP-14 DESCRIPTION The is an 8-bit edge-triggered shift registers with serial input and parallel output. A LOW-to-HIGH transition
More informationINTEGRATED CIRCUITS. 74LV00 Quad 2-input NAND gate. Product specification Supersedes data of 1998 Apr 13 IC24 Data Handbook.
INTEGRATED CIRCUITS Supersedes data of 1998 Apr 13 IC24 Data Handbook 1998 Apr 20 FEATURES Wide operating voltage: 1.0 to 5.5 V Optimized for low voltage applications: 1.0 to 3.6 V Accepts TTL input levels
More informationOctal buffer/line driver (3-State)
FEATURES Octal bus interface Functio similar to the ABT4 Provides ideal interface and increases fan-out of MOS Microprocessors Efficient pinout to facilitate PC board layout 3-State buffer outputs sink
More information74LS75 Quad Latch. DM74LS75 Quad Latch. General Description. Ordering Code: Logic Diagram. Connection Diagram. Function Table (Each Latch)
74LS75 Quad Latch General Description These latches are ideally suited for use as temporary storage for binary information between processing units and input/output or indicator units. Information present
More informationHCC/HCF40181B 4-BIT ARITHMETIC LOGIC UNIT
4-BIT ARITHMETIC LOGIC UNIT FULL LOOK-AHEAD CARRY FOR SPEED OPERATIONS ON LONG WORDS GENERATES 16 LOGIC FUNCTIONS OF TWO BOOLEAN ARIABLES GENERATES 16 ARITHMETIC FUNCTIONS OF TWO 4-BIT BINARY WORDS A =
More informationNTE74HC173 Integrated Circuit TTL High Speed CMOS, 4 Bit D Type Flip Flop with 3 State Outputs
NTE74HC173 Integrated Circuit TTL High Speed CMOS, 4 Bit D Type Flip Flop with 3 State Outputs Description: The NTE74HC173 is an high speed 3 State Quad D Type Flip Flop in a 16 Lead DIP type package that
More informationOctal 3-State Noninverting Transparent Latch
SL74HC73 Octal 3-State Noninverting Traparent Latch High-Performance Silicon-Gate CMOS The SL74HC73 is identical in pinout to the LS/ALS73. The device inputs are compatible with standard CMOS outputs;
More information74HC573; 74HCT573. Octal D-type transparent latch; 3-state. The 74HC573; 74HCT573 is functionally identical to:
Product data sheet 1. General description The is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). The has octal D-type transparent latches featuring separate
More informationNTE74176 Integrated Circuit TTL 35Mhz Presettable Decade Counter/Latch
NTE74176 Integrated Circuit TTL 35Mhz Presettable Decade Counter/Latch Description: The NTE74176 is a high speed monolithic counter in a 14 Lead plastic DIP type package consisting of four DC coupled master
More informationNTE74HC299 Integrated Circuit TTL High Speed CMOS, 8 Bit Universal Shift Register with 3 State Output
NTE74HC299 Integrated Circuit TTL High Speed CMOS, 8 Bit Universal Shift Register with 3 State Output Description: The NTE74HC299 is an 8 bit shift/storage register with three state bus interface capability
More information74HC393; 74HCT393. Dual 4-bit binary ripple counter
Product data sheet 1. General description 2. Features 3. Quick reference data The 74HC393; HCT393 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified
More informationM74HCT138TTR 3 TO 8 LINE DECODER (INVERTING)
3 TO 8 LINE DECODER (INVERTING) HIGH SPEED: t PD = 16ns (TYP.) at V CC = 4.5V LOW POWER DISSIPATION: I CC = 4µA(MAX.) at T A =25 C COMPATIBLE WITH TTL OUTPUTS : V IH = 2V (MIN.) V IL = 0.8V (MAX) SYMMETRICAL
More informationMM74HC175 Quad D-Type Flip-Flop With Clear
Quad D-Type Flip-Flop With Clear General Description The MM74HC175 high speed D-type flip-flop with complementary outputs utilizes advanced silicon-gate CMOS technology to achieve the high noise immunity
More information74LS393 Dual 4-Bit Binary Counter
74LS393 Dual 4-Bit Binary Counter General Description Each of these monolithic circuits contains eight masterslave flip-flops and additional gating to implement two individual four-bit counters in a single
More information74HC573; 74HCT573. Octal D-type transparent latch; 3-state. The 74HC573; 74HCT573 is functionally identical to:
Product data sheet 1. General description The is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). The has octal D-type transparent latches featuring separate
More informationM74HC20TTR DUAL 4-INPUT NAND GATE
DUAL 4-INPUT NAND GATE HIGH SPEED: t PD = 9ns (TYP.) at V CC = 6V LOW POWER DISSIPATION: I CC = 1µA(MAX.) at T A =25 C HIGH NOISE IMMUNITY: V NIH = V NIL = 28 % V CC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE:
More information74LV393 Dual 4-bit binary ripple counter
INTEGRATED CIRCUITS Supersedes data of 1997 Mar 04 IC24 Data Handbook 1997 Jun 10 FEATURES Optimized for Low Voltage applications: 1.0 to.6v Accepts TTL input levels between V CC = 2.7V and V CC =.6V Typical
More informationHEF4028B. 1. General description. 2. Features. 3. Applications. 4. Ordering information. BCD to decimal decoder
Rev. 06 25 November 2009 Product data sheet 1. General description 2. Features 3. Applications The is a 4-bit, a 4-bit BCO to octal decoder with active LOW enable or an 8-output (Y0 to Y7) inverting demultiplexer.
More informationINTEGRATED CIRCUITS. 74LV259 8-bit addressable latch. Product specification Supersedes data of 1997 Jun 06 IC24 Data Handbook.
INTEGRATED CIRCUITS Supersedes data of 1997 Jun 06 IC24 Data Handbook 1998 May 20 FEATURES Optimized for low voltage applicatio: 1.0 to 3.6 V Accepts TTL input levels between = 2.7 V and = 3.6 V Typical
More information. HIGH SPEED .LOW POWER DISSIPATION .HIGH NOISE IMMUNITY M74HC181 ARITHMETIC LOGIC UNIT/FUNCTION GENERATOR. tpd = 13 ns (TYP.
ARITHMETIC LOGIC UNIT/FUNCTION GENERATOR. HIGH SPEED tpd = 13 (TYP.) AT VCC =5V.LOW POWER DISSIPATION I CC =4µA (MAX.) at T A =25 C.HIGH NOISE IMMUNITY VNIH =VNIL =28%VCC (MIN.) OUTPUT DRIVE CAPABILITY
More informationINTEGRATED CIRCUITS. For a complete data sheet, please also download:
INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS ogic Family Specifications The IC06 74HC/HCT/HCU/HCMOS ogic Package Information The IC06 74HC/HCT/HCU/HCMOS
More informationCD4028BC BCD-to-Decimal Decoder
BCD-to-Decimal Decoder General Description The is a BCD-to-decimal or binary-to-octal decoder consisting of 4 inputs, decoding logic gates, and 10 output buffers. A BCD code applied to the 4 inputs, A,
More informationUNISONIC TECHNOLOGIES CO., LTD U74HC14
UNISONIC TECHNOLOGIES CO., LTD U74HC14 HIGH-SPEED CMOS LOGIC HEX INVERTING SCHMITT TRIGGER DESCRIPTION The UTC U74HC14 each contain six inverting Schmitt triggers in one package. Each of them perform the
More informationMM74HC157 Quad 2-Input Multiplexer
Quad 2-Input Multiplexer General Description The MM74HC157 high speed Quad 2-to-1 Line data selector/multiplexers utilizes advanced silicon-gate CMOS technology. It possesses the high noise immunity and
More informationMM74HC151 8-Channel Digital Multiplexer
8-Channel Digital Multiplexer General Description The MM74HC151 high speed Digital multiplexer utilizes advanced silicon-gate CMOS technology. Along with the high noise immunity and low power dissipation
More informationDM Quad 2-Input NAND Buffers with Open-Collector Outputs
September 1986 Revised July 2001 DM7438 7438 Quad 2-Input NAND Buffers with Open-Collector Outputs General Description This device contains four independent gates each of which performs the logic NAND
More information74F30 8-Input NAND Gate
8-Input NAND Gate General Description This device contains a single gate, which performs the logic NAND function. April 1988 Revised October 2000 74F30 8-Input NAND Gate Ordering Code: Order Number Package
More informationObsolete Product(s) - Obsolete Product(s)
DUAL 4 CHANNEL MULTIPLEXER 3 STATE OUTPUT HIGH SPEED: t PD = 16ns (TYP.) at V CC = 6V LOW POWER DISSIPATION: I CC = 4µA(MAX.) at T A =25 C HIGH NOISE IMMUNITY: V NIH = V NIL = 28 % V CC (MIN.) SYMMETRICAL
More informationPresettable 4-Bit Binary UP/DOWN Counter High-Performance Silicon-Gate CMOS
TECHNICAL DATA IN74HC193A Presettable 4-Bit Binary UP/DOWN Counter High-Performance Silicon-Gate CMOS The IN74HC193A is identical in pinout to the LS/ALS193. The device inputs are compatible with standard
More informationNTE40194B Integrated Circuit CMOS, 4 Bit Bidirectional Universal Shift Register
NTE4194B Integrated Circuit CMOS, 4Bit Bidirectional Universal Shift Register Description: The NTE4194B is a universal shift register in a 16Lead DIP type package featuring parallel inputs, parallel outputs
More information74F579 8-Bit Bidirectional Binary Counter with 3-STATE Outputs
April 1988 Revised October 2000 74F579 8-Bit Bidirectional Binary Counter with 3-STATE Outputs General Description The 74F579 is a fully synchronous 8-stage up/down counter with multiplexed 3-STATE I/O
More informationINTEGRATED CIRCUITS. 74LV stage binary ripple counter. Product specification 1998 Jun 23 IC24 Data Handbook
INTEGRATED CIRCUITS 1998 Jun 23 IC24 Data Handbook FEATURES Optimized for Low Voltage applications: 1.0 to 5.5V Accepts TTL input levels between V CC = 2.7V and V CC = 3.6V Typical V OLP (output ground
More informationObsolete Product(s) - Obsolete Product(s)
8-INPUT NAND GATE HIGH SPEED: t PD = 13ns (TYP.) at V CC = 6V LOW POWER DISSIPATION: I CC = 1µA(MAX.) at T A =25 C HIGH NOISE IMMUNITY: V NIH = V NIL = 28 % V CC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: I
More information74F539 Dual 1-of-4 Decoder with 3-STATE Outputs
74F539 Dual 1-of-4 Decoder with 3-STATE Outputs General Description The 74F539 contai two independent decoders. Each accepts two Address (A 0, A 1 ) input signals and decodes them to select one of four
More information74F538 1-of-8 Decoder with 3-STATE Outputs
1-of-8 Decoder with 3-STATE Outputs General Description The 74F538 decoder/demultiplexer accepts three Address (A 0 A 2 ) input signals and decodes them to select one of eight mutually exclusive outputs.
More informationObsolete Product(s) - Obsolete Product(s)
3 TO 8 LINE DECODER HIGH SPEED: t PD = 15ns (TYP.) at V CC = 6V LOW POWER DISSIPATION: I CC = 4µA(MAX.) at T A =25 C HIGH NOISE IMMUNITY: V NIH = V NIL = 28 % V CC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE:
More information74HC General description. 2. Features. Octal D-type flip-flop; positive-edge trigger; 3-state; inverting
Rev. 03 11 November 2004 Product data sheet 1. General description 2. Features The is a high-speed Si-gate CMOS device and is pin compatible with low-power Schottky TTL (LSTTL). The is specified in compliance
More informationDM7404 Hex Inverting Gates
DM7404 Hex Inverting Gates General Description This device contains six independent gates each of which performs the logic INVERT function. Ordering Code: August 1986 Revised February 2000 DM7404 Hex Inverting
More informationMM74HC164 8-Bit Serial-in/Parallel-out Shift Register
8-Bit Serial-in/Parallel-out Shift Register General Description Ordering Code: September 1983 Revised February 1999 The MM74HC164 utilizes advanced silicon-gate CMOS technology. It has the high noise immunity
More informationNTE4514B & NTE4515B Integrated Circuit CMOS, 4 Bit Latch/4 to 16 Line Decoder
NTE4514B & NTE4515B Integrated Circuit CMOS, 4 Bit Latch/4 to 16 Line Decoder Description: The NTE4514B (output active high option) and NTE4515B (output active low option) are two output options of a 4
More information74LS165 8-Bit Parallel In/Serial Output Shift Registers
74LS165 8-Bit Parallel In/Serial Output Shift Registers General Description This device is an 8-bit serial shift register which shifts data in the direction of Q A toward Q H when clocked. Parallel-in
More information74F Bit D-Type Flip-Flop
74F821 10-Bit D-Type Flip-Flop General Description The 74F821 is a 10-bit D-type flip-flop with 3-STATE true outputs arranged in a broadside pinout. Ordering Code: Features 3-STATE Outputs Devices also
More informationM74HCT688TTR 8 BIT EQUALITY COMPARATOR
8 BIT EQUALITY COMPARATOR HIGH SPEED: t PD = 21ns (TYP.) at V CC = 4.5V LOW POWER DISSIPATION: I CC = 4µA(MAX.) at T A =25 C COMPATIBLE WITH TTL OUTPUTS : V IH = 2V (MIN.) V IL = 0.8V (MAX) SYMMETRICAL
More informationPresettable Counters High-Performance Silicon-Gate CMOS
TECHNICAL DATA IN74HC1A Presettable Counters High-Performance Silicon-Gate CMOS The IN74HC1A is identical in pinout to the LS/ALS1. The device inputs are compatible with standard CMOS outputs; with pullup
More informationIN74HC164А 8-Bit Serial-Input/Parallel-Output Shift Register
TECHNICAL DATA IN74HC164А 8-Bit Serial-Input/Parallel-Output Shift Register High-Performance Silicon-Gate CMOS The IN74HC164 is identical in pinout to the LS/ALS164. The device inputs are compatible with
More informationMM74HC175 Quad D-Type Flip-Flop With Clear
Quad D-Type Flip-Flop With Clear General Description The MM74HC175 high speed D-type flip-flop with complementary outputs utilizes advanced silicon-gate CMOS technology to achieve the high noise immunity
More informationDM7417 Hex Buffers with High Voltage Open-Collector Outputs
August 1986 Revised July 2001 DM7417 Hex Buffers with High Voltage Open-Collector Outputs General Description This device contains six independent gates each of which performs a buffer function. The open-collector
More informationINTEGRATED CIRCUITS. 74LV273 Octal D-type flip-flop with reset; positive-edge trigger. Product specification 1997 Apr 07 IC24 Data Handbook
INTEGRATED CIRCUITS Octal D-type flip-flop with reset; positive-edge trigger 1997 Apr 07 IC24 Data Handbook FEATURES Wide operating voltage: 1.0 to 5.5V Optimized for Low Voltage applications: 1.0 to 3.6V
More informationINTEGRATED CIRCUITS. For a complete data sheet, please also download:
INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family Specificatio The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS
More information74F174 Hex D-Type Flip-Flop with Master Reset
74F174 Hex D-Type Flip-Flop with Master Reset General Description The 74F174 is a high-speed hex D-type flip-flop. The device is used primarily as a 6-bit edge-triggered storage register. The information
More information74F153 Dual 4-Input Multiplexer
74F153 Dual 4-Input Multiplexer General Description The F153 is a high-speed dual 4-input multiplexer with common select inputs and individual enable inputs for each section. It can select two lines of
More informationThe 74HC21 provide the 4-input AND function.
Rev. 03 12 November 2004 Product data sheet 1. General description 2. Features 3. Quick reference data The is a high-speed Si-gate CMOS device and is pin compatible with low-power Schottky TTL (LSTTL).
More information74F379 Quad Parallel Register with Enable
74F379 Quad Parallel Register with Enable General Description The 74F379 is a 4-bit register with buffered common Enable. This device is similar to the 74F175 but features the common Enable rather than
More informationHCF4532B 8-BIT PRIORITY ENCODER
8-BIT PRIORITY ENCODER CONVERTS FROM 1 TO 8 TO INPUTS BINARY PROVIDES CASCADING FEATURE TO HANDLE ANY NUMBER OF INPUTS GROUP SELECT INDICATES ONE OR MORE PRIORITY INPUTS QUIESCENT CURRENT SPECIFIED UP
More informationUNISONIC TECHNOLOGIES CO., LTD U74HC244
UNISONIC TECHNOLOGIES CO., LTD OCTAL BUFFER AND LINE DRIVER WITH 3-STATE OUTPUT DESCRIPTION DIP-20 The are octal buffer and line drivers with non-inverting 3-state outputs. When n OE is High, the outputs
More informationMILITARY SPECIFICATION MICROCIRCUITS, DIGITAL, BIPOLAR, TTL, DECODERS MONOLITHIC SILICON. Inactive for new design after 7 September 1995.
INCH-POUND 16 February 2005 SUPERSEDING MIL-M-38510/10C 3 March 1986 MILITARY SPECIFICATION MICROCIRCUITS, DIGITAL, BIPOLAR, TTL, DECODERS MONOLITHIC SILICON This specification is approved for use by all
More informationObsolete Product(s) - Obsolete Product(s)
DUAL BINARY TO 1 OF 4 DECODER/DEMULTIPLEXER OUTPUT LOW ON SELECT EXPANDABLE WITH MULTIPLE PACKAGES STANDARDIZED SYMMETRICAL OUTPUT CHARACTERISTICS QUIESCENT CURRENT SPECIFIED UP TO 20V 5V, 10V AND 15V
More informationHCF4555B DUAL BINARY TO 1 OF 4 DECODER/DEMULTIPLEXER OUTPUT HIGH ON SELECT
DUAL BINARY TO 1 OF 4 DECODER/DEMULTIPLEXER OUTPUT HIGH ON SELECT EXPANDABLE WITH MULTIPLE PACKAGES STANDARDIZED SYMMETRICAL OUTPUT CHARACTERISTICS QUIESCENT CURRENT SPECIFIED UP TO 20V 5V, 10V AND 15V
More informationObsolete Product(s) - Obsolete Product(s)
BCD TO DECIMAL DECODER HIGH SPEED : t PD = 14ns (TYP.) at V CC = 6V LOW POWER DISSIPATION: I CC =4µA(MAX.) at T A =25 C HIGH NOISE IMMUNITY: V NIH = V NIL = 28 % V CC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE:
More informationMM54HCT193 MM74HCT193 Synchronous Binary Up Down Counters
MM54HCT193 MM74HCT193 Synchronous Binary Up Down Counters General Description These high speed synchronous counters utilize advanced silicon-gate CMOS technology to achieve the high noise immunity and
More information74F194 4-Bit Bidirectional Universal Shift Register
74F194 4-Bit Bidirectional Universal Shift Register General Description The 74F194 is a high-speed 4-bit bidirectional universal shift register. As a high-speed, multifunctional, sequential building block,
More informationDM74LS09 Quad 2-Input AND Gates with Open-Collector Outputs
August 1986 Revised March 2000 DM74LS09 Quad 2-Input AND Gates with Open-Collector Outputs General Description This device contains four independent gates each of which performs the logic AND function.
More informationINTEGRATED CIRCUITS. For a complete data sheet, please also download:
INTEGRATED CIRCUITS DATA SHEET F a complete data sheet, please also download: The IC6 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC6 74HC/HCT/HCU/HCMOS Logic Package Infmation The IC6 74HC/HCT/HCU/HCMOS
More information