# Digital Electronics Part II Electronics, Devices and Circuits

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1 Digital Electronics Part Electronics, Devices and Circuits Dr.. J. Wassell ntroduction n the coming lectures we will consider how logic gates can be built using electronic circuits First, basic concepts concerning electrical circuits and components will be introduced This will enable the analysis of linear circuits, i.e., one where superposition applies: f an input x 1 (t) gives an output y 1 (t), and input x 2 (t) gives an output y 2 (t), then input [x 1 (t)+x 2 (t)] gives an output [y 1 (t)+y 2 (t)] 1

2 ntroduction However, logic circuits are non-linear, consequently we will introduce a graphical technique for analysing such circuits Semiconductor materials, junction diodes and field effect transistors (FET) will be introduced The construction of an NMOS inverter from an n-channel (FET) will then be described Finally, CMOS logic built using FETs will then be presented Basic Electricity An electric current is produced when charged particles e.g., electrons in metals, move in a definite direction A battery acts as an electron pump and forces the free electrons in the metal to drift through the metal wire in the direction from its -ve terminal toward its +ve terminal + - Flow of electrons 2

3 Basic Electricity Actually, before electrons were discovered it was imagined that the flow of current was due to positively charged particles flowing out of +ve toward ve battery terminal ndeed, the positive direction of current flow is still defined in this way! The unit of charge is the Coulomb (C). One Coulomb is equivalent to the charge carried by 6.25*10 18 electrons (since one electron has a charge of 1.6*10-19 Coulombs). Basic Electricity Current is defined as the rate of flow of charge, i.e., a flow of 1 Coulomb (C) in 1 second is defined as 1 Ampere (A). n the circuit shown in the earlier slide, it is the battery that supplies the electrical force and energy that drives the electrons round the circuit. n doing so, the electrons give up most of their energy as heat as the temperature of the metal wire rises. 3

4 Basic Electricity t can be imagined that each Coulomb of charge that leaves the battery receives a fixed amount of electrical energy that depends upon the battery. So the electromotive force (emf) E of a battery is defined to be 1 Volt (V) if it gives 1 Joule (J) of electrical energy to each Coulomb passing through it. Basic Electricity A closely related concept is potential difference (pd). For example, the lamp in the following circuit changes most of the electrical energy carried by the electrons into heat and light. So the pd across a device, e.g., Flow of current the lamp, in a circuit is 1V if it + changes 1 J of electrical energy - into other forms of energy when 1 C of charge passes through it. 4

5 Basic Electricity Note that pd and emf are usually called voltages since both are measured in V. Electrical engineers have an alternative (but essentially equivalent) view concerning pd. That is, conductors, to a greater or lesser extent, oppose the flow of current. This opposition is quantified in terms of resistance (R). Thus the greater is the resistance, the larger is the potential difference measured across the conductor. Basic Electricity The resistance (R) of a conductor is defined as R=V/, where V is the pd across the conductor and is the current through the conductor. This is know as Ohms Law and is usually expressed as V=R, where resistance is defined to be in Ohms (W). So for an ohmic (i.e., linear) conductor, plotting against V yields a straight line through the origin 5

6 Basic Electricity Conductors made to have a specific value of resistance are known as resistors. They have the following symbol in an electrical circuit: R W Analogy: The flow of electric charges can be compared with the flow of water in a pipe. A pressure (voltage) difference is needed to make water (charges) flow in a pipe (conductor). Basic Circuits Kirchhoff's Current Law The sum of currents entering a junction (or node) is zero, e.g., = 0 or = 3 2 That is, what goes into the junction is equal to what comes out of the junction Think water pipe analogy again! 6

7 Basic Circuits Kirchhoff's Voltage Law n any closed loop of an electric circuit the sum of all the voltages in that loop is zero, e.g., V 2 V 3 V 4 V R a + + R b Rc V 5 V 1 -V 2 -V 3 -V 4 -V 5 +V 6 = 0 V 6 We will now analyse a simple 2 resistor circuit known as a potential divider V R 1 R 2 Potential Divider What is the voltage at point x relative to the 0V point? V 1 x V 2 0V Note: circle represents an ideal voltage source, i.e., a perfect battery V V 1 V 2 V1 R 1 V2 R2 V R1 R2 ( R1 R2 ) V ( R 1 R2) V R2 V2 R2 V ( R1 R2 ) R1 R V x 2 7

8 Solving Non-linear circuits As mentioned previously, not all electronic devices have linear -V characteristics, importantly in our case this includes the FETs used to build logic circuits Consequently we cannot easily use the algebraic approach applied previously to the potential divider. nstead, we will use a graphical approach Firstly though, we will apply the graphical approach to the potential divider example Potential Divider How can we do this graphically? V Current through R 2 (2W) R 1 R 2 V 1 x V 2 0V So if V = 10V, R 1 = 1W and R 2 = 2W V x R V R1 R Current through R 1 (1W) 6.7V 0V Voltage across R 2 x=6.7v Voltage V=10V across R 1 8

9 Graphical Approach Clearly approach works for a linear circuit. How could we apply this if we have a nonlinear device, e.g., a transistor in place of R 2? What we do is substitute the V- characteristic of the non-linear device in place of the linear characteristic (a straight line due to Ohm s Law) used previously for R 2 Graphical Approach V R 1 Device V 1 x V 2 0V So if V = 10V and R 1 = 1W The voltage at x is av as shown in the graph Current through Device Device characteristic Current through R 1 (1W) 0V Voltage across Device x=av Voltage V=10V across R 1 9

10 Devices that store energy Some common circuit components store energy, e.g., capacitors and inductors. We will now consider capacitors in detail. The physical construction of a capacitor is effectively 2 conductors separated by a nonconductor (or dielectric as it is known). Symbol of a Capacitor Unit of capacitance: Farads (F) Electrical charge can be stored in such a device. Capacitors So, parallel conductors brought sufficiently close (but not touching) will form a capacitor Parallel conductors often occur on circuit boards (and on integrated circuits), thus creating unwanted (or parasitic) capacitors. We will see that parasitic capacitors can have a significant negative impact on the switching characteristics of digital logic circuits. 10

11 Capacitors The relationship between the charge Q stored in a capacitor C and the voltage V across its terminals is Q = VC. As mentioned previously, current is the rate of flow of charge, i.e., dq/dt =, or alternatively, Q dt. So we can write, 1 V dt C Capacitors We now wish to investigate what happens when sudden changes in configuration occur in a simple resistor-capacitor (RC) circuit. R 1 b a c V DD C V out R 2 11

12 RC circuits R 1 a b c V 1 V DD C V out R 2 nitially, C is discharged, i.e., V out =0 and the switch moves from position b to position a C charges through R 1 and current flows in R 1 and C V DD RC circuits R b 1 a c VDD V1 Vout 0 V 1 VDD V 1 V out Sub for V out in terms of C V out R 2 and C (from earlier eqn.) 1 V DD R1 dt C Differentiate wrt t gives d 0 R 1 dt C Then rearranging gives dt CR 1 d 12

13 RC circuits ntegrating both sides of the previous equation gives t CR 1 a ln We now need to find the integration constant a. To do this we look at the initial conditions at t = 0, i.e., V out =0. This gives an initial current 0 =V DD /R 1 V a ln 0 ln R DD 1 So, t CR 1 t CR ln ln Antilog both sides, e t CR 0 1 e 0 t CR 1 ln RC circuits Now, V out and, V out out V V DD DD DD V 1 V1 R 1 Substituting for V 1 gives, V V R V out V DD R e Substituting for 0 gives, V R1 R t CR DD 1 e 1 t CR 1 V out V DD Plotting yields, V out V DD 0.63V DD 1 e t CR 1 0 CR 1 CR 1 is knows as the time constant has units of seconds t 13

14 RC circuits R 1 a b c V 1 V DD C V out R 2 nitially assume C is fully charged, i.e., V out =V DD and the switch moves from position a to position c C discharges through R 2 and current flows in R 2 and C R 1 a RC circuits b c V 1 V DD C V out R 2 The expression for V out is, Vout VDDe t CR 2 V out V DD 0.37V DD Plotting yields, 0 CR 2 t 14

15 Basic Materials The electrical properties of materials are central to understanding the operation of electronic devices Their functionality depends upon our ability to control properties such as their resistance or current-voltage characteristics Whether a material is a conductor or insulator depends upon how strongly bound the outer valence electrons are to their atomic cores nsulators Consider a crystalline insulator, e.g., diamond Electrons are strongly bound and unable to move When a voltage difference is applied, the crystal will distort a bit, but no charge (i.e., electrons) will flow until breakdown occurs V 15

16 Conductors Consider a metal conductor, e.g., copper Electrons are weakly bound and free to move When a voltage difference is applied, the crystal will distort a bit, but charge (i.e., electrons) will flow V Semiconductors nce there are many free electrons in a metal, it is difficult to control its properties Consequently, what we need is a material with a low electron density, i.e., a semiconductor By carefully controlling the electron density we can create a whole range of electronic devices 16

17 crystalline lattice poor conductor at low temperatures Semiconductors licon (, Group V) is a poor conductor of electricity, i.e., a semiconductor Shared valence electron is tetravalent, i.e., it has 4 electrons in its valance band crystals held together by covalent bonding Recall that 8 valence electrons yield a stable state each atom now appears to have 8 electrons, though in fact each atom only has a half share in them. Note this is a much more stable state than is the exclusive possession of 4 valence electrons Semiconductors As temperature rises conductivity rises As temperature rises, thermal vibration of the atoms causes bonds to break: electrons are free to wander around the crystal. Hole Free electron When an electron breaks free (i.e., moves into the conduction band it leaves behind a hole or absence of negative charge in the lattice The hole can appear to move if it is filled by an electron from an adjacent atom The availability of free electrons makes a conductor (a poor one) 17

18 n-type n-type silicon (Group V) is doped with arsenic (Group V) that has an additional electron that is not involved in the bonds to the neighbouring atoms As + Free electron The additional electron needs only a little energy to move into the conduction band. This electron is free to move around the lattice Owing to its negative charge, the resulting semiconductor is known as n- type Arsenic is known as a donor since it donates an electron p-type p-type silicon (Group V) is doped with boron (B, Group ) B - Free hole The B atom has only 3 valence electrons, it accepts an extra electron from one of the adjacent atoms to complete its covalent bonds This leaves a hole (i.e., absence of a valence electron) in the lattice This hole is free to move in the lattice actually it is the electrons that do the shifting, but the result is that the hole is shuffled from atom to atom. The free hole has a positive charge, hence this semiconductor is p-type B is known as an acceptor 18

19 p-n Junction The key to building useful devices is combining p and n type semiconductors to form a p-n junction Electrons and holes diffuse across junction due to large concentration gradient On n-side, diffusion out of electrons leaves +ve charged donor atoms On p-side, diffusion out of holes leaves -ve charged acceptor atoms Leaves a space-charge (depletion) region with no free charges Space charge gives rise to electric field that opposes diffusion Equilibrium is reached where no more charges move across junction The pd associated with field is known as contact potential Biased p-n Junction With no external voltage some current flows due to diffusion of charges against junc electric field. Balanced by thermally generated electrons in p-type and holes in n- type. These are swept across junc by the field and this drift current exactly balances diffusion current Reverse bias: By making n-type +ve, electrons are removed from it increasing size of space charge region. milarly holes are removed from p-type region. Thus space charge region and its associated field are increased. This reduces diffusion current but drift current is not significantly changed The net current is known as the reverse saturation current order of na 19

20 Biased p-n Junction With forward bias, on the p-side holes are pushed toward junction where they neutralise some of the ve space charge. milarly on the n-side, electrons are pushed toward the junction and neutralise some of the +ve space charge. So depletion region and associated field are reduced. This allows diffusion current to increase significantly. Reverse drift current is virtually unchanged. Net current is now predominantly due to diffusion current and has the order of ma Thus the p-n junction allows significant current flow in only one direction This device is known as a diode Diode deal Characteristic d + V d p-type n-type anode cathode d reverse bias 0 0.6V V d forward bias 20

21 n-channel MOSFET We will now introduce a more complex semiconductor device known as an n-channel Metal Oxide Semiconductor Field Effect Transistor (MOSFET) and see how it can be used to build logic circuits Gate (G) Drain (D) Source (S) The current flow from D to S ( DS ) is controlled by the voltage applied between G and S (V GS ) We will be describing enhancement mode devices in which no current flows ( DS =0, i.e., the transistor is Off) when V GS =0V n-channel MOSFET OFF +V D licon dioxide insulator Drain (and Source) diode reverse biased, so no path for current to flow from S to D, i.e., the transistor is off D G S n+ n+ p-type Reverse biased p-n junctions 0V 21

22 n-channel MOSFET ON +V D +V G D G S 0V n+ n+ p-type licon dioxide insulator n-type layer: inversion Consider the situation when the Gate (G) voltage (V G ) is raised to a positive voltage, say V D Electrons attracted to underside of the G, so this region is inverted and becomes n-type. This region is known as the channel There is now a continuous path from n- type S to n-type D, so electrons can flow from S to D, i.e., the transistor is on The G voltage (V G ) needed for this to occur is known as the threshold voltage (V t ). Typically 0.3 to 0.7 V. p-channel MOSFET Two varieties, namely p and n channel p-channel have the opposite construction, i.e., n- type substrate and p-type S and D regions 0V licon dioxide insulator 0V 0V licon dioxide insulator D G S p+ p+ n-type Reverse biased p-n junctions D S G p+ p+ n-type p-type layer: inversion +V S OFF +V S ON 22

23 n-mosfet Characteristics Plots V- characteristics of the device for various Gate voltages (V GS ) At a constant value of V DS, we can also see that DS is a function of the Gate voltage, V GS The transistor begins to conduct when the Gate voltage, V GS, reaches the Threshold voltage: V T n-mos nverter V DD = 10V R 1 =1kW V in V GS V 1 V out V DS 0V We can use the graphical approach to determine the relationship between V in and V out Resistor characteristic Note V in =V GS and V out =V DS 23

24 n-mos nverter Note it does not have the ideal characteristic that we would like from an inverter function Actual deal However if we specify suitable voltage thresholds, we can achieve a binary action. n-mos nverter Actual So if we say: voltage > 9V is logic 1 voltage < 2V is logic 0 The gate will work as follows: V in > 9V then V out < 2V and if V in < 2V then V out > 9V 24

25 n-mos Logic t is possible (and was done in the early days) to build other logic functions, e.g., NOR and NAND using n-mos transistors However, n-mos logic has fundamental problems: Speed of operation Power consumption n-mos Logic One of the main speed limitations is due to stray capacitance owing to the metal track used to connect gate inputs and outputs. This has a finite capacitance to ground, i.e., the 0V connection. We modify the circuit model to include this stray capacitance C R 1 =1kW V 1 V DD = 10V V in V GS C C V out 0V 25

26 n-mos Logic To see the effect of this stray capacitance we will consider what happens when the transistor is ON (so that V out =0V at beginning), then turned OFF and then turned ON again When the transistor is OFF it is effectively an open circuit, i.e., we can eliminate if from the circuit diagram V DD = 10V Transistor turned OFF R 1 =1kW V 1 C V out The problem with capacitors is that the voltage across them cannot change instantaneously. The stray capacitor C charges through R 1. Note C is initially discharged, i.e., V out =0V 0V Plotting yields, n-mos Logic Using the previous result for a capacitor charging via a resistor we can write: V out V out V DD 1 e t CR 1 V DD 0.63V DD Where CR 1 is known as the time constant has units of seconds 0 CR 1 t 26

27 Transistor turned ON again V out R ON n-mos Logic When the transistor is ON it is effectively a low value resistor, R ON. (say < 100W) We will assume capacitor is charged to a voltage V DD just before the transistor is turned ON C The expression for V out is, t V V out Plotting yields, V out DD e CR ON 0V Stray capacitor C discharges through R ON V DD 0.37V DD 0 CR ON t n-mos Logic When the transistor turns OFF, C charges through R 1. This means the rising edge is slow since it is defined by the large time constant R 1 C (since R 1 is high). When the transistor turns ON, C discharges through it, i.e., effectively resistance R ON. The speed of the falling edge is faster since the transistor ON resistance (R ON ) is low. V out V DD Transistor OFF Transistor ON 0 Time constant CR 1 Time constant CR ON t CR 1 >CR ON 27

28 n-mos Logic Power consumption is also a problem V DD = 10V R 1 =1kW V in V GS V 1 V out V DS 0V Transistor OFF No problem since no current is flowing through R 1, i.e., V out = 10V Transistor ON This is a problem since current is flowing through R 1. For example, if V out = 1V (corresponds with V in = 10V and D = = 9mA), the power dissipated in the resistor is the product of voltage across it and the current through it, i.e., P disp 3 V mW CMOS Logic To overcome these problems, complementary MOS (CMOS) logic was developed As the name implies it uses p-channel as well as n-channel MOS transistors Essentially, p-mos transistors are n-mos transistors but with all the polarities reversed! 28

29 CMOS nverter V in p- MOS n- MOS V out V SS = 10V Using the graphical approach we can show that the switching characteristics are now much better than for the n-mos inverter V in N- MOS low off high on P- MOS V out on high off low CMOS nverter t can be shown that the transistors only dissipate power while they are switching. This is when both transistors are on. When one or the other is off, the power dissipation is zero CMOS is also better at driving capacitive loads since it has active transistors on both rising and falling edges 29

30 CMOS Gates CMOS can also be used to build NAND and NOR gates They have similar electrical properties to the CMOS inverter CMOS NAND Gate 30

31 Logic Families NMOS compact, slow, cheap, obsolete CMOS Older families slow (4000 series about 60ns), but new ones (74AC) much faster (3ns). 74HC series popular TTL Uses bipolar transistors. Known as 74 series. Note that most 74 series devices are now available in CMOS. Older versions slow (LS about 16ns), newer ones faster (AS about 2ns) ECL High speed, but high power consumption Logic Families Best to stick with the particular family which has the best performance, power consumption cost trade-off for the required purpose t is possible to mix logic families and sub-families, but care is required regarding the acceptable logic voltage levels and gate current handling capabilities 31

32 Meaning of Voltage Levels As we have seen, the relationship between the input voltage to a gate and the output voltage depends upon the particular implementation technology Essentially, the signals between outputs and inputs are analogue and so are susceptible to corruption by additive noise, e.g., due to cross talk from signals in adjacent wires What we need is a method for quantifying the tolerance of a particular logic to noise Noise Margin Tolerance to noise is quantified in terms of the noise margin supply voltage (V DD ) Logic 1 (High) noise margin worst case output voltage,v OH (min) worst case input voltage,v H (min) Logic 0 (Low) noise margin 0V Logic 0 noise margin = V L (max) - V OL (max) Logic 1 noise margin = V OH (min) - V H (min) worst case input voltage,v L (max) worst case output voltage,v OL (max) 32

33 Noise Margin For the 74 series High Speed CMOS (HCMOS) used in the hardware labs (using the values from the data sheet): Logic 0 noise margin = V L (max) - V OL (max) Logic 0 noise margin = = 1.25 V Logic 1 noise margin = V OH (min) - V H (min) Logic 1 noise margin = = 1.25 V See the worst case noise margin = 1.25V, which is much greater than the 0.4 V typical of TTL series devices. Consequently HCMOS devices can tolerate more noise pickup before performance becomes compromised 33

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