# Homework 3 Solution. Due Friday (5pm), Feb. 14, 2013

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1 University of California, Berkeley Spring 2013 EE 42/100 Prof. K. Pister Homework 3 Solution Due Friday (5pm), Feb. 14, 2013 Please turn the homework in to the drop box located next to 125 Cory Hall (labeled EE 42/100). Make sure to clearly label your Name, Student ID, Class, and Discussion sections on the homework. 1) We start by identifying the extraordinary nodes and choosing the one with the most branches to be ground. The currents in each branch are then labeled as shown below. Since there is no load connected to the end of A&B, V AB =V oc. Substituting the currents gives: (V C 8) 2k A couple notes: The current, I 2 through the resistor above the 4V source is set by the 4V source. The 2mA current source sets the current through the resistor in series with it. We don t know the current through the 4V source so we ll just label it I 3. We could show by KVL: I 1 = V C 8, I 2k 2 = 4, I 1k 4 = V A 8, I 8k 5 = V A 2k KCL at C: I 1 + I 2 + I 3 2mA = k + I 3 2mA = 0 Multiply by 2k and gather terms: 2k I 3 V C = 2mA 2k 8 8 = 12 KCL at A: I 2 + I 3 + I 4 + I 5 = 0 Substituing currents gives: 4 + I 1k 3 + V A 8 + V A = 0 8k 2k Multiply by 8k and gather constants on the right side: 8k I 3 + 5V A = 8 32 = 24 {eqtn1} {eqtn2} There are 2 equations and 3 unknowns: V A, V C, and I x. The 4V source imposes a 4V voltage difference between A and C which gives the 3 rd equation: V A V C = 4V {eqtn3}

2 We can represent the 3 equations in matrix form as: I 3 V A V C Const 2k k We get: V A = V AB = V OC = V th = 4.44V R th is R eq (a,b) looking back at circuit from terminals A & B with the sources zeroed out. The resultant circuit is shown below: Note that both 1k resistors can be removed from the circuit either due to shorting out (by the 4V source) or terminating at an open circuit (due to removing the current source). So we get R th = 890 Ω The Thevenin equivalent circuit thus look like:

3 2) (a) i)the current through the circuit is given by KVL: I s = V Th R th +R L = R L. The maximum current occurs when the load is shorted, R L = 0 so I s (max) = = 50mA. This is the maximum current that the source can provide it is limited by the value of R th. Op amps typically have small output resistances and thus can provide higher currents. ii) This is a voltage divider: V out = 10 R L R L Note that due to the non-zero R th, the voltage across V out can be vastly different than it s open circuit value depending on R L. This is often called loading down similar to the car problem in HW1 in which the voltage across the car dropped from it s open circuit value due to resistance in the wires. (b) i) The ideal op-amp presents an infinite input resistancce to the source circuit meaning, I p = I s = 0. ii) Since I s = 0, there is no voltage drop across R th and thus V p = V th. This could be proved with KVL: V p = V th I s R th = V th 0. We also know V out = V n since they are connected and applying the ideal op amp condition, V p = V n gives, V out = V th = 10V. Now there is 10V across the load regardless of the load resistance. Ideally the source no longer has the potential to be loaded down as the op-amp now provides the necessary load current. Note: Even if the op-amp were non-ideal we would have V out = A(V p V n ) = A(V p V out ) V p = V out (1/A + 1) so feedback imposes, V p V out = V n for reasonable values of A. If A=10 6, we would get V out = 11 = It is silly to carry around so many sig figs. 1/A+1

4 3) (a) Employing the model for the photodiode as a current source gives the figure below: i) From ohms law: V out = I ph R L = R i P opt R L R v = V out P opt = R i R L = = 450[V/W] As long as it s reverse biased, the photodiode acts like a current source converting optical power into current so V out is independent of the 11V source. ii) From KVL: V d = V out 11. The diode will become forward biased when V d > 0. Which occurs when V out > 11V. Setting V out = 11V gives the point at which the diode is no longer reverse biased. So, V out = 11V = R i P opt R L = 0.9 P opt 500 P opt = 11 = 24mW Note1: There can always be a voltage across a current source even zero volts. It is fine to have a short circuited current source just like it s fine to have an open circuited voltage source (like an unused receptacle in your house). Note2: Our current source model of a reverse biased photodiode does break down when the voltage across it becomes positive. At this point, the diode forward current of I d = I s (e V d/v th 1) would flow. However, the forward current reduces V out which in turn reverse biases the diode. This is an interesting problem but you will find that eventually V out is insensitive to P in and V d stays locked at V F. (b) We have the following for the TIA circuit with the current source model for the photodiode employed: iii) 500 = V out I ph G = V out I ph = V out R i P opt = 500 Ω i) We have V p = 0 = V n. Now the anode is at a virtual ground. The diode voltage is still defined as the voltage from the anode to the cathode. KVL gives: V d = 11V Now the reverse bias voltage is indpendent of P in which is great. ii) Note that I 2 = 0 because the voltage on both sides of the 100Ω is the same. KCL at V n with V n = 0 gives: I ph = V out /500 R v = V out P opt = R i 500 = 450 [V/W] So we have achieved a circuit with the same magnitude voltage responsivity as the simple resistive load but that applies a constant reverse bias.

5 4.) V OUT1 Assuming op-amp is ideal. You could start by labeling all the nodes (i.e. V P, V N ) of the two op-amps. Then, then perform KCL at nodes (i.e. V N ) of each op-amp. Invoke ideal op-amp assumption that I N = 0, I P =0, and V P =V N to simplify the equations. Then finally relate V out to V in1 and V in2. Alternatively, if you recognize that this circuit is simply two cascading op-amps, where the first stage is a non-inverting amplifier and the second stage is a difference (of subtracting) amplifier. For a non-inverting amplifier, V out = +R 2 V in R 2, where is a resistor in the negative feedback path and R 2 is connected from V n to ground. Thus, for the 1 st stage of this circuit, we have: V out1 V in1 = 40k + 10k 10k Or 40k + 10k V out1 = V 10k in1 Now, looking at the 2 nd stage of the circuit, we also recognize that this is just a summing amplifier. Recall that the output voltage of a summing amplifier has the form: V out = R f V 1 R f R 2 V 2 R f R 3 V 3,where R f is a resistor in the negative feedback path and,r 2,R 3 are resistors connected to the input voltages V 1, V 2, and V 3, respectively. For our circuit, there are only two input voltage sources: V in2 and V out1, which is the output voltage from the 1 st stage of the amplifier. Thus, we have: V out = 50k 50k V out1 50k 50k V in2

6 Substitute the expression we derived previously for V out1, we have: V out = 50k + 10k 40k V 50k 10k in1 50k 50k V in2 V out = 5 V in1 V in2

7 5.)

8 6.) R 2 v 1 R 3 v 2 v 0 R 4 For a linear circuit, superposition principle can be applied when analyzing the circuit. To do this, we will have to consider the output response of the circuit under the influence of each input sources at a time. The final output will be equal to the summation of the output responses due to each input sources. What follows below is a detailed analysis, but first let s just try by inspection. If we ground V2, then we have an op-amp in a standard inverting configuration, and the gain should be -R2/R1 from V1 to Vout. If we ground V1, then we have the op-amp in a standard non-inverting configuration, and the gain from V+ to Vout should be (R1+R2)/R2. The gain from V2 to V+ is just a voltage divider. Often superposition lets you simplify a circuit enough that you can analyze it by inspection. Now for the more complicated version Let s first consider voltage source V 1. Since we are only focusing on V 1, all the other independent sources in the circuit have to be deactivated. To deactivate or turn-off the V 2 voltage source, we will need to short it out. Thus, we have a new circuit shown below: v 1 R v 2 n I n = 0 R 3 v p I p = 0 v 0 R 4

9 Assuming ideal op-amps, we have: I n = 0, I p = 0 and V p = V n. Since I p = 0, we see that no current can flow through the parallel combination of R 3 and R 4. Therefore, V p = 0 Next, we can apply KVL at node V n. Summing the current flowing out from this node (assume current flowing out is positive), we arrive at: V n V 1 + I n + V n V o = 0 R 2 Since V p = V n amd V p was found to be equal to 0 for this particular circuit, we see that V n = 0. Also, I n = 0 by assuming ideal op-amps. We can simplify the expression to: Solving for V o gives: 0 V V o = 0 R 2 V o = R 2 V 1 (Note: An astute student might also recognize that this just an expression for an inverting amp.) Let s now consider the V 2 voltage source. We will turn off V 1 by shorting it out. We have the following circuit schematic: R v 2 n I n = 0 R 3 v p I p = 0 v 0 v 2 R 4

10 At the positive input terminal, we realize that V p is a voltage divider of V 2. We have: We can perform KCL at node V n, giving us: Since I n = 0, we have: Solving for V o, we get: Since V n = V p = R 4 R 4 +R 3 V 2, we have: R 4 V p = V R 4 + R 2 3 V n + I R n + V n V o = 0 1 R 2 V n V n V o = 0 R 2 V o = + R 2 V R n 1 V o = + R 2 Invoking the superposition principle, we finally have: V o = V o + V o = R 2 V 1 + +R 2 R 4 R 4 +R 3 V 2 R 4 V R 4 + R 2 3 As expected, this circuit solving technique gives you the same result as what you would have gotten had you solved the original circuit using node analysis/kcl.

11 7) In this approximation, when a diode is on, the voltage across it is V d = V F where V d is the voltage from the anode to the cathode. When it is off, the diode acts like an open circuit. To determine if the diode is off we check if I d 0 or V d V F. If the diode is indeed off we set I d =0 and re-analyze. The circuit has been labeled below. We could use KVL to show that when each diodes is on : I 1 = V s 0.7 V A, I 1k 2 = V A 0.7, I = V A 150 There are three possible configurations for the two diodes: 1) D1 and D2 are off: I 1 = I 2 = 0. gives I 3 = 0 so V A = 0. {eqtn1} 2) D1 and D2 are on: V d1 = V d2 = 0.7. I 1 I 2 I 3 = 0 V s 0.7 V A V A 0.7 V A 1k = 0 Multiplying by 6k and simplifying gives: 76 V A = 6 V s {eqtn2} 3) D1 is on and D2 is off: V d1 = 0.7, I 2 = 0: I 1 I 3 = 0 V s 0.7 V A V A 1k 150 = 0 Multiplying by 3k and simplifying gives: 23 V A = 3 V s 2.1 {eqtn3} Note that when D1 is off, D2 is automatically off since no current would flow through the circuit. Thus, there is no case when D1=Off and D2=on.. (a) V s =0.5V: Since V s < 0.7 there is no way that D1 could be on so configuration 1 is met and D1 = off, D2 = off, V A = 0. (b) V s =3V: Since V s 0.7V, D1 must be on. Assuming configuration 2 is true, we get from {eqtn2}, V A = 0.46V which gives I 2 = 1.2mA, our assumption was wrong since D2 is off. Knowing D1 = On, D2 = Off use {eqtn3} to get V A = 0.3V. (c) V s =5V: Since V s 0.7V, D1 must be on. Assuming configuration 2 is true, we get from {eqtn2}, V A = 0.62V which gives I 2 < 0, our assumption was wrong since D2 is off. Knowing D1 = On, D2 = Off use {eqtn3} to get V A = 0.56V. (d) V s =7V: Since V s 0.7V, D1 must be on. Assuming configuration 2 is true, we get from {eqtn2}, V A = 0.77V which gives I 2 > 0, our assumptions are correct. We know D1 = On, D2 = On

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