EE 435 Lecture 44. Switched-Capacitor Amplifiers Other Integrated Filters

Transcription

1 EE 435 Lecture 44 Switched-Capacitor Amplifiers Other Integrated Filters

2 Switched-Capacitor Amplifiers Noninverting Amplifier Inverting Amplifier C A V = C C A V = - C Accurate control of gain is possible (0.% or better) but extreme care to detail in layout and statistical analysis for adequate area allocation is necessary Stray-insensitive structures

3 Switched-Capacitor Amplifiers Noninverting Amplifier Inverting Amplifier C A V = C C A V = - C Bottom-plate sampling with advanced clock reduces signal-dependent gain errors when V is time varying: Sample and Hold

4 Switched-Capacitor Amplifiers Summing Inverting and Noninverting Amplifier C C V = V V C C 2 OUT 2 (modification for bottom-plate sampling needed if V is time varying: track and hold)

5 Switched-Capacitor Amplifiers φ 2 φ C 2 φ φ C V V OUT φ 2 C A V =+ C 2 Flip-Around Amplifier (modification for bottom-plate sampling needed if V is time varying: track and hold)

6 Switched-Capacitor Amplifiers φ 2 φ C 2 φ φ C V V OUT φ 2 C C V OUT=V + -V2 C2 C2 Flip-Around Subtracting Amplifier (modification for bottom-plate sampling needed if V is time varying: track and hold)

7 Switched-Capacitor Amplifiers Consider the following circuit

8 Switched-Capacitor Amplifiers Consider the following circuit During phase Φ Q C =C V

9 Switched-Capacitor Amplifiers Consider the following circuit During phase Φ 2 from Φ Q C =C V during Φ 2 Q C =0 Q C2=CV

10 Switched-Capacitor Amplifiers Consider the following circuit During phase Φ 3 from Φ 2 Q C=0 Q C2=CV during Φ 2 Q C =C V Q C2 =C V

11 Switched-Capacitor Amplifiers Consider the following circuit During phase Φ 4 from Φ 3 Q C =C V Q C2 =C V during Φ 2 Q C2 =0 Q C =2C V Thus V OUT =Q C /C =2V

12 Switched-Capacitor Amplifiers Consider the following circuit A V =2 Gain of 2 obtained without requiring any matching of components

13 Top-Plate vs Bottom-Plate Sampling OUT OUT Top-Plate Sampling Bottom-Plate Sampling

14 Top-Plate vs Bottom-Plate Sampling Top-Plate Sampling Bottom-Plate Sampling OUT

15 Top-Plate Sampling Actual sample taken at t A Sampled-value is signal-level dependent Equivalent to a signal-dependent jitter on sampling clock Causes serious nonlinear distortion if signal frequency is high

16 Bottom-Plate Sampling Actual sample taken at t A t A -t D is independent of V (t) Dramatic reduction in nonlinear distortion and signal-dependent sampling error Effectively causes a constant phase shift in sampling time

17 Bottom-Plate Sampling φ φ A

18 Bottom-Plate Sampling Expanded time axis: V φ φ A

19 Bottom-Plate Sampling V φ φ A Further expanded time axis (V change exaggerated to show effects): D A A T D A

20 Bottom-Plate Sampling Φ V OUT V C T C C B Φ A C T and C B are parasitic capacitances that appear at nodes connected to top plate and bottom plate of C Actual sample taken at t A t A -t D is independent of V (t) Some change in V OUT will occur until Φ opens Time Φ opens is input signal-level dependent

21 Bottom-Plate Sampling Φ V OUT V C T C C B Φ A VOUT ( t A ) = V ( ta ) but: C VOUT t T = V ta + V tt -V ta C+CB can be rewritten as: C C B VOUT t T = V ta + V ( tt ) C+C B C+CB B Gain error on sampling V at t A Dependent upon V (t T ) which causes distortion in sample C B can be a reasonable percentage of C

22 Consider the entire SC amplifier Bottom-Plate Sampling C C VC t T = V ta V tt C+C B C+C B + B Likewise: C C VC t B T = V tt V ta C+C B C+C B Thus charges stored on C and C B at t T are C C QC t T = CV ta C V tt C+C B C+C B + B C C QC t B T = CB V tt CB V ta C+C B C+C B

23 Consider the entire SC amplifier Bottom-Plate Sampling C C QC t T = CV ta C V tt C+C B C+C B + B C C QC t B T = CB V tt CB V ta C+C B C+C B During Φ 2, these capacitors are both discharged and the charge on feedback capacitor C becomes it thus follows that Q = Q - Q C C CB QC( t T) = CV( ta) Extra charge accumulated on C until the top switch opened equal to charge accumulated on C B For switching scheme used here, effects precisely cancel when charge is transferred to C

24 Consider the entire SC amplifier Bottom-Plate Sampling Thus: QC( t T) = CV( ta) Q t C V t = = V t C C C T OUT T A As predicted the output voltage is not a function of t T and thus the parasitic capacitance on the bottom Plate does not affect performance when bottom plate sampling is used

25 Switch impedance issues OUT VOUT s Ts= = V s +RSWCs SW OUT T jω = 2 + RSWCω ωr tan SWC T jω = SWT A SWB When in track mode, non-zero R SW causes small amplitude decrease and phase shift but no nonlinear distortion provided R SW is not signal-level dependent Top-plate switch (R SW or R SWT ) is signal level dependent if implemented with simple transistor Bottom-plate switch (R SWB ) is not signal-level dependent Make R SW and R SWT sufficiently small to avoid distortion

26 Switch impedance issues OUT SW OUT When transitioning from track mode to hold mode, swtich impedance increases rapidly from non-zero R SW

27 Switch impedance issues OUT OUT A OUT A T D A Amplitude and phase shift for bottom-plate sampler (difficult to distinguish between phase and amplitude effects in this zoom)

28 Switch impedance issues V (t A ) φ V OUT OUT V OUT (t A ) V V T t D t A t Ideal Switch Transition Track V (t A ) Hold OUT V OUT (t A ) t D t A t

29 V (t A ) φ V OUT (t A ) V OUT Switch impedance issues OUT t D t A V V T Actual Switch Transition t Track/Hold Transition R SW Track R SWON t V (t A ) Hold Φ V OUT (t A ) td t V OUTI (t A ) OUT t D t A t

30 V (t A ) φ V OUT (t A ) V OUT V Switch impedance issues V T Track Track/Hold Transition t D t A t V (t A ) Hold V OUT (t A ) V OUTI (t A ) OUT t D t A t Track/Hold Transition usually not of concern if fast fall time on switch Switch impedance effects can be managed by making R SW small Bottom-plate sampling does not introduce distortion