GATE 20 Years. Contents. Chapters Topics Page No.

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1 GATE 0 Years Contents Chapters Topics Page No. Chapter- Chapter- Chapter- Chapter-4 Chapter-5 GATE Syllabus for this Chapter Topic elated to Syllabus Previous 0-Years GATE Questions Previous 0-Years GATE Answers Control System GATE Syllabus for this Chapter Topic elated to Syllabus Previous 0-Years GATE Questions Previous 0-Years GATE Answers Electromagnetic Theory GATE Syllabus for this Chapter Topic elated to Syllabus Previous 0-Years GATE Questions Previous 0-Years GATE Answers Electronic Device and Circuit GATE Syllabus for this Chapter Topic elated to Syllabus Previous 0-Years GATE Questions Previous 0-Years GATE Answers Analog Circuit GATE Syllabus for this Chapter Topic elated to Syllabus Previous 0-Years GATE Questions Previous 0-Years GATE Answers

2 ndia s No. ES Academy GATE 0 Years Question and Answer Contents Chapters Topics Page No. Chapter-6 Chapter-7 Chapter-8 Chapter-9 Signals & System GATE Syllabus for this Chapter Topic elated to Syllabus Previous 0-Years GATE Questions Previous 0-Years GATE Answers Communication System GATE Syllabus for this Chapter Topic elated to Syllabus Previous 0-Years GATE Questions Previous 0-Years GATE Answers Digital Electronics GATE Syllabus for this Chapter Topic elated to Syllabus Previous 0-Years GATE Questions Previous 0-Years GATE Answers Microprocessor Engineering Topic elated to Syllabus Previous 0-Years GATE Questions Previous 0-Years GATE Answers iesacademy@yahoo.com Page-ii 5, st Floor, Jia Sarai, Near T Delhi, New Delhi-6 Ph: ,

3 ndia s No ES Academy Chapter. Networks Theory: Gate Syllabus for this Chapter Matrices Associated with Graphs; ncidence, Fundamental Cut-set and Fundamental Circuit Matrices. Solution Methods; Nodal and Mesh analysis. Network Theorems: Superposition, Thevenin and Norton s Maximum Power Transfer, Wye-Delta Transformation. Steady State Sinusoidal Analysis Using Phasors. Linear Constant Coefficient Differential Equations; Timedomain Analysis of Simple LC Circuits, Solution of Network Equation Using Laplace Transform; Frequency-domain Analysis of LC Circuits. -Port Network Parameters; Drivingpoint and Transfer Functions. State Equations for Networks. Topics elated to Syllabus. Basic Network Analysis and Network Topology. nitial Conditions; Time Varying Current and Differential Equation; Laplace Transform. Two-port Network 4. Network Theorem 5. Sinusoidal Steady State Analysis; esonance; Power in AC Circuits; Passive Filters iesacademy@yahoo.com Page- 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

4 ndia s No ES Academy Chapter Previous Years GATE Question. Basic Network Analysis and Network Topology Q.. The resonant frequency of the series circuit shown in figure is: [GATE-990] (a) Hz (b) Hz 4π 4π (c) Hz (d) Hz π 0 4π Q.. The response of an initially relaxed linear constant parameter network to a unit impulse applied at t = 0 is 4e t. The response of this network to a unit step function will be: [GATE-990] (a) [ e t ] u(t) (b) 4 [e e t ] u(t) (c) sin t (d) ( 4 e 4t ) u(t) Q.. Two resistors and (in ohms) at temperature T and T K respectively, are connected in series. Their equivalent noise temperature is: [GATE-99] T T T T T T (a) (b) (c) (d) Q.4. For the compensated attenuator of figure, the impulse response under the condition C = C is: [GATE-99] e u t t ut e ut C (a) ( ) (b) δ ( ) C (c) ( ) (d) ( ) C v(t) C (t) V(t) - C - Q.5. elative to a given fixed tree of a network: [GATE-99] (a) Link currents form an independent set (b) Branch voltage form an independent set (c) Link currents form an independent set (d) Branch voltage form an independent set Q.6. The two electrical sub network N and N are connected through three resistors as shown in figure. The voltage across 5 ohm resistor and ohm resistor are given to be 0V and 5V, respectively. Then voltage across 5 ohm resistors is: [GATE-99] (a) 05 V (b) 05 V (c) 5 V (d) 5 V iesacademy@yahoo.com Page- 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

5 ndia s No ES Academy Chapter Q.7. A network contains linear resistors and ideal voltage sources. f values of all the resistors are doubled, then the voltage across each resistor is: [GATE-99] (a) Halved (b) Doubled (c) ncreases by four times (d) Not changed Q.8. The MS value of a rectangular wave of period T, having a value of V for a duration, (T < T) and V for the duration, T T = T, equals: [GATE-995] T T V T (a) V (b) V (c) (d) V T T Q.9. The number of independent loops for a network with n nodes and b branches is: [GATE-996] (a) n (b) b n (c) b n (d) ndependent of the number of nodes Q.0. n the circuit of figure, the current id through the ideal diode (zero cut in voltage and forward resistance) equals [GATE-997] (a) 0 A (b) 4 A (c) A (d) None of these Q.. n the circuit of figure, the equivalent impedance seen across terminals a, b is: [GATE-997] (a) 6 Ω (b) 8 Ω (c) 8 j Ω (d) None of these Q.. The voltage V in figure is: [GATE-997] (a) 0 V (b) 5 V (c) 5 V (d) None of these iesacademy@yahoo.com Page- 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

6 ndia s No ES Academy Chapter Q.. The voltage V in figure in always equal to: (a) 9 V (b) 5 V (c) V (d) None of these [GATE-997] Q.4. The voltage V in figure is equal to: [GATE-997] (a) V (b) V (c) 5 V (d) None of these Q.5. The current i4 in the circuit of figure is equal to: [GATE-997] (a) A (b) A (c) 4 A (d) None of these Q.6. The nodal method of circuit analysis is based on: (a) KVL and Ohm s law (b) KCL and Ohm s law (c) KCL and KVL (d) KCL, KVL and Ohm s law [GATE-998] Q.7. A network has 7 nodes and 5 independent loops. The number of branches in the network is: [GATE-998] (a) (b) (c) (d) 0 Q.8. dentify which of the following is NOT a three of the graph shown in figure: [GATE-999] (a) begh (b) defg (c) adhg (d) aegh Q.9. For the circuit in figure, the voltage v0 is: [GATE-000] (a) V (b) V (c) V (d) None of these iesacademy@yahoo.com Page-4 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

7 ndia s No ES Academy Chapter Q.0. n the circuit of figure, the value of the voltage source E is: (a) 6 V (b) 4 V (c) 6 V (d) 6 V [GATE-000] Q.. The voltage e0 in figure is: [GATE-00] (a) 48 V (b) 4 V (c) 6 V (d) 8 V Q.. The voltage e0 in figure is: (a) V [GATE-00] (b) 4 V (c) 4 V (d) 8 V Q.. The minimum number of equations required to analyze the circuit shown in figure is [GATE-00] (a) (b) 4 (c) 6 (d) 7 Q.4. Consider the network graph shown in figure which one of the following is NOT a tree of this graph? [GATE-004] iesacademy@yahoo.com Page-5 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

8 ndia s No ES Academy Chapter Q.5. f = = 4 = and =. in the bridge circuit shown in figure, then the reading in the ideal voltmeter connected between a and b is: [GATE-005] (a) 0.8 V (b) 0.8 V (c) 0.8 V (d) V Q.6. mpedance Z as shown in figure is: (a) j9ω [GATE-005] (b) j9ω (c) j9ω (d) j9ω Q.7. n the following graph, the number of trees (P) and number of cut-sets (Q) are: [GATE-008] (a) P =, Q = (b) P =, Q = 6 (c) P = 4, Q = 6 (d) P = 4, Q = 0 Q.8. A fully charged mobile phone with a V battery is good for a 0 minutes talk-time. Assume that, during the talk-time, the battery delivers a constant current of A and its voltage drops linearly from V to 0V as shown in the figure. How much energy does the battery deliver this talk-time? [GATE-009] iesacademy@yahoo.com Page-6 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

9 ndia s No ES Academy Chapter (a) 0 J v(t) (b) kj V (c). kj (d) 4.4 kj 0 V 0 0 min t Q..9 n the circuit shown, the power supplied by the voltage source is: (a) 0 W [GATE-00] (b) (c) (d) 5 W 0 W 00 W. nitial Conditions, Time-varying Current & Differential Equation, Laplace Transform Q.. The necessary and sufficient condition for a rational function of s. T(s) to be driving point impedance of an C network is that all poles and zeros should be: (a) Simple and lie on the negative axis in the s-plane [GATE-99] (b) Complex and lie in the left half of the s-plane (c) Complex and lie in the right half of the s-plane (d) Simple and lie on the positive real axis of the s-plane Q.. The voltage across an impedance in a network is V(s) = Z(s) (s), where V(s), Z(s), (s) are the Laplace transforms of the corresponding time function v(t), z(t) and i(t). The voltage v(t) is: [GATE-99] t (a) v(t) = z(t) v(t) (b) vt () = i( τ ) zt ( τ) dτ 0 t (c) vt () = i( τ ).( zt τ) dτ (d) v(t) = z(t) v(t) 0 Q.. Condition for valid input impedance is that maximum powers of the number of denominator polynomial may bigger at most by: [GATE-99] (a) (b) (c) (d) 0 Q.4. n the circuit shown in figure, assuming initial voltage and capacitors and currents through the inductors to be zero at the time of switching (t = 0), then at any time t > 0: [GATE-996] iesacademy@yahoo.com Page-7 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

10 ndia s No ES Academy Chapter (a) Current increases monotonically with time (b) Current decreases monotonically with time (c) Current remains constant at V/ (d) Current first increases then decreases Q.5. The voltages Vc, Vc, and Vc across the capacitors in the circuit in figure, under steady state, are respectively [GATE-996] (a) 80 V, V, 48 V (b) 80 V, 48 V, V (c) 0 V, 8 V, V (d) 0 V, V, 8 V 00V - Vc F Vc Vc 40K F - Q.6. Q.7. n the circuit of figure, assume that the diodes are ideal and the meter is an average indicating ammeter. The ammeter will read: [GATE-996] (a) 0.4 A (c) 0.8 A π (b) 0.4 A (d) 0.4 A π n figure, A, A and A are ideal ammeters. f A and A real A and 4A respectively, then A should read: [GATE-996] (a) A (b) 5 A - D 0k A A A D L 0k (c) 7 A (d) None of these Q.8. n the circuit of figure, the voltage V(t) is: [GATE-000] (a) e at e bt (b) e at e bt (c) ae at be bt (d) ae at be bt Q.9. n figure the switch was closed for a long time before opening at t = 0. The voltage Vx at t = 0 is [GATE-00] iesacademy@yahoo.com Page-8 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

11 ndia s No ES Academy Chapter (a) 5 V (b) 50 V (c) 50 V (d) 0 V Q.0. (s) and (s) are the Laplace transform of i(t) and i(t) respectively. The equations for the loop currents (s) and (s) for the circuit shown in figure, after the switch is brought from position to position at t = 0, are: (a) (b) (c) (d) Ls Ls V Cs () s s = () s 0 Ls Cs Ls Ls V Cs () s s = () s Ls 0 Cs Ls Ls V Cs () s s = () s Ls Ls 0 Cs Ls Ls V Cs () s s = () s Ls Ls 0 Cs [GATE-00] Q.. At t = 0, the current i is: [GATE-00] V (a) (c) V 4 (b) V (d) zero iesacademy@yahoo.com Page-9 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

12 ndia s No ES Academy Chapter Q.. The circuit shown in figure has initial current i(0 ) = A through the inductor and aninitial voltage vc(0 ) = V across the capacitor. For input v(t) = u(t), the Laplace transform of the current it () t 0 is: [GATE-004] (a) s s s (b) s s s (c) s s s (d) s s s Q.. The equivalent inductance measured between the terminals and for the circuit shown in figure is: [GATE-004] (a) L L M (b) L L M (c) L L M (d) L L M Q.4. A square pulse of volts amplitude is applied to C circuit shown in figure. The capacitor is initially uncharged. The output voltage vo at time t = sec is: [GATE-005] (a) V (b) V (c) 4 V (d) 4 V Q.5. n the circuit shown below, the switch was concentred to position at t < 0 and at t= 0, it is changed to position. Assume that the diode has zero voltage drop and a storage time ts. For t < ts, V is given by (all in volts): [GATE-006] (a) V = 5 (b) V = 5 (c) 0 V = 5 (d) 5< V < iesacademy@yahoo.com Page-0 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

13 ndia s No ES Academy Chapter Q.6. n the figure shown below, assume that all the capacitors are initially uncharged. f Vi(t) = 0u(t) volts V0(t) is given by: [GATE-006] (a) 8 e 0.004t Volts (b) 8 ( e t/0.004 ) Volts (c) 8 u(t) Volts (d) 8 Volts Q.7. A mh inductor with some initial current can be represented as shown below, where s is the Laplace transform variable, the value of initial current is: [GATE-006] (a) 0.5 A (b).0 A (c).0 A (d) 0.0 A - (s) 0.00s mv Q.8. n the following circuit, the switch S is closed at t = 0. The rate of change of current di (0 ) is given by GATE-008] dt (a) 0 (b) (c) S L S ( ) L S S (d) Q.9. The driving-point impedance of the following network is given by 0.s Zs ( ) =. The component values are: [GATE-008] s 0.s (a) L = 5H, = 0.5 Ω, C = 0.F (b) L = 0.H, = 0.5 Ω, C = 5F (c) L =5H, = Ω, C =0.F (d) L = 0.H, = Ω, C = 5F iesacademy@yahoo.com Page- 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

14 ndia s No ES Academy Chapter Q.0. n the interconnection of ideal sources shown in the figure, it is known that the 60 V source is absorbing power. [GATE-009] - 60V 0V - X A Which of the following can be the value of the current source? (a) 0 A (b) A (c) 5 A (d) 8 A Vo ( s) Q.. f the transfer function of the following network is = Vi ( s) sc the value of the load resistance L is: [GATE-009] (a) /4 (b) / (c) (d) Q.. The switch in the circuit shown was on position a for a long time, and is moved to position b at time t = 0. The current i(t) for t > 0 is given by: [GATE-009] 5t (a) 0. e u( t) ma 50t (b) 0 e u( t) ma a b (c) 50t 0. e u( t) ma 00V 000t (d) 0 e u( t) ma V i C L Vo Q.. The time-domain behavior of an L circuit is represented by di L i V / ( Be t L V = o sin t) u( t). For an initial current of i(0) = o, the dt steady state value of the current is given by [GATE-009] V (a) it () o V (b) () o V it (c) () o V it ( B) (d) it () o ( B) Q.4. n the circuit shown, the switch S is open for a long time and is closed at t = 0. The current i(t) for t 0 is: [GATE-00] (a) i(t) = e 000t A (b) (c) (d) i(t) =.5 0.5e 000t A i(t) = e 000t A i(t) = 0.75e 000t A iesacademy@yahoo.com Page- 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

15 ndia s No ES Academy Chapter. Two-port Network Q.. The open circuit impedance matrix of the two-port network shown in figure is: [GATE-990] (a) 8 8 (b) 0 (c) 0 (d) Q.. Two two-port networks are connected in cascade. The combination is to represented as a single two-port networks. The parameters of the network are obtained by multiplying the individual: [GATE-99] (a) z-parameter matrix (b) h-parameter matrix (c) y-parameter matrix (d) ABCD parameter matrix Q.. For a two-port network to be reciprocal [GATE-99] (a) Z = Z (b) y = y (c) h = h (d) AD BC = 0 Q.4. The condition that a z-port network is reciprocal, can be expressed in terms of its ABCD parameters as: [GATE-994] (a) AD BC = (b) AD BC = 0 (c) AD BC > (d) AD BC < Q.5. The short-circuit admittance matrix of a two-port network is: [GATE-998] The two-port network is: (a) Non-reciprocal and passive (c) eciprocal and passive 0 / / 0 (b) Non-reciprocal and active (d) eciprocal and active Q.6. A two-port network is shown in figure. The parameter h for this network can begiven by: [GATE-999] (a) / (b) / (c) / (d) / iesacademy@yahoo.com Page- 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

16 ndia s No ES Academy Chapter Q.7. The Z parameters Z and Z for the -port network in figure are: [GATE-00] = 6 ; = 6 Ω (a) Z Ω Z = 6 ; = 4 Ω (b) Z Ω Z 6 = ; = 6 Ω (c) Z Ω Z = 4 ; = 4 Ω (d) Z Ω Z Q.8. The admittance parameter Y in the two-port network in figure is: [GATE-00] (a) 0. mho (b) 0. mho (c) 0.05 mho (d) 0.05 mho Q.9. The impedance parameters Z and Z of the two-port network in figure are: [GATE-00] (a) Z =.75 Ω and Z = 0.5 Ω (b) Z = Ω and Z = 0.5 Ω (c) Z = Ω and Z = 0.5 Ω (d) Z =.5 Ω and Z = 0.5 Ω Q.0. For the lattice shown in figure, Z = j Ω and Z = Ω. The values of the open circuit a z z impedance parameters Z = are: z z [GATE-004] j j (a) j j j j (b) j j j j (c) j j j j (d) j j b iesacademy@yahoo.com Page-4 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

17 ndia s No ES Academy Chapter Q.. The h parameters of the circuit in figure are: [GATE-005] (a) (b) (c) 0 0 (d) n 0 Q.. The ABCD parameters of an ideal n : transformer shown in figure are. 0 X The value of X will be: [GATE-005] (a) n (b) /n (c) n (d) /n Q.. A two-port network is represented by ABCD parameters given by V A B V C D f two-port is terminated by L, the input impedance seen at one-port is given by: [GATE-006] A BL AL C DL A B AL (a) (b) (c) (d) C D B D B C D C L L Statements for Linked Answers and Questions.4 and.5: A two-port network shown below is excited by external DC sources. The voltages and the currents are measured with voltmeters V, V and ammeters A, A (all assumed to be ideal), as indicated. Under following switch condition, the readings obtained are: ( i) S Open, S Closed A = 0A, V = 4.5V, V =.5V, A = A L L ( ii) S Closed, S Open A = 4A, V = 6V, V = 6V, = 0A Q.4. The z-parameter matrix for this network is: (a) (b) (c).5.5 (d) Q.5. The h-parameter matrix for this network is: [GATE-008] [GATE-008] iesacademy@yahoo.com Page-5 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

18 ndia s No ES Academy Chapter (a) 0.67 (b) (c) 0.67 (d) Q.6. For the two-port network shown below, the short-circuit admittance parameter matrix is: [GATE-00] (a) 4 4 S (b) S (c) S (d) 4 4 S 4. Network Theorem Q4.. A generator of internal impedance ZG deliver maximum power to a load impedance, Zp only if Zp [GATE-994] (a) Z < ZG (b) Z > ZG (c) Zp = ZG (d) Z = Z G Q4. A ramp voltage, v(t) = 00t volts, is applied to an C differencing circuit with = 5 k Ω and C = 4 µf. The maximum output voltage is: [GATE-994] (a) 0. volts (b).0 volts (c) 0.0 volts (d) 50.0 volts Q4.. The value of the resistance,, connected across the terminals A and B, (ref. figure), which will absorb the maximum power is: [GATE-995] (a) 4.00 k Ω (b) 4. k Ω (c) 8.00 k Ω (d) 9.00 k Ω Q4.4. Two H inductance coils are connected in series and are also magnetically coupled to each other the coefficient of coupling being 0.. The total inductance of his combination can be: [GATE-995] (a) 0.4 H (b). H (c) 4.0 H (d).8 H Q4.5. Superposition theorem is NOT applicable to networks containing: (a) Nonlinear elements (b) Dependent voltage sources (c) Dependent current sources (d) Transformers [GATE-998] iesacademy@yahoo.com Page-6 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

19 ndia s No ES Academy Chapter Q4.6. A delta-connected network with its Wyes-equivalent is shown in figure. The resistances,, and (in ohms) are respectively. [GATE-999] (a).5, and 9 (b), 9 and.5 (c) 9, and.5 (d),.5 and 9 Q4.7. The value of (in ohms) required for maximum power transfer in the network shown in figure is: [GATE-999] (a) (b) 4 (c) 8 (d) 6 Q4.8. The Theremin equivalent voltage VTH appearing between the terminals A and B of the network shown in figure is given by [GATE-999] (a) j6 ( j4) (b) j6( j4) (c) 6 ( j4) (d) 6( j4) Q4.9. Use the data of Fig (a). The current i in the circuit of Fig (b) is: [GATE-000] (a) A (b) A (c) 4 A (d) 4 A Q4.0. f each branch of a delta circuit has impedance z, then each branch of the equivalent Wye-circuit has impedance [GATE-00] (a) Z Z (c) (b) Z Z (d) iesacademy@yahoo.com Page-7 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

20 ndia s No ES Academy Chapter Q4.. n the network of figure, the maximum power is delivered to L if its value is: [GATE-00] (a) 6 Ω (b) 40 Ω (c) 60 Ω (d) 0 Ω Q4.. Twelve Ω resistance are used as edges to form a cube. The resistance between two diagonally opposite corners of the cube is: [GATE-00] (a) 5 6 Ω (b) Ω (c) 6 5 Ω (d) Ω Q4.. A source of angular frequency rad/sec has a source impedance consisting of Ω resistance in series with H inductance. The load that will obtain the maximum power transfer is: [GATE-00] (a) Ω resistance (b) Ω resistance in parallel with H inductance (c) Ω resistance in series with F capacitor (d) Ω resistance in parallel with F capacitor Q4.4. For the circuit shown in figure. Thevenin s voltage and Thevenin s equivalent resistance at terminals a, b is: [GATE-005] (a) 5 V and (b) 7.5 V and.5 (c) 4 V and (d) V and.5 Q4.5. The maximum power that can be transferred to the load resistor L from the voltage source in figure is [GATE-005] (a) W (b) 0 W (c) 0.5 W (d) 0.5 W Q4.6. An independent voltage source in series with an impedance ZS = S jxs delivers a maximum average power to a load impedance ZL when [GATE-007] (a) ZL = S jxs (b) ZL = S (c) ZL = jxs (d) ZL = S jxs iesacademy@yahoo.com Page-8 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

21 ndia s No ES Academy Chapter Q4.7. For the circuit shown in the figure, the Thevenin voltage and resistance looking into X Y are [GATE-007] (a) 4/ V, Ω (b) 4V, / Ω (c) 4/ V, / Ω (d) 4 V, Ω Q4.8. The Thevenin equivalent impedance Z th between the nodes P and Q in the following circuit is [GATE-008] (a) (b) S S (c) S (d) S S S S s Q4.9. n the circuit shown, what value of L maximizes the power delivered to L? [GATE-009] (a).4 Ω V X (b) 8 Ω (c) 4 Ω (d) 6 Ω V i V X 00V L 5. Sinusoidal Steady State Analysis, esonance, Power in AC Circuits, Passive Filters Q5.. The transfer function of a simple C network function as a controller is ( ) s z G. C s = The condition for the C network to Act as a phase lead controller is: s p [GATE-990] (a) p < z (b) p = 0 (c) p = z (d) p > z Q5.. n a series LC high Q circuit, the current peaks at a frequency: [GATE-99] (a) Equal to the resonant frequency (b) Greater than the resonant frequency (c) Less than the resonant frequency (d) None of these iesacademy@yahoo.com Page-9 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

22 ndia s No ES Academy Chapter Q5.. Of the four network, N, N, N and N4 of figure, then network having identical driving-point function are: [GATE-99] (a) N and N (b) N and N4 (c) N and N (d) N and N4 Q5.4. For the series L circuit of Fig. (a), the partical phasor diagram at a certain frequency is shown in Fig. (b). The operating frequency of the circuit is: [GATE-99] (a) Equal to the resonance frequency (b) less than the resonance frequency (c) greater than resonance frequency (d) Not zero Q5.5. n figure and A, A and A are ideal ammeters. f A reads 5A, A reads A, then A should read: [GATE-99] (a) 7 A (b) A (c) A (d) 7 A Q5.6. The response of an LC circuit to a step input is over damped. f transfer function has: [GATE-99] (a) Poles in the negative real axis (b) Poles on imaginary axis (c) Multiple poles on the negative real axis (d) Multiple poles on the positive real axis Q5.7. A series L C circuit, consisting of =0 Ω, XL =0 Ω and XC = 0 Ω, is connected across an AC supply of 00V rms. The rms voltage across the capacitor is: [GATE-994] (a) 00 < 90 V (b) V (c) 400 < 90 V (d) 400 < 90 V iesacademy@yahoo.com Page-0 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

23 ndia s No ES Academy Chapter Q5.8. A series L C circuit has a Q of 00 and an impedance of (00 j0) Ω at its resonant angular frequency of 0 7 rad/sec. The values of and L are: [GATE-995] (a) 00, 0 Ω H (b) 0 Ω, 0 H (c) 000 Ω, 0H (d) 00 Ω, 00H Q5.9. The current, i(t), through a 0Ω resistor in series is equal to 4sin(00t 45 ) 4sin(00t 60 ) amperes. The MS value of the current and the power dissipated in the circuit are: [GATE-995] (a) 4 A, 40 W, respectively (b) 5 A, 40 W, respectively (c) 5 A, 50 W, respectively (d) A, 0 W, respectively Q5.0. Consider a DC voltage source connected to a series C circuit. When the steadystate reaches, the ratio of the energy stored in the capacitor to the total energy supplied by the voltage source is equal to: [GATE-995] (a) 0.6 (b) (c) 0.6 (d).000 Q5.. ADC voltage source is connected across a series L C circuit. Under steady conditions, the applied DC voltage drops entirely across the: [GATE-995] (a) only (d) L only (c) C only (d) and L Combination Q5.. A communication channel has first order low pass transfer function. The channel is used to transmit pulses at a symbol rate greater than the half-power frequency of the low pass function. Which of the network shown in figure can be used to equalize the received pulses? [GATE-997] Q5.. n the circuit of figure the energy absorbed by the 4Ω resistor in the time interval (0, ) is: [GATE-997] (a) 6 Joules (b) 6 Joules (c) 56 Joules (d) None of these iesacademy@yahoo.com Page- 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

24 ndia s No ES Academy Chapter Q5.4. The parallel -L-C circuit shown in figure is in resonance, n this circuit: [GATE-998] (a) < ma (b) (c) (d) > ma L < ma C > 5mA C Q5.5. When the angular frequency ω in figure is varied from 0 to, the locus of the current phasor is given by: [GATE-00] Q5.6. f the -phase balanced source in figure delivers 500 W at a leading power factor of 0.844, then the value of ZL (in ohm) is approximately: [GATE-00] (a) (b) (c) (d) iesacademy@yahoo.com Page- 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

25 ndia s No ES Academy Chapter Q5.7. The dependent current source shown in figure is: [GATE-00] (a) Delivers 80 W (b) Absorbs 80 W (c) Delivers 40 W (d) Absorbs 40 W Q5.8. An input voltage vt ( ) = 0cos( t 0 ) 05cos(t 0 ) V is applied to a series combination of resistance = Ω and an inductance L = H. The resulting steady state current i(t) in ampere is: [GATE-00] (a) 0 cos (t 55 ) 0 cos (t 00 tan ) (b) 0 cos (t 55 ) 0 cos (t 55 ) (c) 0 cos (t 5 ) 0 cos (t 0 tan ) (d) 0 cos (t 5 ) 0 cos (t 5 ) Q5.9. The current flowing through the resistance in the circuit in figure has the form P cos 4t, where P is: [GATE-00] (a) (0.8 j0.7) (b) (0.46 j.90) (c) (0.8 j.90) (d) (0.9 j0.44) Q5.0. The differential equation for the current i(t) in the circuit of figure is: [GATE-00] di di (a) it ( ) = sint dt dt di di (b) it ( ) = cost dt dt di di (c) it ( ) = cost dt dt di di (d) it ( ) = sint dt dt Q5.. A series L C circuit has a resonance frequency of khz and a quality factor Q = 00. f each of, L and C is doubled from its original value, the new Q of the circuit is: [GATE-00] (a) 5 (b) 50 (c) 00 (d) iesacademy@yahoo.com Page- 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

26 ndia s No ES Academy Chapter Q5.. Consider the following statements S and S (S: At the resonant frequency the impedance of a series L C circuit is zero; S: n a parallel G L C circuit, increasing the conductance G results in increase in its Q factor). Which one of the following is correct? [GATE-004] (a) S is FALSE and S is TUE (b) Both S and S are TUE (c) S is TUE and S is FALSE (d) Both S and S are FALSE Q5.. For the circuit shown in figure, the initial conditions are zero. ts transfer function is: [GATE-004] (a) 6 6 s 0 s 0 (b) s 0 s 0 (c) 0 6 s 0 s 0 (d) s 0 s 0 Q5.4. The transfer function H( s) Vo ( s) = V ( s) i of an L C circuit is given by 6 0 H( s) =. The Quality factor (Q - factor) of this circuit is: [GATE-004] 6 s 0s 0 (a) 5 (b) 50 (c) 00 (d) 5000 Q5.5. For the L circuit shown in figure the input voltage vi(t) = u(t). The current i(t) is: [GATE-004] iesacademy@yahoo.com Page-4 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

27 ndia s No ES Academy Chapter Q5.6. For the circuit shown in figure the time constant C = ms. The input voltage is vi(t) = sin 0 t. The output voltage vo(t) is equal to: [GATE-004] (a) sin (0 t 45 ) (b) sin (0 t 45 ) (c) sin (0 t 5 ) (d) sin (0 t 5 ) Q5.7. The circuit shown in figure with = Ω, L = H, C = F has input voltage v(t) = sin 4 t. The resulting current i(t) is: [GATE-004] (a) 5 sin (t 5. ) (b) 5 sin (t 5. ) (c) 5 sin (t 5. ) (d) 5 sin (t 5. ) Q5.8. For the circuit in figure, the instantaneous current i(t) is: (a) 0 90 Amps (b) 0 90 Amps (c) 5 60 Amps [GATE-005] (d) 5 60 Amps Q5.9. Which one of the following polar diagrams corresponds to a lag network? [GATE-005] Q5.0. n a series LC circuit = k Ω, L = H and C = /400 µf. The resonate frequency is: [GATE-005] (a) 4 0 Hz (b) 0 4 Hz π (c) 0 4 Hz (d) 4 π 0 Hz iesacademy@yahoo.com Page-5 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

28 ndia s No ES Academy Chapter Q5.. The condition on, L and C such that the step response y(t) in figure has no oscillations, is: [GATE-005] (a) L (b) C L C (c) L (d) C = L C Q5.. A negative resistance neg is connected to a passive network N having point impedance Z(s) as shown below. For Z(s) to be positive real: [GATE-006] (a) Z ( ), jω ω neg (b) Z ( ), jω ω neg (c) MZ ( ), jω ω neg (d) Z ( ), jω ω neg e neg Z(s) Z(s) N Q5.. The first and the last critical frequencies (singularities) of a driving-point impedance function of a passive network having two kinds of elements, are a pole and a zero respectively. The above property will be satisfied by: [GATE-006] (a) L network only (b) C network only (c) LC network only (d) C as well as L networks Q5.4. n the AC network shown in the figure, the phasor voltage VAB (in volts) is [GATE-007] (a) 0 (b) 5 0 (c).5 0 (d) 7 0 Q5.5. n the circuit shown, Vc is 0 volts at t = 0 sec. For t > 0, the capacitor current ic(t) where t is in seconds, is given by: [GATE-007] (a) 0.50 exp ( 5 t) ma (b) 0.5 exp ( 5 t) ma (c) 0.50 exp (.5 t) ma (d) 0.5 exp ( 6.5 t) ma iesacademy@yahoo.com Page-6 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

29 ndia s No ES Academy Chapter Q5.6. Two series resonant filters are as shown in the figure. Let the -db bandwidth of B Filter be B and that of Filter be B. The value of is [GATE-007] B (a) 4 (b) (c) (d) 4 Q5.7. The circuit shown in the figure is used to charge the capacitor C alternately from two current sources as indicated. The switches S and S are mechanically coupled and connected as follows: [GATE-008] For nt t < (n ) T ( n = 0,,,...) S to P and S to P For (n ) T t < (n ) T ( n = 0,,,...) S to Q and S to Q Assume that the capacitor has zero initial charge. Given that u(t) is a unit step function, the voltage VC(t) across the capacitor is given by: n (a) ( ) tu( t nt ) n= 0 n (b) ut () ( ) ut ( nt) n= 0 n (c) tu( t) ( ) ( t nt ) u( t nt ) (d) 0.5 e 0.5e n= n= 0 ( t nt) ( t nt T) Common Data for Questions 8 and 9: The following series LC circuit with zero initial conditions is excited by a unit impulse function δ (). t Q5.8. For t > 0, the output voltage [GATE-008] (a) e t t e (b) te t (c) te t (d) t e sin t iesacademy@yahoo.com Page-7 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

30 ndia s No ES Academy Chapter Q5.9. For t > 0, the voltage across the resistor is (a) (c) e t t e t t e sin t t t (b) e cos sin (c) t t e cos [GATE-008] Q5.40. An AC source of MS voltage 0V with internal impedance ZS = ( j ) Ω feeds a load of impedance Z = (7 4 j ) Ω in the figure below. The reactive power consumed by the load is (a) 8 VA L [GATE-009] (b) 6 VA (c) 8 VA (d) VA Q5.4. For parallel LC circuit, which one of the following statements is NOT correct? [GATE-00] (a) The bandwidth of the circuit deceases if is increased (b) The bandwidth of the circuit remains same if L is increased (c) At resonance, input impedance is a real quantity (d) At resonance, the magnitude of input impedance attains its minimum value Q5.4. The current in the circuit shown is: (a) j A [GATE-00] (b) (c) (d) J A 0 A 0 A iesacademy@yahoo.com Page-8 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

31 ndia s No ES Academy Chapter Answers with Explanation.. Ans.(b) For resonance = ωoleq ωoc Leq = L L M = = H ωo = = ; ωo = 4 f0 = Hz 4π.. Ans.(a) esponse of linear network = 4 e t When unit impulse applied ht () = 4e t f input is unit step then output is y(t) ( ) = H( s) U( s) y s 4 4 ys ( ) = = S s s s t yt () = e ut ().. Ans.(b) T T Teq = (Equivalent noise temp).4. Ans.(b) nput is impulse signal = δ () t According standard result V() t = Vi() t (for compensated network) V() t = () t δ.5. Ans.(a, d) elative to a given fixed tree of a network Link currents form an independent set Branch voltage form an independent set.6. Ans.(a) iesacademy@yahoo.com Page-9 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

32 ndia s No ES Academy Chapter Using KCL for cut-set, that means current entering and leaving a cut-set is equal to zero 0 5 = 0; = 0 5 = 7A Voltage across 5 Ω resistances = 7 5 = 05 V.7. Ans.(d).8. Ans.(a).M.S. value of rectangular pulse T ( ) 0 But, T T = T = V.9. Ans. (c).0. Ans. (c) = x t dt T = T V V V = = T T T T T T V dt ( V) dt 0 T T T T T T T By analysis it is found that diode in feedback and current flow through diode only due to voltage source. Applying KVL in loop (i) 0 V 4( ) 4 = 0 0 V 4 8 = 0 ( i) 0V A Applying KVL in loop (ii) 4 = 0; = ( ii) 4 8( ) ; = 0 = = A Ans.(b) t is balanced Wheatstone Bridge So, impendence across ab = = Ω.. Ans.(a) V = 0 V (it is parallel to 0 V source).. Ans.(d) Apply Thenvine theorem across AB iesacademy@yahoo.com Page-0 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

33 ndia s No ES Academy Chapter So calculation of VAB is not possible with network information, so (d) option is correct..4. Ans.(a).5. Ans.(b) V V - V A B 4V Note: 5V and 4V source in L.H.S. can be combining and net voltage is l V. Apply KVL in ABA loop 4 V = 0 V = V KCL at node P i i i = 0 i = i i i = 5 7 i = A.6. Ans.(b) Nodal method of circuit analysis is based on KCL and ohm s law.7. Ans.(c) n network number of independent loop = b n.8. Ans.(c) Adhg not a tree because it made a closed loop and in a tree close loop is not possible. a d g 4 h 5.9. Ans.(d) First we find bising of diode for that find voltage across AB Suppose VAB = V By super position theorem VAB = V That means diode in feedback 4V - V 0 A - B - V iesacademy@yahoo.com Page- 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

34 ndia s No ES Academy Chapter So, Apply KCL at node A VA 4 VA VA = 0 VA =, VA = VO, VO =.0. Ans.(a) Applying KVL 0 5 E = 0 E = 6 4V - V A B V V E - - V - 4V - 5V v 0V.. Ans.(d) By super-position theorem Case : Only current source is active (voltage source will be short circuit) then find current through Ω resistances. By current source conversion = 80 = 5A; 6 0 = 5 = A Case : By current source suppression only voltage source will be in active mode = 6 ; 6 = 4 80V Total current through Ω resistance = = = So, e 0 = = 8 V 7.. Ans.(c) Current through 4 Ω =A So, e0 = 4 = 4 V.. Ans.(b) Minimum number of equations required for analysis of network Number of equation = b n Where, n = number of nodes; b = number of branches in the question n = 4; b = 7 So number of equations required = 7 4 = iesacademy@yahoo.com Page- 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

35 ndia s No ES Academy Chapter.4. Ans.(b) Tree of network graph will not have any close loop..5. Ans.(c) V V a = = = b = 0 = 0 = 0 = 4 V Va Vb = 5 = 0.8V.6. Ans.(b) Total impedance Z = 5j j j 0j 0j = 9j.7. Ans.(c).8. Ans.(c) Energy delivers during talk time t= 600Sec t E = V dt; = A; V = t= t So, E = dt 0 00 E =.kj.9. Ans.(a) By superposition ( is current delivered by 0 V source), 0 =.5 A; = 0.5 A; = A; = OA; P = OW.. Ans.(a).. Ans.(b).. Ans.(b) Other than (more than one), impedance physically not possible.4. Ans.(c) nductor will be like as short circuit because voltage source is D.C. V So, current through =, current remains constant at V/.5. Ans.(b) 00V - - Vc F Vc Vc 40K F - After steady state C = Vc - Vc Vc 40K - c=f - 00 At steady state = ma 50k = So, Vc = 00 0 ma 0 = 80 V, but Vc = Vc Vc We know Vα C (by KVL) So voltage across will be higher than C By option checking only option B satisfy this condition Vc Vc = 80 V and Vc > Vc.6. Ans.(d) A reads current that flow through this in, half cycle (average value) avg m Vm = = = = for half cycle π 0π 0π π.7. Ans.(b) Current through A will be vector sum of current through A and A iesacademy@yahoo.com Page- 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

36 ndia s No ES Academy Chapter A A A = = 6 9 = 5 = 5A.8. Ans.(d) Voltage across inductor = v(t); Current flowing through inductor = vt () dt L at bt Applying KCL at middle node e e = v() t dt L at bt Differentiate both side L = H; v( t) = ae be.9. Ans.(c) At t = 0 inductor will like short circuit and.5a current flow through inductor at t = 0 V =.5 0 = 50V but Vx = V = 50 V.0. Ans.(d) KVL in loop (i) ( s) V ( s) ( s) ( s) sl 0 s sc = So, V ( s) sl ( s) sl = sc s SC - V S sl (s) (s) SC KVL in loop (ii) ( s) ( s) sl ( s) ( s) = 0; ( s) sl ( s) sl 0 sc sc = sl sl V sc ( s) s ( s) = sl sl o sc.. Ans.(a) At t 0 nductor behaves like open circuit and capacitor as short circuit V So, i ( t) =.. Ans.(b) iesacademy@yahoo.com Page-4 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

37 ndia s No ES Academy Chapter Ldi() t Vt () = it () it () dt dt C 0 Take laplace transform in both side s ( ) Vc ( o ) s ( ) Vs ( ) = s ( ) Lss ( ) Lo ( ) ; = s ( ) ss ( ) Cs s s s s s s ( ) = s s.. Ans.(d) Equivalent impedance Leq = L L M 6 4 Time constant of circuit T = eq.ceq = = 0 sec, but.4. Ans.(b) applied pulse duration is sec, so upto sec capacitor will become fully charge Vc = V and output voltage Vo = Vc = V.5. Ans.(a) mmediate after F.B. to.b. diode show, same resistance as in F.B. till all storage charge at junction not removed. So, for 0 < t ts, V will be 5V and after t > ts, V will be become Ans.(b) Method : We Know capacitor in unchanged capacitor behaves like short circuit and fully change condition behave like open circuit. So, in V0(t) function if we put t 4 V0(t) will be equal to = 0 = 8 Volt 5 So, by option checking method (b) option satisfy this condition only. Method : t V0 ( t) = V( ) V( ) V(0) e T V( ) = 8V; V(0) = 0V; T = eq Ceq ; eq = 4 = 0.8kΩ 6 Ceq = 4 = 5μf; T = = 4msec t/0.004 t/0.004 V0 () t = 8 (8 0) e = 8( e ).7. Ans.(a) s d V = L dt L 0.00s Take L transform both side V(s) = sl(s) L(o) By the initial condition L(o)= mv - (o) = (o) = 0.5 A mv So, (o) = 0.5 A.8. Ans.(b) At t = 0 when switch will close, inductor L will behaves like open circuit. Total voltage S S will drop across L di(0 ) di(0 ) SS SS = L = dt dt L.9. Ans.(d) Circuit is parallel LC Zs () = s 0.s 0.s iesacademy@yahoo.com Page-5 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

38 ndia s No ES Academy Chapter s 0.s 0 Ys ( ) = = Zs ( ) 0.s 0.s 0.s Ys ( ) = 5 s s Ys ( ) = Cs LS C = 5F, = Ω, L = 0.H.0. Ans.(a) - X 60V 0V - A Direction of current that flowing through 60 shown in figure Apply KCL at X = = ( i) Only option (a) can be satisfying this condition... Ans.(c) V ( 0 S ) = () i Vi ( S) sc Given in question L Vo ( S) slc L = = ( ii) Vi( S) L slc ( L ) slc Compare () i and ( ii) =.. Ans.(b) When switch on position for long time that means number of current will flow through circuit because capacitance become fully charged. C = (0.5 0.) (0.) μf = 0.6 μf eq Total potential across C = 00 V Now when switch turn to position b equivalent circuit diagram eq L - 6 Ceq = = V( o ) t 00 4 C t 80 it () = e ut () = e ut () 5 50t = 0 e u( t) ma.. Ans.(a) Take Laplace in both side and put initial conditions, then solve..4. Ans.(a) iesacademy@yahoo.com Page-6 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

39 ndia s No ES Academy Chapter ( ) So, i 0 = 0.75A L But at t = 0, switch is closed and il(0 ) = il(0 ) = 0.75 A So, value of it ( ) at t = 0 = = 0.75A and at t =, value of i( t).5 will be it ( = ) = = 0.5A Because 5 mh, inductor will be short circuited. These conditions are full-filled only in option (a)... Ans.(a) V = Z Z ; V = Z Z V = ; V = 6 V V = 8 V V = 8 - V V.. Ans.(d) Transmission parameters will be multiplied... Ans.(b, c) Y = Y ; h = h.4. Ans.(a).5. Ans.(b) 0 Y = Y y 0 { } So, network is non-reciprocal because Y is negative that mean either energy storing or providing device available, so network is active also..6. Ans.(a).7. Ans.(c) V h h ; where,, = = = h h V { V h h V h h V } if V = 0; = h ( i) Applying KVL in.h.s. = = = ( ) 0; 0; iesacademy@yahoo.com Page-7 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

40 ndia s No ES Academy Chapter.8. Ans.(c) KVL in loop (ii) Z () Z E = i at i = 0 Apply KVL in loop i E i 4i 0E = 0; E = 6i E i E = i 6 = = Z at i = E 4i 0E = 0; E = i; E 4i i = 0 6 E 6 E = i ; = = Z i t is π network y y y y y Y = y y y y y z z z = z z z Y = = = 0.05 z 0.9. Ans.(a) By Δ to Y Ω = = = Ω 4 4 Ω = = = Ω 4 4 = = Ω 4 z z z Z = = z z z Please check above figure iesacademy@yahoo.com Page-8 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

41 ndia s No ES Academy Chapter.0. Ans.(d) Given circuit is lattice network So, Z parameters (according standard result) Za Zb Za Zb j j Z = = Za Zb Za Z b j j.. Ans.(d) V V - - V = h h V ; = h h V V if V = 0; = h and = h V - = ; = = h ; V = 0 V = 0 = h ; h = 0; h = Note: Only option d satisfy this values we can solve for h and h by making = 0... Ans.(b).. Ans.(d) V n = n = = V V = nv V A B V = C D But according the question A B n o C D = o x A = n, B = o, C = o, D = x So, ; ; ; ( ) V = AV = D = D = D = = X n n V A B V = C D V = AV B i () ( ) = CV D ii i Two-port is terminated by L L ( ) V = iii V AV B AL B AL B = = = = input impedance CV D C D C D L L iesacademy@yahoo.com Page-9 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

42 ndia s No ES Academy Chapter.4. Ans.(c) V = Z Z ; V = Z Z ; Z V 4.5 = / = = 4.5 = 0 V.5 V 6 V 6 Z = / = =.5; Z = / = =.5; Z = / = = = 0 = 0 = So z parameter matrix = Ans.(a) V = h h V ; = h h V V 4.5 V () i h = / = = ; ( ii) h = / = = ( iii) h = 0 = 0 V V V = Z V = Z Z = 0; = Z Z V ZZ V = Z Z = Z = h =.5 = Z Z.5 Z.5 ( iv) h = / V = 0 = = = ; h = Z Ans.(a) Y = = 4; Y = Y = ; Y = = Ans.(c) According maximum power transfer theorem 4.. Ans.(b) amp voltage = 00t Output of C differentiating circuit dvi () t = C = dt Ans.(a) th across A.B for th voltage source become S.C. and circuit will like as th = = = 4 kω 9 8 A 0 0 volts = = B So, value of should be equal to th, according maximum power transfer theorem Ans.(d) Leq = L L ± K LL = ± 0. = ± 0. =.8 or Ans.(a) Super position theorem application only for linear and bidirectional element. iesacademy@yahoo.com Page-40 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

43 ndia s No ES Academy Chapter 4.6. Ans.(d) = = Ω ; = =.5 Ω ; = = 9Ω Ans.(c) For maximum power transfer value of should be conjugate symmetric with impedance of circuit (according maximum power transfer theorem) in circuit only resistance the should be equal to require of circuit after removing, for that find th across. Terminal (Voltage source = ss.c and Current source = open circuit) th 5 0 = 4 = 8 Ω 5 So, = 8Ω 4.8. Ans.(a) Voltage across xy = 00 0 x By voltage division rule th 4 j V = 00 0 = j6( 4 j) j -j6 j4 j Ans.(c) By reciprocity theorem position and value of excitation change and double respectively so current will be double in magnitude, direction of source change so direction of current also will change Ans.(a) mpedance of each branch of Wye-circuit = Z Z Z = Z 4.. Ans.(a) For maximum power delivered to L calculate th across L terminal connect voltage source V across AB and current provided by V is then V th ; = y A V TH B th KCL at A V V 0.5 = V V V V = ; = = V V 80 = = 6 Ω 5 So, should be = 6Ω L A 4.. Ans.(a) iesacademy@yahoo.com Page-4 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

44 ndia s No ES Academy Chapter 4.. Ans.(c) VAB = 6 VAB 5 = Ω ; = Ω 6 Zs = Z L Note: Load impedance should be conjugated symmetric with source impedance, for maximum power transfer Ans.(b) Apply KCL at node a th th V V 0 = 5 5 A th - V = 7.5 V For th calculation make independent current source open, and independent th voltage source short circuit, and ab = 5 5 =.5 Ω dependent source will not change Ans.(c) For maximum power transfer L = S V V 0 0 P = or = = 0.5 W 4 4s 4 00 L 4.6. Ans.(d) For maximum power transfer from the source to the load impedance, load impedance should be complex conjugate of the source impedance. So, if source impedance ZS = S jxs, then = S jxs Ans.(d) Apply KCL at X th th th V V V i = th V th But i =, So V = 4 volt th sc = A (if we short xy, V = 0) th th V 4 th th So, = = = Ω and V = 4 volt, = Ω sc i A i /6 6 A / { } 6 /6 B / x Y V Th 4.8. Ans.(a) iesacademy@yahoo.com Page-4 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

45 ndia s No ES Academy Chapter 4.9. Ans.(c) ndependent voltage source will become short circuit, and independent current source will become open circuit For Pmax th Z = ( s ) s = s L = eq Apply Thenvin Theorem. Apply KVL in aba 4( ) VX VX 4 = = 0 = Again apply KVL in aba loop = 4 4 = 8 = 8 = eq = 4Ω 5. Sinusoidal Steady State Analysis, esonance, Power in AC Circuits, Passive Filters 5.. Ans.(d) 5.. Ans.(a) n series LC high Q circuit, the current peaks at a frequency equal to the resonant frequency because at this condition circuit impedance minimum and current maximum. V 5.. Ans.(c) Driving-point function is or V ; V = driving-point impedance function V = driving-point admittance function by analysis V is equal for N and N Ans.(b, d) According to phasor diagram current is leading to voltage. So, net behavior of circuit is capacitive. So, operating frequency < esonant frequency. Q s 5.5. Ans.(c) A = A A 5.6. Ans.(c) For over-damped multiple poles on the negative real axis. iesacademy@yahoo.com Page-4 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

46 ndia s No ES Academy Chapter 5.7. Ans.(d) A series L C circuit = 0 Ω, XL = 0 Ω, XC = 0Ω circuit in resonance. So, 00 current flowing in circuit = = 0 A rms voltage across capacitor = 0 0 = 400, but voltage is lagging to current. So, voltage across c = Ans.(a) A series L C circuit has Q = 00; Z = 00 j0 =, 7 7 ωol 0 L - ωo = 0 rad/sec; = 00 Ω ; Qo = Qo = 00 = ; L = Ans.(c) Current through resistance it ( ) = 4sin(00t 45 ) 4sin(00t 60 ).M.S. value fo current = i rms i rms i rms where, i = ; i = 4sin(00t 45 ); i = 4sin(00t 60) 4 4 irms = ; irms = ; irms = irms = = 5A Power dissipated in circuit = i rms = 5 0 = 50 W 5.0. Ans.(b) Energy store in C = CV = CV total energy provide by source = times CV energy stores in capacitor required ration = = = 0.5. CV 5.. Ans.(c) mpedance offered by C = = ; wc o. = impedance offered by C L = ωl = ol. = 0. So, DC voltage drop entirely across = C. 5.. Ans.(b) 5.. Ans.(b) Applying KVL in closed loop circuit 0 = 4 it ( ) it ( ) dt c Take Laplace in both side 0 s ( ) V(0 ) = 4 s ( ) S S s 0 8S 6 8S 4 8 = s ( ) s ( ) s ( ) S S S S = = S 8S t/8 it () = e Energy absorbed by the 4 Ω resistor in (o, ) interval iesacademy@yahoo.com Page-44 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

47 ndia s No ES Academy Chapter t/4 t/8 t/8 e W = i ( t) dt = e 4 dt 4 e 4 dt 4 6[0 ] 6 jouls 0 = 0 = = = Ans.(a) At frequency of resonance the network represent a resistive network, input voltage and current are in phase; input admittance has minimum value so, that input impedance has maximum value current drawn by network from mains has minimum value. = V ωc ; but ωc 0; V ( ) i ωl = = ωl Current through inductor = V, jωl because current in lagging with voltage. So, < ; Similiary > and < 5.5. Ans.(a) Method : Em cosωt i( t) = { at ω = 0} jωc Em i () t = = 0 { at ω = } n this condition we can find only maximum possible value by case limitation. Em i () t i( t) = ; = 90 at ω = 0 i () t = 0 at ω = By option checking only option (a) satisfy both conditions. L C Method : 0 Em L i Em Em cos ωt i () t = jωc Em ωc 90 tan ωc ω C at ω 0; i ( t) = 0, i( t) = 90 E at ω ; i ( t) = i( t) = Ans.(d) n star connection total power supplied = V cos θ or V cosθ VL VL. cosθ = 500 Z L VL cos θ ; VL 400V P P L L ZL = = ZL = = 90Ω 500 Power factor is positive, so load will be capacitive and θ = ve value θ = cos (0.844) =.44 ; = Z L iesacademy@yahoo.com Page-45 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,

48 ndia s No ES Academy Chapter 5.7. Ans.(a) 5.8. Ans.(c) Applying KVL V 0 V 5 5 = 0 V = 0V; = 0 = V 0 That means current flow in 5 Ω resistor only due to dependent source = 5 5 = So, power delivered dependent source = = 6 5 = 80 W. nput voltage Vt ( ) = 0 cos( t 0) 0 5 cos(t 0) V; Z= jω = jω = jω Steady state current it () =? V( t) 0 cos( t 0) 0 5 cos(t 0) 0 cos( t 0) 0 5 cos(t 0) it () = = = Z jω jω j j 0 cos( t 0) 0 5cos(t 0) = = 0cos( t 5) 0cos( t 0 tan ) 45 5 tan () 4A Ans.(*) ncomplete question (value of L is not given) 5.0. Ans.(c) Ldi() t Vt () = it () it () dt dt C di( t) di( t) d i( t) sint = () i t i() t dt; cost i() t dt = dt dt 5.. Ans.(b) f0 Q =, f0 = B. ω π LC L Q = C Bω = for series ( LC) L Q 00 f, L, C all element doubled them Q' = = = Ans.(d) (i) At resonant frequency impedance of series LC circuit is purely resistive 5.. Ans.(d) 5.4. Ans.(b) (ii) For parallel LC circuit Q = C C = G Q L G L { if them } So, S and S both statements are wrong. 6 VC( s) = SC = ( ) = LC V = s S LC SL S 0 S 0 SL S S SC L LC iesacademy@yahoo.com Page-46 5, st Floor, Jia Sarai, Near T. New Delhi-6 Ph: ,