Digital Electronics. Part A
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1 Digital Electronics Final Examination Part A Winter Student Name: Date: lass Period: Total Points:
2 Multiple hoice Directions: Select the letter of the response which best completes the item or answers the question. 1. The resistance of a resistor with the color code bands GREEN-BLUE-ELLOW- SILVER is : A. 564 Ω (±10) K Ω (±10) B. 560 K Ω (±10) D. 220 Ω (±10) 2. A technician obtained a multi-meter reading of amps. How would this number be represented in engineering notation? A. 3.5 mamps µamps B. 3.5 µamps D. 3.5 Amps 3. A 150 KΩ resistor in a parallel circuit has a voltage drop across it of 6 Volts. What is the current flowing through the resistor? A. 4 mamps. 25,000 Amps B. 40 µamps D Amps 4. What is the total resistance of the following resistor network? R1 560 R total R2 180 R3 2.2K R4 2.2K A. 5,140 Ω Ω B. 4,960 Ω D. 1,840 Ω Page 2 of 15
3 5. What is the period of the square wave shown below? 5 volts 10 msec A. 35 volts. 50 msec B. 40 % D. 20 Hz 6. What is the hexadecimal equivalent to the base ten number 59 10? A. 3B H. A9 H B. 89 H D. 5F H 7. What is the binary equivalent to the base ten number 67 10? A B D What is the base ten equivalent to the hexadecimal number A7 H? A B D What is the hexadecimal equivalent to the binary number ? A. 53 H. A H B. 37 H D. 3B H Page 3 of 15
4 10. The truth-table shown below represents which of the following gates? A.. B. D. 11. The gate shown below is represented by which of the following truth-tables? A B D Page 4 of 15
5 12. The truth-table shown below represents which of the following gates? A.. B. D. 13. The gate shown below is represented by which of the following truth-tables? A B D Page 5 of 15
6 14. For the logic circuit shown below, what is the simplest Boolean expression for F 14? A B F14 A. F 14 = + B. F 14 = B + + B. F 14 = (A + B)(B + ) D. = + B F Which circuit(s) implement(s) the Boolean expression for F 15? F 15 = + B A. A. B F15 A B F15 B. A B F15 D. ALL OF THE ABOVE Page 6 of 15
7 16. What is the simplest Boolean equation for the truth-table shown? F A. F 16 = + B. = + + B. F 16 = + B D. NONE OF THE ABOVE F Which of the following is the simplified Boolean equation for the expression shown? F 17 = A. F 17 = + +. = + B. F 17 = + D. NONE OF THE ABOVE F Which of the following is the simplified Boolean equation for the expression shown? F 18 = () +(B + ) A. F 18 = ()(B + ). = () + (B + ) B. F 18 = D. NONE OF THE ABOVE F 18 Page 7 of 15
8 19. Which of the following K-Maps is set-up correctly for the truth table given? F A B D. NONE OF THE ABOVE Which of the following is the simplest Boolean equation for the K-Map shown? W W W W x A. F 20 = W + W +. = + W B. F 20 = W + W D. NONE OF THE ABO F 20 VE Page 8 of 15
9 21. Which of the following is an advantage of using a Programmable Logic Device? A. Design changes are easier with PLD s than other logic gates. B. PLD s require no manual Boolean simplification.. Designs made with PLD s typically cost less than designs made with other logic gates. D. ALL OF THE ABOVE 22. What number or letter will be displayed on the common-anode seven segment display shown below? 5V V+ 5V abcdefg. A. P. E B. 3 D The gate shown below is represented by which of the following truth-tables? A B D Page 9 of 15
10 24. What is the two s complement of the binary number ? A B D. NONE OF THE ABOVE 25. What is the one s complement of the binary number ? A B D. NONE OF THE ABOVE 26. Which of the following circuits is a half-adder? A.. B. D. 27. Which of the following conditions will cause the output () to stay high? D S P R 74LS74 _ A. S = 1 & R = 1. D = 1 B. S = 1 & R = 0 D. S = 0 & R = 1 Page 10 of 15
11 28. For the D Flip-Flip shown below, identify the correct waveform for signal UE. SET DATA LOK S D P R _ UE RESET LOK SET RESET DATA A B A. A. B. B D. NONE OF THE ABOVE 29. If the output () for the J-K flip-flop shown below is currently a logic 0, what condition(s) will cause the output to change to a 1 on the falling edge of the P input? 5V S J P K R 74LS76 _ A. J = 0 & K = 0. J = 0 & K = 1 B. J = 1 & K = 0 D. NONE OF THE ABOVE Page 11 of 15
12 30. For the J-K Flip-Flip shown below, identify the correct waveform for signal UE. SET J LOK K S J P K R _ UE RESET LOK SET RESET J K A B A. A. B. B D. NONE OF THE ABOVE 31. In order for a change to occur on the output of a positive-edge triggered flip-flop, what condition needs to be present on the LOK input? A. Anytime the clock is a one.. A zero-to-one transition. B. Anytime the clock is a zero. D. A one-to-zero transition. Page 12 of 15
13 32. Which of the following is a classification of Shift Registers? A. Serial In Parallel Out. Parallel In Serial Out B. Serial In Serial Out D. All the above (a, b, & c) 33. Which of the following is a true statement about asynchronous counters? A. All the flip flops in an asynchronous counter s design are clocked by the same external clock. B. Asynchronous counters are faster than synchronous counters.. J-K flip flops are the only type of flip flop that can be used to design an asynchronous counter. D. Asynchronous counters are also known as ripple counters. 34. What is the count range of the 3-bit asynchronous shown below? V LOK S J P K R _ S J P K R _ S J P K R _ A. 2 to 3. 2 to 5 B. 2 to 6 D. NONE OF THE ABOVE Page 13 of 15
14 35. Which of the following is a true statement about synchronous counters? A. All the flip flops in a synchronous counter s design are clocked by the same external clock. B. Synchronous counters are slower than asynchronous counters.. D flip flops are the only type of flip flop that can be used to design a synchronous counter. D. Synchronous counters are also known as ripple counters. 36. What is the count range of the 4-bit synchronous shown below? 5V LOK 74LS163 EP MR ET P PE T D3 3 D2 2 D1 1 D A. 0 to to 10 B. 3 to 5 D. NONE OF THE ABOVE 37. In comparing TTL & MOS logic gates, which of the following statements is true? A. MOS logic gates have a lower power consumption than TTL logic gates. B. TTL logic gates have a higher noise margin than MOS logic gates.. TTL logic gates have a lower power consumption than the MOS logic gates. D. MOS logic gates have a lower noise margin than TTL logic gates. Page 14 of 15
15 38. The two most popular logic families for digital I s are called : A. MOS and EL. TTL and MOS B. RTL and MOS D. TTL and DTL 39. Given the input/output current specifications for a 7404 and 74LS04 Inverters shown below, calculate the maximum number of 74LS04 s that can be driven by the one 7404 as shown below LS04 74LS04 74LS04 Output urrent Specifications 7404 Input urrent Specifications I OH = mamps I IH = 15 uamps I OL = 6.0 mamps I IL = mamps 74LS04 74LS04 Output urrent Input urrent Specifications Specifications I OH = mamps I IH = 20 uamps I OL = 4.0 mamps I IL = mamps A B. 16 D. Unlimited 40. The Switching haracteristics section from a 74ALS08 s data sheet is shown below. For this device, what is its worst-case propagation delay? A. 4 nsec. 14 nsec B. 3 nsec D. 10 nsec Page 15 of 15
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