# Lecture 22 Field-Effect Devices: The MOS Capacitor

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1 Lecture 22 Field-Effect Devices: The MOS Capacitor F. Cerrina Electrical and Computer Engineering University of Wisconsin Madison Click here for link to F.C. homepage Spring Madison, 1999-II

2 Topics Quantitative relations between gate voltage V G and MOS carriers Focus is on semiconductor potential 1 Madison, 1999-II

3 MOS Capacitor The field effect is implemented using: A gate electrode A silicon oxide dielectric insulator A semiconductor electrode A voltage applied on the gate controls the charge in the semiconductor The voltage is distributed part on the oxide and part on the semiconductor (series capacitors) 2 Madison, 1999-II

4 MOS Band Structure In equilibrium E F must be constant The gap of the oxide is much larger than that of the semiconductor Flat bands model: at V G = 0 there is no band bending What happens if we apply a voltage? No current flowing: E F remains defined Difference between E F is equal to qv G Define Surface Potential ψ S 3 Madison, 1999-II

5 Charging of the MOS capacitor The bias voltage shifts up and down the bulk E i. At the surface the band edges cannot move. Band bending makes the bands stretchable Assuming flat bands for V G =0,n-type material (Fig. 16.6) V G = 0, nothing happens V G > 0, electrons are attracted under the gate Accumulation V G < 0, electrons are repelled, i.e., holes are attracted; bands curve upward because E F must get closer to E V, Depletion V G = V i semiconductor becomes intrinsic under the gate V G = V T semiconductor begins to reverse type, n = p. At this voltage (threshold voltage) the material becomes artificially n-type Threshold V G >V T semiconducotr is n-type, n>p, under the gate. Inversion The gate voltage controls the semiconductor polarity! Also case of n-type, Fig Madison, 1999-II

6 MOS Capacitor II Define bulk and surface potentials: ψ = 1 q (E i E f ) ψ s = 1 q (E i(bulk) E i (surface)) The sign must be considered carefully and is sometimes used incorrectly in books; ψ < 0 for n-type, ψ > 0 for p-type The surface potential ψ s is the change in potential from bulk to surface, while the bulk potential is the change in potential from doped to intrinsic Cfr. Fig Madison, 1999-II

7 MOS Band Structure As usual carrier density is defined by universal relation: At the surface we can write: n = n i e (E f E i )/kt = ni e qψ/kt E F E i (s) =E F E i (B)+E i (B) E i (s) ψ = ψ bulk + ψ s n = n i e q [ kt ( ψ bulk+ψ s ) = n i e q ] kt ψ bulk e + q kt ψ s n(surface) =n p0 e + q kt ψ s p(surface) =p p0 e q kt ψ s This relation is the central relation in the operation of the MOS 6 Madison, 1999-II

8 Charging of the MOS Consider a p-type bulk. Hence ψ B =(E i E f )/q > 0. We can distinguish: ψ s > 0 Accumulation of holes (bands bend up) ψ s = 0 Flat bands ψ B >ψ s > 0 Depletion (bands bend down) ψ s = ψ B Intrinsic surface (bands bend down) ψ s >ψ B Inversion (bands bend down) (-) Accumulation 0 Depletion V T Inversion (+) For ψ s =2ψ B we have the transition from depletion to inversion Consider Example Madison, 1999-II

9 Delta-depletion Solution The main problem is how to find ψ s (V G ) Voltage is divided between depletion layer and oxide: V G = ψ S + V oxide Q metal = Q Semiconductor V ox C o = C S ψ S V ox = ψ s C S C o W (ψ) = 2Ks ɛ 0 qn A ψ S, C(ψ S )= K Sɛ 0 W (ψ) V G = ψ S + K S K o x o 2qNA K S ɛ 0 ψ s Given V G it is easy to compute ψ S 8 Madison, 1999-II

10 Charge stages Before Inversion: In this stage the gate voltage V G directly affects the width of the depletion layer: No channel of free charge Lateral conduction not possible Variable depletion layer After Inversion: At the surface a thin layer of free carriers is formed. Further increase in V G increase the amount of free carriers rather than the depletion layer width Channel of free charge Lateral conduction possible Fixed width of the depletion layer 9 Madison, 1999-II

11 Conclusions The band structure of the MOS capacitor is controlled by the gate voltage Carrier concentration determined by surface potential 10 Madison, 1999-II

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