# EE40 KVL KCL. Prof. Nathan Cheung 09/01/2009. Reading: Hambley Chapter 1

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1 EE40 KVL KCL Prof. Nathan Cheung 09/01/2009 Reading: Hambley Chapter 1 Slide 1

2 Terminology: Nodes and Branches Node: A point where two or more circuit elements are connected Branch: A path that connects two nodes Slide 2

3 Terminology: Nodes and Branches Slide 3

4 Notation: Node and Branch Voltages Use one node as the reference (the common or ground node) label it with a symbol The voltage drop from node x to the reference node is called the node voltage v x. The voltage across a circuit element is defined as the difference between the node voltages at its terminals Example: + v a _ a +_ c v 1 + v s R 1 Slide 4 b R 2 + v b _ REFERENCE NODE

5 Circuit Loops A loop is formed by tracing a closed path in a circuit through selected basic circuit elements without passing through any intermediate node more than once. Below are marked loops 1, 2, and 3: + v a 3 v v b - v v c Slide 5

6 Short Circuit and Open Circuit Wire ( short circuit ): R = 0 no voltage difference exists (all points on the wire are at the same potential) Current can flow, as determined by the circuit Gap ( open circuit ): R = no current flows Voltage difference can exist, as determined by the circuit Slide 6

7 Kirchhoff s Laws Kirchhoff s Current Law (KCL): The algebraic sum of all the currents entering any node in a circuit equals zero. Kirchhoff s Voltage Law (KVL): The algebraic sum of all the voltages around any loop in a circuit equals zero. Gustav Robert Kirchhoff Slide 7

8 Using Kirchhoff s Current Law (KCL) Consider a node connecting several branches: i 2 i 3 i 1 i 4 Use reference directions to determine whether currents are entering or leaving the node with no concern about actual current directions Slide 8

9 KCL Example KCL: Node 1: I 1 I 3 + I 5 = 0 Node 2: I 1 I = 0 Node 3: 2 I 4 + I 6 = 0 Node 4: 5 I 5 I 6 = 0 Node 5: I 3 + I 4 + I = 0 Slide 9

10 Formulations of Kirchhoff s Current Law (Charge stored in node is zero.) Formulation 1: Sum of currents entering node = sum of currents leaving node Formulation 2: Algebraic sum of currents entering node = 0 Currents leaving are included with a minus sign. Formulation 3: Algebraic sum of currents leaving node = 0 Currents entering are included with a minus sign. Slide 10

11 A Major Implication of KCL KCL tells us that all of the elements in a single branch carry the same current. We say these elements are connected in series. Current entering node = Current leaving node i 1 = i 2 Slide 11

12 Generalization of KCL The sum of currents entering/leaving a closed surface is zero. Circuit branches can be inside this surface, i.e. the surface can enclose more than one node! i 2 i 3 This could be a big chunk of a circuit, e.g. a black box i 1 i 4 Slide 12

13 Generalized KCL Examples 50 ma 5µA i 2µA i i = 50mA i = 7µA Slide 13

14 Impossible Circuit This circuit violates KCL Slide 14

15 Using Kirchhoff s Voltage Law (KVL) Consider a branch which forms part of a loop: loop + v 1 _ loop v 2 + Moving from + to - We add v 1 Moving from - to + We subtract v 2 Use reference polarities to determine whether a voltage is dropped No concern about actual voltage polarities Slide 15

16 Using Kirchhoff s Voltage Law (KVL) Consider the following mesh: KVL: 4 + V 1 V V 3 V 4 = 0 Slide 16

17 Formulations of Kirchhoff s Voltage Law (Conservation of energy) Formulation 1: Sum of voltage drops around loop = sum of voltage rises around loop Formulation 2: Algebraic sum of voltage drops around loop = 0 Voltage rises are included with a minus sign. (Handy trick: Look at the first sign you encounter on each element when tracing the loop.) Formulation 3: Algebraic sum of voltage rises around loop = 0 Voltage drops are included with a minus sign. Slide 17

18 A Major Implication of KVL KVL tells us that any set of elements which are connected at both ends carry the same voltage. We say these elements are connected in parallel. + v a_ + v b _ Applying KVL in the clockwise direction, starting at the top: v b v a = 0 v b = v a Slide 18

19 Summary An electrical system can be modeled by an electric circuit (combination of paths, each containing 1 or more circuit elements) Lumped model The Current versus voltage characteristics (I-V plot) is a universal means of describing a circuit element. Kirchhoff s current law (KCL) states that the algebraic sum of all currents at any node in a circuit equals zero. Comes from conservation of charge Kirchhoff s voltage law (KVL) states that the algebraic sum of all voltages around any closed path in a circuit equals zero. Comes from conservation of potential energy Slide 19

20 Tips for KCL, KVL Find one formulation which works for you and stick with it. KCL: KVL: Algebraic sum of currents leaving node = 0 Currents entering are included with a minus sign. Algebraic sum of voltage drops around loop = 0 Voltage rises are included with a minus sign. Slide 20

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