Lecture 18. Common Source Stage

Transcription

1 ecture 8 OUTINE Basic MOSFET amplifier MOSFET biasing MOSFET current sources Common source amplifier eading: Chap EE05 Spring 008 ecture 8, Slide Prof. Wu, UC Berkeley Common Source Stage λ = 0 A = g A = m μ C n EE05 Spring 008 ecture 8, Slide Prof. Wu, UC Berkeley ox W I EE05 Fall 007

2 Operation in Saturation Condition for M in saturation V > V V out in TH ( ) V I > V V GS TH In order to maintain operation in saturation, V out cannot fall below V in by more than one threshold oltage. The condition aboe ensures operation in saturation. EE05 Spring 008 ecture 8, Slide 3 Prof. Wu, UC Berkeley CS Stage with λ=0 A = gg in out = = EE05 Spring 008 ecture 8, Slide 4 Prof. Wu, UC Berkeley m EE05 Fall 007

3 CS Stage with λ 0 in m ( r ) A = g out = = r Howeer, channel length modulation leads to finite output resistance, r o, which is in parallel with the load resistance, EE05 Spring 008 ecture 8, Slide 5 Prof. Wu, UC Berkeley O O CS Gain Variation with Channel ength A = μ C n λ I ox W μ nc I ox W Since λ is inersely proportional to, the intrinsic oltage gain actually becomes proportional to the square root of. EE05 Spring 008 ecture 8, Slide 6 Prof. Wu, UC Berkeley EE05 Fall 007 3

4 MOS Biasing V = VGS + IS + W I = μ C V V ( ) n ox GS TH unknows ( V, I ), equations GS V V = ( V V ) + V + V V V = W μn Cox S GS TH TH + Voltage at X is determined by V,, and. V GS can be found using the equation aboe, and I can be found by using the NMOS current equation. EE05 Spring 008 ecture 8, Slide 7 Prof. Wu, UC Berkeley Self Biased MOS Stage I + V GS + S I = V W I = μ C V V ( ) n ox GS TH The circuit aboe is analyzed by noting M is in saturation and no potential drop appears across G. EE05 Spring 008 ecture 8, Slide 8 Prof. Wu, UC Berkeley EE05 Fall 007 4

5 Current Sources When in saturation region, a MOSFET behaes as a current source. NMOS draws current from a point to ground (sinks current), whereas PMOS draws current from V to a point (sources current). EE05 Spring 008 ecture 8, Slide 9 Prof. Wu, UC Berkeley CS Stage with Current Source oad A out = g = r m ( r r ) r O O O To alleiate the headroom problem, an actie current source load is used. This is adantageous because a current source has a high output resistance and can tolerate a small oltage drop across it. EE05 Spring 008 ecture 8, Slide 0 Prof. Wu, UC Berkeley O EE05 Fall 007 5

6 PMOS CS Stage with NMOS as oad A = g ( r r ) m O O Similarly, with PMOS as input stage and NMOS as the load, the oltage gain is the same as before. EE05 Spring 008 ecture 8, Slide Prof. Wu, UC Berkeley CS Stage with iode Connected oad A = gm ro ro gm W / A = gm = g W / ( ) ( ) m ower gain, but less dependent on process parameters. EE05 Spring 008 ecture 8, Slide Prof. Wu, UC Berkeley EE05 Fall 007 6

7 CS Stage with iode Connected PMOS eice A = g m ro ro g m Note that PMOS circuit symbol is usually drawn with the source on top of the drain. EE05 Spring 008 ecture 8, Slide 3 Prof. Wu, UC Berkeley CS Stage with egeneration A = + gm λ = 0 Similar to bipolar counterpart, when a CS stage is degenerated, its gain, I/O impedances, and linearity change. S EE05 Spring 008 ecture 8, Slide 4 Prof. Wu, UC Berkeley EE05 Fall 007 7

8 Example of CS Stage with egeneration A = + g g m m A diode connected deice degenerates a CS stage. EE05 Spring 008 ecture 8, Slide 5 Prof. Wu, UC Berkeley CS Stage with Gate esistance V G = 0 Since at low frequencies, the gate conducts no current, gate resistance does not affect the gain or I/O impedances. EE05 Spring 008 ecture 8, Slide 6 Prof. Wu, UC Berkeley EE05 Fall 007 8

9 Output Impedance of CS Stage with egeneration r g r + r out m O S O Similar to the bipolar counterpart, degeneration boosts output impedance. EE05 Spring 008 ecture 8, Slide 7 Prof. Wu, UC Berkeley Output Impedance Example (I) = r + g out O m g m When /g m is parallel with r O, we often just consider /g m EE05 Spring 008 ecture 8, Slide 8 Prof. Wu, UC Berkeley EE05 Fall 007 9

10 Output Impedance Example (II) g r r + r out m O O O In this example, the impedance that degenerates the CS stage is r O, instead of /g m in the preious example. EE05 Spring 008 ecture 8, Slide 9 Prof. Wu, UC Berkeley CS Core with Biasing A =, A = g m G + + S g m egeneration is used to stabilize bias point, and a bypass capacitor can be used to obtain a larger small signal oltage gain at the frequency of interest. EE05 Spring 008 ecture 8, Slide 0 Prof. Wu, UC Berkeley EE05 Fall 007 0