EE C128 / ME C134 Fall 2014 HW 8  Solutions. HW 8  Solutions


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1 EE C28 / ME C34 Fall 24 HW 8  Solutions HW 8  Solutions. Transient Response Design via Gain Adjustment For a transfer function G(s) = in negative feedback, find the gain to yield a 5% s(s+2)(s+85) overshoot in the transient response for a step input. We will use the design procedure described in.2 of Nise. (a) First set the gain so that the magnitude plot is db at ω =. Answer: ( pt) = 72 For db at ω =, G(j) = j(j + 2)(j + 85) =, so = j(j + 2)(j + 85) = 72. (b) Determine the required phase margin to achieve the desired overshoot. Answer: ( pt) Φ M = 53 For %OS = 5%, ζ = ln.5 π 2 + ln 2.5 =.569 Using this damping ratio, we can obtain the desired phase margin Φ M = tan 2ζ 2ζ ζ 4 = 53 (c) What frequency on the Bode phase diagram yields this phase margin? Answer: ( pt) ω P M =.2 rad/s The phase which yields this phase margin is φ = 8 + Φ M = 27. Dragging the cursor on the Bode plot we find the phase is 27 when ω =.2 rad/s. 5 Bode Diagram System: untitled :.2 : (d) Find the adjusted gain necessary to produce the required phase margin. Answer: ( pt) = 22 We achieve the desired phase margin by shifting the magnitude at ω P M =.2 to db. This of 8
2 EE C28 / ME C34 Fall 24 HW 8  Solutions can be done by chaning the gain. db = 22log G(jω P M ) = G(jω P M ) = / G(jω P M ) = 2.93 Thus the adjusted gain is = 22. (e) Plot the step response of the compensated system. Did you meet the design specifications? Answer: ( pt).4 Step Response The overshoot is 4.5%, so we have met the design specifications. 2. Lag Compensation Design For a transfer function G(s) = s(s+2)(s+85) in negative feedback, design a lag compensator to reduce the steadystate error for a ramp input by a factor of while maintaining a 5% overshoot in the transient response for a step input. We will use the design procedure described in.3. (a) Determine the steady state error of the gainadjusted system designed in Problem. Answer: ( pt).772 (b) (c) e ramp ss = lim s sg(s) = (2)(85) 22 =.772. Find a gain to satisfy the steadystate specification and plot the Bode plot in MATLAB for this gain. Answer: ( pt) 22 We want e ramp ss =.772. But e ramp ss = (2)(85), so = 22. Determine the phase margin to achieve the desired overshoot. Find the frequency where the phase margin is greater than this phase margin. Why do we increase the phase margin above the desired margin when designing a lag compensator? 2 of 8
3 EE C28 / ME C34 Fall 24 HW 8  Solutions Answer: (3 pts) Φ M = 53, ω 7.85 rad/s at Φ M = 63. We increase the phase margin to account for the phase of the lag compensator. The desired phase margin depends only on the desired overshoot, so the answer as the same as in Problem (b). From the Bode plot, we find that the frequency at phase φ = = 7 is ω 7.85 rad/s. 5 Bode Diagram System: untitled : 7.85 : (d) Using the method described in step 3 of the design procedure in.3, design a lag compensator to achieve db at this frequency..66(s +.785) Answer: (4 pts) G C (s) = s +.57 The magnitude at ω 7.85 rad/s is 2 log G(j7.85) = db. Then to shift the magnitude to db at this frequency we design the lag compensator to have highfrequency asymptote at db, and lowfrequency asymptote at db. We set the upper break frequency to decade below ω = 7.85, that is at ω up =.785. The difference between the upper and lower break points is db dec 2 db ω = =.57. So the compensator has the form G c(s) = c(s +.785) s +.57 this to be db for low frequency, G c (s = ) = G c (s) =.66(s +.785). s +.57 =.8 dec, so the lower break frequency is at c (.785).57. Since we want =. So the lag copmensator is 3 of 8
4 EE C28 / ME C34 Fall 24 HW 8  Solutions Bode diagram of compensator (e) Did you meet the design specifications? Include relevant plots. Answer: ( pt) Ramp response After t = 2 s the error is y(t) t.772, within the design specifications. 4 of 8
5 EE C28 / ME C34 Fall 24 HW 8  Solutions Step response The overshoot is 4 %. 3. Lead Compensation Design For a transfer function G(s) = s(s+4)(s+) in negative feedback, design a lead compensator to yield a 2% overshoot and v = 5 with a settling time of.2 s. We will use the design procedure described in.4. (a) (b) (c) Determine the closedloop bandwidth needed to meet the speed requirement. Answer: ( pt) ω BW = 57.9 rad/s ln(%os) ζ = =.456 π 2 + ln 2 (%OS) ω BW = 4 ( 2ζ T s ζ 2 ) + 4ζ 4 4ζ = 2.4 Determine the gain required to satisfy the steadystate requirement of the uncompensated system. Answer: ( pt) = 2, v = lim s sg(s) = so = 2, s(s + 4)(s + ) Plot the Bode diagram in MATLAB and determine the phase margin of the uncompensated system. Answer: ( pt) Φ uncomp M = of 8
6 EE C28 / ME C34 Fall 24 HW 8  Solutions 5 Bode diagram for uncompensated system (d) Assuming a correction factor of, find the phase contribution required from the compensator. Answer: ( pt) Φ M = 29 The desired phase margin of the compensated system is Φ des M = tan 2ζ 2ζ ζ 4 = 48.. Assuming correction factor of, the phase contribution required from the compensator is Φ des M Φ uncomp M + = 29. (e) (f) Using the required phase contribution of the lead compensator, determine β (see.4 Nise). Answer: ( pt) β =.346 β = sin Φ + sin Φ =.346 What is the new phasemargin frequency? Answer: (2 pt) ω = 48.5 rad/s The phasemargin frequency is the frequency at which G (s) = G(s)G c (s) =. Setting the phasemargin frequency at w max, G(s) = G c (s) = / β = β. Thus we look for the frequency at which the uncompensated system reaches 2 log G(s) = 2 log( β) = 4.6 db. From the Bode diagram, this is at ω = 48.5 rad/s. 6 of 8
7 EE C28 / ME C34 Fall 24 HW 8  Solutions 5 Bode diagram for uncompensated system 5 9 System: G : 48.5 : (g) Design the lead compensator using the method described in (s ) Answer: (2 pt) G c (s) = s Using equation.6 of Nise, G c (s) = β s + T s + βt = 2.89(s ). s (h) Did you meet the design specifications? Include relevant plots. Answer: ( pt) overshoot condition not met The settling time is.8 s, within the design specifications, but the overshoot is 25.8%. The actual steadystate error for the ramp input is.2, equal to the desired error of v =.2..4 Step response of compensated system of 8
8 EE C28 / ME C34 Fall 24 HW 8  Solutions 5 Step Response Repeating the analysis with a correction factor of 2 to the phase margin yields a compensated system with overshoot 2.3%, settling time.2 s, and v = 5. 8 of 8
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