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1 Philadelphia University Student Name: Student Number: Faculty of Engineering Serial Number: Final Exam, First Semester: 2017/2018 Dept. of Computer Engineering Course Title: Logic Circuits Date: 29/01/2018 Course No: Time Allowed: 2 hours Lecturer: Dr. Qadri Hamarsheh No. Of Pages: 8 Instructions: ALLOWED: pens and drawing tools (no red color). NOT ALLOWED: Papers, literatures and any handouts. Otherwise, it will lead to the non-approval of your examination. Shut down Telephones, and other communication devices. Please note: This exam paper contains 5 questions totaling 40 marks Write your name and your matriculation number on every page of the solution sheets. All solutions together with solution methods (explanatory statement) must be inserted in the labelled position on the solution sheets. You can submit your exam after the first hour. Basic notions: The aims of the questions in this part are to evaluate the required minimal student knowledge and skills. Answers in the pass category represent the minimum understanding of basic concepts: Digital Systems, Binary Number Systems, Boolean Algebra, Basic Logic Gates, Boolean Expression Simplification, Karnaugh Maps, Combinational and Sequential Circuits. Question 1 Multiple Choice Identify the choice that best completes the statement or answers the question. 1) Convert the octal number to binary. a) b) c) d) ) The signed-magnitude binary representation of the number +27 is a) b) c) d) None of the above 3) (A + B)(A B ) =? a) 0 b) 1 c) AB d) AB 4) What type of logic circuit is represented by the figure shown below? (12 marks) a) XOR b) XNOR c) AND d) XAND 5) Convert the binary number 1100 to Gray code. a) 1001 b) 0011 c) 1100 d)
2 6) Convert the following SOP expression to an equivalent POS expression. a) b) c) d) 7) For the shown K-map, the simplified Boolean expression F(A, B, C, D): a) 4 groups, each consisting of 4 squares b) 3 groups, each consisting of 4 squares c) 2 groups, each consisting of 4 squares d) None of above 8) In the following circuit, X given by a) X = A BC + AB C + ABC + A B C b) X = AB + BC + AC c) X = AB C + A BC + A B C + ABC d) X = A B + B C + A C 9) To set the shown latch, we should apply: a) X = 1, Y = 0 and Z = 0 b) X = 0, Y = 1 and Z = 0 c) X = 0, Y = 1 and Z = 1 d) X = 1, Y = 1 and Z = 0 10) A sequential circuit with two JK flip-flops A and B, and one input X is specified by the following input equations: JA = B X, KA = A X JB = A X, KB = B X + A X What are the next states of the flip-flops A and B if the present state of the flip-flops A, B and the input X equals, 011, 110 respectively: a) 01, 10 b) 01, 01 c) 00, 10 d) 01, 11 11) Which flip flop is mostly used creating memory register: a) SR- flip flop b) JK- flip flop c) T- flip flop d) D- flip flop 12) If a 10-bit ring counter has an initial state , what is the state after the second clock pulse? a) b) c) d)
3 Question 2 (6 marks) a) Consider the following circuit, do the following: (3 marks) What is the truth table for this circuit? What is the standard sum of products (SOP) form (not simplified) from the truth table? b) Design a 4-bit carry-look-ahead adder using Carry look-ahead Generator (Draw circuit). (3 marks) 3
4 Familiar and Unfamiliar Problems Solving: The aim of the questions in this part is to evaluate that the student has some basic knowledge of the key aspects of the lecture material and can attempt to solve familiar and unfamiliar problems of Combinational and Sequential Circuits and Analysis of Sequential Circuits. Question 3 (6 marks) a) Given a three-input Boolean function (2.5 marks) Implement the function using a minimal network of 2x4 decoders and OR gates. 4
5 b) Consider the following truth table that describes a function of 4 Boolean variables. (3.5 marks) Implement the function i. Using MUX 16:1 ii. Using MUX 8:1 5
6 Question 4 (8 marks) a) Draw the logic circuit for a sequential circuit with two D Flip-Flops S 0 and S 1, one input A and one output X, the circuit is specified by the following input equations and output equation: (2 marks) S 0 = A S 0 S 1 S 1 = A X = S 0 b) Draw 4-bit asynchronous binary counter using JK flip flops and its timing diagram. (3 marks) 6
7 c) Write the state table for an S-R latch and derive its characteristic equation (3 marks) 7
8 Question 5 (8 marks) Using the following table (Gray Code), do the following: Design 3-bit Up/Down Synchronous Gray Code Counter (using JK flip-flops) and one external input Y, When Y = 1, the Counter works Up, and Y = 0, the Counter works Down. Gray Code Inputs Decimal number G2 G1 G GOOD LUCK 8
Philadelphia University Student Name: Student Number:
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