Oscillators. Figure 1: Functional diagram of an oscillator.

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1 Oscillats Oscillats are electronic circuits, which are applied to generate periodic signals such sinusoidal, squarewave, tri-angular wave, pulse trains, clock signals etc. Oscillats are the essence of communication systems. They are needed to generate carriers, test signals, clock signals, and various kinds of wavefms needed f the development and testing of communication systems. The circuit of an oscillat is a feedback control system that produces an oscillating output (becomes unstable) if certain conditions are met (Barkhausen criterion). Figure 1 shows a functional diagram f an oscillat. Barkhausen criterion states that in der to have an oscillating output of the feedback system the magnitude of the loop gain must be equal to ( greater than) 1. Mathematically, Aβ(s) 1 (1) Sinusoidal Oscillats Figure 1: Functional diagram of an oscillat. In a positive feedback system, the magnitude of the loop gain must be equal to unity and the phase of the loop gain must be equal to zero at the resonant frequency in der to have a sinusoidal oscillation. (F negative feedback the phase shift must be equal to 180 o ). There are several circuit configurations that can produce sinusoidal oscillations. Figure 2 shows one of the widely used configurations, known as a Wien - bridge oscillat. The transfer function of the feedback loop is given by β(s) = V + V O = Z 2 Z 1 + Z 2 (2) where,

2 Figure 2: Wien-bridge oscillat. Z 1 = R C 1 s = R 1C 1 s + 1 C 1 s (3) and Z 2 = R 2 1 C 2 s = R 2 1 C 2 s R C 2 s = R 2 C 2 s R 2 C 2 s + 1 C 2 s = R 2 R 2 C 2 s + 1. (4)

3 Using R 1 = R 2 = R and C 1 = C 2 = C and substituting Eqs. (3) and (4) in (2) we get β(s) = s + 1 Cs R s R s + 1 = R s + 1 (s + 1) 2 + s Cs(s + 1) (5) β(s) = s (s + 1) 2 + s = s 1 + (s) 2 + 3s (6) Substituting s = jω yields β(s) =. 1 s + (7) ()2 s + 3 β(jω) = = 1 jω + ()2 jω j(ω() 2 1 ω ) (8) F a sinusoidal oscillation to occur the phase shift between V o and V + must be equal to zero. In other wds, the transfer function of the feedback loop given by Eq. (8) must not introduce any phase shift; that is, which yields ω o () 2 1 ω o = 0 (9) ω o = 1 (10) f o = 1 2π. (11)

4 Substituting ω o from Eq. (10) into Eq. (8) yields β(jω o ) = 3 = 1 3. (12) Also, we must have Aβ(jω o ) = 1. (13) Combining Eqs. (12) and (13) yields A = 3. (14) But, A = V o = R i + R f = 1 + R f = 3. (15) V R i R i R f R i = 2. (16) Note 1: Due to variation in component values the fact that the op-amp s gain would vary, especially when operating close to the peak voltage, obtaining unity loop gain would require some fine tuning. A good starting point would be to use R f /R i slightly greater than 2. Assignment 2.1: Using Eqs. (10) and (16) design and build the Wien-bridge sinusoidal oscillat shown in Fig. 2, f frequencies 500 Hz,1 KHz, 5 KHz.

5 Relaxation Oscillats They usually involve a voltage comparat with output switching from one peak to the other peak depending upon its input. One input of the comparat is fed with a fixed voltage, usually a ption of the output through a voltage divider. A capacit(s) at the other input of the comparat causes the output of the comparat to switch when it charges and discharges. Figure 3 shows an op-amp based square wave generat. Note that in this kind of oscillat the frequency of the oscillat not only depends on the time constant of the capacit but also on the range of the voltage it goes through during charging and discharging cycles. Figure 3: A square wave oscillat. The oscillation frequency the square wave oscillat is determined by computing the charging and discharging time of the capacit C. Figure 4 shows the voltage across the capacit. Assume initially the capacit has no charge and V + > V - that would result in V out = V max. At that moment the capacit will start charging towards V max. V + at that moment is equal to α V max, where α is given by α = R 2 R 1 + R 2. (17)

6 As soon as the capacit charges beyond V + given by Eq. (17) the output of the comparat switches to V max. At that point the capacit starts discharging towards -V max. At that point V + is equal to - α V max. As soon as the capacit discharges below - α V max the output of the comparat switches to V max causing the capacit to start charging toward V max. In der to find the frequency of oscillation we need to compute charging and discharging times (t c and t d ). Let us first define the following points of interest in the charging and discharging process: t c1 = time the capacit would take to charge from -V max to - α V max t c2 = time the capacit would take to charge from - α V max to α V max t c1 = time the capacit would to discharge from V max to α V max t d2 = time the capacit would to charge from α V max to - α V max Total charging time = t c = t c2 - t c1 Total discharging time = t d = t d2 - t d1 Time period of the oscillat = T = t c + t d

7 Detailed Analysis The instantaneous voltage V c (t) on the capacit while charging from - V max to + V max is given by V c (t) = V max (1 2e t ). (18) We ll now solve Eq. (18) f t = t c1 and t = t c2. At t = t c1 V c (t c1 ) = αv max, (19) therefe, from Eq. (18) we get αv max = V max (1 2e t c1 ). (20) α = 1 2e t c1 (21) e t c1 taking the natural logarithm of both sides yields t c1 = 1 + α 2 (22) = ln [1 + α 2 ] (23) At t = t c2 t c1 = ln [ 1 + α 2 ] (24) V c (t c2 ) = αv max, (25) therefe, from Eq. (18) we get αv max = V max (1 2e t c2 ). (26) α = 1 2e t c2 (27)

8 e t c2 taking the natural logarithm of both sides yields t c2 = 1 α 2 (28) = ln [1 α 2 ] (29) t c2 = ln [ 1 α 2 ] (30) t c = t c2 t c1 = ln [ 1 α + α ] ( ln [1 2 2 ]) (31) t c = ln [ 1 + α 1 α ] (32) The instantaneous voltage V c (t) on the capacit while discharging from +V max to - V max is given by V c (t) = V max (2e t 1). (33) We ll now solve Eq. (33) f t = t d1 and t = t d2. At t = t d1 V c (t d1 ) = αv max, (34) therefe, from Eq. (33) we get αv max = V max (2e t d1 1). (35) α = 2e t d1 1 (36) e t d1 taking the natural logarithm of both sides yields t d1 = 1 + α 2 (37) = ln [1 + α 2 ] (38)

9 At t = t d2 t d1 = ln [ 1 + α 2 ] (39) V c (t d2 ) = αv max, (40) therefe, from Eq. (33) we get αv max = V max (2e t d2 1). (41) α = 2e t d2 1 (42) e t d2 taking the natural logarithm of both sides yields t d2 = 1 α 2 (43) α = ln [1 2 ] (44) t d2 = ln [ 1 α 2 ] (45) t d = t d2 t d1 = ln [ 1 α + α ] ( ln [1 2 2 ]) (46) t d = ln [ 1 + α 1 α ] (47) Finally, T = t c + t d = ln [ 1 + α + α ] + ln [1 1 α 1 α ] (48) T = 2 ln [ 1 + α 1 α ]. (49)

10 Quick Solution Suppose a capacit needs to be charged to a voltage V max from an initial voltage Vi then the range additional voltage, Vrange, that the capacit can develop through charging to V max is given by V range = V max V i. (50) Similarly, if a capacit needs to be discharged to a voltage V min from an initial voltage V i then the range voltage, V range, that the capacit can drop through discharging to V min is given by V range = V i V min. (51) We can now write the equations f charging discharging a capacit from an arbitrary initial value V i. The instantaneous voltage on a capacit being charged from an initial voltage of V i to a maximum voltage V max is given by V c (t) = V max V range (e t ) (52) Similarly, the instantaneous voltage on a capacit being discharged from an initial voltage of V i to a minimum voltage V min is given by V c (t) = V range (e t ) + V min (53) Note that Eqs. (52) and (53) will provide the charging/discharging time elapsed from the moment of initial charge (voltage) on the capacit. Therefe, they can be solved directly f t c and t d. The V range f capacit during the charging phase is given by V range = V max V i = V max ( αv max ) = V max (1 + α). (54) We now can solve Eq. (52) f time elapsed (t c ) until capacit reached a voltage αv max as follows: V c (t c ) = V max V max (1 + α) (e t c ) (55) αv max = V max V max (1 + α) (e t c ) (56) (1 + α) (e t c ) = 1 α (57)

11 (e t c ) = 1 α 1 + α (58) t c = ln [ 1 α 1 + α ] (59) The V range f capacit during the discharging phase is given by V range = V i V min = αv max ( V max ) = V max (1 + α). (60) Similarly, we can solve Eq. (53) f time elapsed (t d ) until the capacit discharged to a voltage -αv max as follows: V c (t d ) = V max (1 + α) (e t d ) + ( V max ) (61) αv max = V max (1 + α) (e t c ) V max (62) (1 + α) (e t d ) = 1 α (63) (e t d ) = 1 α 1 + α (64)

12 t d = ln [ 1 α 1 + α ] (65) Finally, T = t c + t d = ln [ 1 + α + α ] + ln [1 1 α 1 α ] (66) Assignment 2.2: T = 2 ln [ 1 + α 1 α ]. (67) F the circuit shown in Fig. 3 build the following circuit using Electronics Wkbench. Use 741 Op amp and Use R = 1K. A. Compute C f f = 1 KHz, 5 KHz, 10 KHz, and 50 KHz, when R 2 = R 1, 2R 1, and 10R 1. B. Build the circuit using off-the-shelf components and repeat part (A) and compare your result with the results obtained in part (A). Explain discrepancies, if any. Display the output of the Op amp. Explain your results.

13 Relaxation Oscillat with varying pulse width Figure 4 shows a relaxation oscillat based on the 555 Timer. In this configuration the capacit C 1 charges through the path containing the resists R 1 and R 2 ; however, it discharges through only R 2. In this way, the charging and discharging paths of the capacit (C 1 ) do not remain the same. This allows the designers to control the resists in the charging and discharging paths, in a way that allows one to design a relaxation oscillat of any desired pulse width (not just the square wave). Figure 4: An oscillat f generating wavefms of varying pulse widths. Figure 5 shows the voltage across the capacit C 1 as well as the output voltage. When the circuit is energized the THR is low, OUT is high, and DIS path is open and the capacit start charging toward V CC with a time constant of (R 1 + R 2 ) C 1. However, when the voltage across C 1 reaches 2/3 V CC the comparat switches the OUT to low and DIS path closes causing C 1 to start discharging with a time constant R 2 C 1. When the voltage across C 1 reaches below 1/3 V CC the comparat switches the OUT to high and opens DIS path causing C 1 to start charging again towards V CC. Assignment 2.3: Show that f the 555 oscillat in Fig. 4, t c = ln[2] (R 1 + R 2 ) C 1 and t d = ln[2] R 2 C 1

14 Figure 5: Voltage across C 1 and at the output (OUT) of the 555 oscillat. Assignment 2.4: Use the circuit of Fig. 4 f the following experiments: A. Design a pulse generat f frequencies = 10 KHz, 1 KHz, 800 Hz, and 100 Hz. Use C 1 = 94 nf, and Keep t c = 0.7T. B. F frequency = 100 Hz, generate the wavefm f the following duty cycles: 90%, 70%, 50%, 30%, and 10%. Display the output signal. Explain if the output is what you expected. Document all your wk and include printouts of the circuit diagram as well as the output signals in your rept. C. Use the circuit f 10 KHz and change the duty cycle to 50 %. Remove C 2 and apply a 500 Hz Sinusoidal signal (0-5 peak-to-peak) at the CON input of the 555 Timer. Display the output signal. Explain your results. Document all your wk and include printouts of the circuit diagram as well as the output signals in your rept.