5 8 LED MAX6950/MAX6951 MAX6950/MAX6951 SPI TM QSPI TM MICROWIRE TM 7 LED LED 2.7V MAX LED MAX LED 16 (0-9 A-F) RAM 16 7 LED LED
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1 ; Rev 1; 12/ V SPI TM QSPI TM MICROWIRE TM 7 2.7V MAX MAX (0-9 A-F) RAM 16 7 EMI ( 1 8 ) 26MHz SPI/QSPI/MICROWIRE +2.7V 16 / EMI 75µA ( ) 16 QSOP PART TEMP. RANGE PIN-PACKAGE MAX6950CEE 0 C to +70 C 16 QSOP MAX6950EEE -40 C to +85 C 16 QSOP MAX6951CEE 0 C to +70 C 16 QSOP MAX6951EEE -40 C to +85 C 16 QSOP TOP VIEW DIN 1 16 V+ CLK 2 15 DIG3/SEG DIG4/SEG4 DIG2/SEG2 DIG1/SEG1 4 5 MAX6950 MAX (DIG5)/SEG5 (DIG6)/SEG6 SPI QSPI Motorola, Inc. MICROWIRE National Semiconductor Corp. DIG0/SEG0 ISET (DIG7)/SEG7 SEG8 GND 8 9 ( ) MAX6951 ONLY QSOP Maxim Integrated Products 1 Maxim Maxim Maxim Maxim
2 +2.7V ABSOLUTE MAXIMUM RATINGS Voltage (with Respect to GND) V V to 6V All Other Pins V to (V V) DIG1 DIG8 Sink Current mA SEG1 SEG9 Source Current... 55mA Continuous Power Dissipation (T A = +70 C) 16-Pin QSOP (derate 8.34mW/ C above +70 C)...667mW Operating Temperature Ranges (T MIN to T MAX ) MAX695_CEE...0 C to +70 C MAX695_EEE C to +85 C Junction Temperature C Storage Temperature Range C to +150 C Lead Temperature (soldering, 10s) C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTI (Typical operating circuit, V+ = +3.0V to, T A = T MIN to T MAX, unless otherwise noted.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Operating Supply Voltage V V S hutd ow n m od e, al l d i g i tal Overtemperature 75 Shutdown Supply Current I SHDN i np uts at V + or GN D T A = +25 o C µa Operating Supply Current I+ All segments on, all digits scanned, intensity set to full, internal oscillator, no display load connected ma Master Clock Frequency ( Internal Oscillator) Master Clock Frequency ( External Clock) Display Scan Rate ( External Clock) Display Scan Rate ( Internal Oscillator) Display Scan Rate ( Internal Oscillator) Internal/External Detection Threshold Dead Clock Protection Frequency High Time ( External Clock) Low Time ( External Clock) f = RC oscillator 1 8 = RC oscillator, RSET = 56kΩ, C SET = 27pF 4 MHz f overdriven externally 1 8 MHz f SCAN Eight digits scanned, = overdriven externally Hz f SCAN Eight digits scanned, = RC oscillator Hz f SCAN Eight digits scanned, = RC oscillator, R SET = 56kΩ, C SET = 27pF 625 Hz V 1.7 V f 75.5 khz t CH 50 ns t CL 50 ns 2
3 ELECTRICAL CHARACTERISTI +2.7V (Typical operating circuit, V+ = +3.0V to, T A = T MIN to T MAX, unless otherwise noted.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Slow Segment Blink Period (Internal Oscillator) Fast Segment Blink Period (Internal Oscillator) Fast or Slow Segment Blink Duty Cycle (Note 2) f S LOWBLIN K f FASTBLIN K Eight digits scanned, = RC oscillator, R SET = 56kΩ, C SET = 27pF Eight digits scanned, = RC oscillator, R SET = 56kΩ, C SET = 27pF 1 s 0.5 s % Digit Drive Sink Current I DIGIT T A = +25 C, V = 2.4V ma Segment Drive Source Current I SEG T A = +25 C, V = 2.4V ma Digit Drive Sink Current (Note 2) I DIGIT T A = +25 C, V+ = 2.7V to 3V, V = 2.2V 80 ma Segment Drive Source Current (Note 2) I SEG T A = +25 C, V+ = 2.7V to 3V, V = 2.2V -10 ma Slew Rate Rise Time I SEG/ t T A = +25 C 35 ma/µs LOGIC INPUTS Input Current DIN, CLK, I IH, I IL V IN = 0 or V µa Logic High Input Voltage DIN, CLK, Logic Low Input Voltage DIN, CLK, V IH 2.4 V V IL 0.4 V H yster esi s V ol tag e D IN, C LK, C S V I 0.5 V TIMING CHARACTERISTI (Figure 1) CLK Clock Period t CP 38.4 ns CLK Pulse Width High t CH 19 ns CLK Pulse Width Low t CL 19 ns C S Fall to CLK Ri se S etup Ti m e t S 9.5 ns CLK Ri se to Rise Hold Time t H 3 ns DIN Setup Time t DS 9.5 ns DIN Hold Time t DH 0 ns Pulse High t W 19 ns TIMING CHARACTERISTI (V+ = +2.7V) (Note 2) CLK Clock Period t CP 50 ns CLK Pulse Width High t CH 24 ns CLK Pulse Width Low t CL 24 ns C S Fall to CLK Ri se Setup Time t S 12 ns CLK Ri se to Rise Hold Time t H 4 ns DIN Setup Time t DS 12 ns DIN Hold Time t DH 4 ns Pulse High t W 24 ns Note 1: All parameters tested at T A = +25 C. Specifications over temperature are guaranteed by design. Note 2: Guaranteed by design. 3
4 (Typical operating circuit, scan limit set to eight digits, V+ = +3.3V, V = 2.4V, T A = +25 C, unless otherwise noted.) ILLATOR FREQUENCY (MHz) INTERNAL ILLATOR FREQUENCY vs. TEMPERATURE V+ = 5V V+ = 2.7V V+ = 3.3V TEMPERATURE ( C) MAX6950/1 toc01 ILLATOR FREQUENCY (MHz) INTERNAL ILLATOR FREQUENCY vs. SUPPLY VOLTAGE SUPPLY VOLTAGE (V) MAX6950/1 toc02 VOLTAGE AT (V) INTERNAL ILLATOR WAVEFORM AT (PIN 9) TIMELINE (ns) MAX6950/1 toc03 ILLATOR FREQUENCY (khz) DEAD CLOCK ILLATOR FREQUENCY vs. SUPPLY VOLTAGE SUPPLY VOLTAGE (V) MAX6950/1 toc04 CURRENT NORMALIZED TO 40mA SEGMENT SOURCE CURRENT vs. SUPPLY VOLTAGE MAX6950/1 toc05 VOLTAGE (V) WAVEFORM AT SEGO/DIGO (PIN 6) V+ = 3.3V, 8 DIGITS SCANNED, 8/16 INTENSITY DIGIT 0 MULTIPLEX TIMESLOT MAX6950/1 toc SUPPLY VOLTAGE (V) TIMELINE (ns) 4
5 1 DIN 2 CLK 3 6, DIGX, SEGX 7 I SET 8 GND 9 CLK CLK 16 CLK CLK D OUT X X / GND (R SET ) C SET RC (C SET ) R SET ( ) C SET 1MHz 8MHz GND V+ 0.1µF GND MAX6950 MAX6951 MAX MAX MAX6950 MAX6951 MAX MAX (MAX6950) 8 (MAX6951) ( 1) 1 ( 1) SPI 3 16 D15 D0 ( 2) D15 D8 D7 D0 D15 CLK DIN 16 DIN CLK CLK
6 1 DIG/SEG0 PIN 6 DIG/SEG1 PIN 5 DIG/SEG2 PIN 4 DIG/SEG3 PIN 3 DIG/SEG4 PIN 14 DIG/SEG5 PIN 13 DIG/SEG6 PIN 12 DIG/SEG7 PIN 11 SEG 8 PIN 10 Digit 0 CC0 SEG dp SEG g SEG f SEG e SEG d SEG c SEG b SEG a Digit 1 SEG dp CC1 SEG g SEG f SEG e SEG d SEG c SEG b SEG a Digit 2 SEG dp SEG g CC2 SEG f SEG e SEG d SEG c SEG b SEG a Digit 3 SEG dp SEG g SEG f CC3 SEG e SEG d SEG c SEG b SEG a Digit 4 SEG dp SEG g SEG f SEG e CC4 SEG d SEG c SEG b SEG a Digit 5 SEG dp SEG g SEG f SEG e SEG d CC5 SEG c SEG b SEG a Digit 6 SEG dp SEG g SEG f SEG e SEG d SEG c CC6 SEG b SEG a Digit 7 SEG dp SEG g SEG f SEG e SEG d SEG c SEG b CC7 SEG a 2 (16 ) D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 MSB DATA LSB ( 2) 1) CLK 2) 16 3) 16 D15 D0 DIN 4) CLK DIN CLK DIN n ( n > 16) {n-15} {n} D15 D0 ( 3) 16 5 S B E T R P0 P1 D1 3 8 SRAM P0 P1 ( 6) V+ (CMOS ) 6
7 1 CLK DIN t S t CL t CH t CP t H t DH t DS D15 D14 D1 D0 t W CLK DIN D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D CLK DIN BIT1 BIT2 N-15 N-14 N-13 N-12 N-11 N-10 N-9 N-8 N-7 N-6 N-5 N-4 N-3 N-2 N-1 N 3 16 ) T 7 ( 8) E P0 P1 ( 9) (R D5) P0 P1 ( 7
8 3 REGISTER COMMAND HEX D15 D14 D13 D12 D11 D10 D9 D8 CODE No-Op x00 Decode Mode x01 Intensity x02 Scan Limit x03 Configuration x04 Factory reserved. Do not write to this x06 Display Test x07 Digit 0 plane P0 only (plane 1 unchanged) x20 Digit 1 plane P0 only (plane 1 unchanged) x21 Digit 2 plane P0 only (plane 1 unchanged) x22 Digit 3 plane P0 only (plane 1 unchanged) x23 Digit 4 plane P0 only (plane 1 unchanged) x24 Digit 5 plane P0 only (plane 1 unchanged) x25 Digit 6 plane P0 only (plane 1 unchanged) x26 Digit 7 plane P0 only (plane 1 unchanged) x27 Digit 0 plane P1 only (plane 0 unchanged) x40 Digit 1 plane P1 only (plane 0 unchanged) x41 Digit 2 plane P1 only (plane 0 unchanged) x42 Digit 3 plane P1 only (plane 0 unchanged) x43 Digit 4 plane P1 only (plane 0 unchanged) x44 Digit 5 plane P1 only (plane 0 unchanged) x45 Digit 6 plane P1 only (plane 0 unchanged) x46 Digit 7 plane P1 only (plane 0 unchanged) x47 D i g i t 0 p l ane P 0 and p l ane P 1 ( w i th sam e d ata) x60 D i g i t 1 p l ane P 0 and p l ane P 1 ( w i th sam e d ata) x61 D i g i t 2 p l ane P 0 and p l ane P 1 ( w i th sam e d ata) x62 D i g i t 3 p l ane P 0 and p l ane P 1 ( w i th sam e d ata) x63 D i g i t 4 p l ane P 0 and p l ane P 1 ( w i th sam e d ata) x64 D i g i t 5 p l ane P 0 and p l ane P 1 ( w i th sam e d ata) x65 D i g i t 6 p l ane P 0 and p l ane P 1 ( w i th sam e d ata) x66 D i g i t 7 p l ane P 0 and p l ane P 1 ( w i th sam e d ata) x67 SPI ( ) 8 7/16 ( ) 11 8
9 4 REGISTER POWER-UP CONDITION CODE (HEX) D7 D6 D5 D4 D3 D2 D1 D0 Decode No decode for digits 7 0 0x Intensity 1/16 (min on) 0x02 X X X X Scan Limit Display 5 digits: x03 X X X X X Configuration S hutd ow n enab l ed /b l i nk sp eed i s sl ow /b l i nk d i sab l ed 0x04 X X X Display Test Normal operation 0x07 X X X X X X X 0 Digit 0 Blank digit, both planes 0x Digit 1 Blank digit, both planes 0x Digit 2 Blank digit, both planes 0x Digit 3 Blank digit, both planes 0x Digit 4 Blank digit, both planes 0x Digit 5 Blank digit, both planes 0x Digit 6 Blank digit, both planes 0x Digit 7 Blank digit, both planes 0x MAX6950 ( ) MAX MAX MAX MAX Hz ) ( 4) /16 1/16 1/16 f = 4MHz 5 1kHz 8 ( A F) ( (D3-D0) D6-D4 D7 (SEG DP) (D7 = 1 ) D7-D0 MAX6950/ MAX SRAM P0 P1 SPI 9
10 5 MODE CODE (HEX) D7 D6 D5 D4 D3 D2 D1 D0 Configuration register 0x04 X X R T E B 0 S 6 (S D0) MODE CODE (HEX) D7 D6 D5 D4 D3 D2 D1 D0 Shutdown 0x04 X X R T E B 0 0 Normal operation 0x04 X X R T E B (B D2) MODE S l ow - b l i nki ng seg m ents b l i nk on for 1s, off for 1s w i th f OS C = 4M H z CODE (HEX) D7 D6 D5 D4 D3 D2 D1 D0 0x04 X X R T E 0 0 S Fast-blinking segments blink on for 0.5s, off for 0.5s with f = 4MHz 0x04 X X R T E 1 0 S 8 / (E D3) MODE Blink function is disabled Blink function is enabled CODE (HEX) D7 D6 D5 D4 D3 D2 D1 D0 9 (T D4) MODE Blink timing counters are unaffected 0x04 X X R T 0 B 0 S 0x04 X X R T 1 B 0 S CODE (HEX) D7 D6 D5 D4 D3 D2 D1 D0 0x04 X X R 0 E B 0 S Blink timing counters are cleared on the rising edge of 0x04 X X R 1 E B 0 S 1 P0 P1 2 1 ( 3) P0 P1 10
11 10 (R D5) MODE Digit data for both planes P0 and P1 are unaffected Digit data for both planes P0 and P1 are cleared on the rising edge of 11 CODE (HEX) D7 D6 D5 D4 D3 D2 D1 D0 0x04 X X 0 T E B 0 S 0x04 X X 1 T E B 0 S MODE CODE (HEX) D7 D6 D5 D4 D3 D2 D1 D0 Normal operation 0x07 X X X X X X X 0 Display test 0x07 X X X X X X X 1 12 SCAN LIMIT HEX CODE (HEX) D7 D6 D5 D4 D3 D2 D1 D0 CODE Display digit 0 only 0x03 X X X X X xX0 Display digits 0 and 1 0x03 X X X X X xX1 Display digits 0 and 1 2 0x03 X X X X X xX2 Display digits 0 and x03 X X X X X xX3 Display digits 0 and x03 X X X X X xX4 Display digits 0 and x03 X X X X X xX5 Display digits 0 and x03 X X X X X xX6 Display digits 0 and x03 X X X X X xX7 18) ( 17) P0 P1 P0 E P0 P1 P0 P1 ( P1 TTL/CMOS B ( 7) B RC C SET 11
12 13 TYPICAL SEGMENT HEX DUTY CYCLE CURRENT (ma) CODE (HEX) D7 D6 D5 D4 D3 D2 D1 D0 CODE 1/16 (min on) 2.5 0x02 X X X X xX0 2/16 5 0x02 X X X X xX1 3/ x02 X X X X xX2 4/ x02 X X X X xX3 5/ x02 X X X X xX4 6/ x02 X X X X xX5 7/ x02 X X X X xX6 8/ x02 X X X X xX7 9/ x02 X X X X xX8 10/ x02 X X X X xX9 11/ x02 X X X X xXA 12/ x02 X X X X xXB 13/ x02 X X X X xXC 14/ x02 X X X X xXD 15/ x02 X X X X xXE 15/16 (max on) x02 X X X X xXF f 1MHz 8MHz RC R SET ( ) C SET R SET C SET 4MHz 0.5Hz 1Hz ( ) MAX6950( 5 ) f 4000 MAX6951( 8 ) f 6400 f 4MHz 200µs ( 9) T f 75.5kHz ( ) 8 11Hz RC ( ) T 12
13 DIGIT CATHODE DRIVER INTENSITY SETTINGS 1/16TH (MIN ON) ANODE MIN ON 2/16TH 200µs TIME SLOT DIGIT 0 LOW 200µs TIME SLOT DIGIT 1 CURRENT SOURCE ENAB 200µs TIME SLOT DIGIT 2 ONE COMPLETE 1.6ms MULTIPLEX CYCLE AROUND 8 DIGITS 200µs TIME SLOT DIGIT 3 200µs TIME SLOT DIGIT 4 DIGIT 0's 200µs MULTIPLEX TIME SLOT 200µs TIME SLOT DIGIT 5 200µs TIME SLOT DIGIT 6 200µs TIME SLOT DIGIT 7 200µs TIME SLOT DIGIT 0 START OF NEXT CYCLE 3/16TH LOW LOW 13/16TH LOW 14/16TH LOW 15/16TH 16/16TH MAX ON LOW LOW MINIMUM 12.5µs INTERDIGIT BLANKING INTERVAL CURRENT SOURCE ENAB ANODE MAX ON ANODE (UNLIT) 4 13
14 14 DECODE CODE HEX CODE (HEX) D7 D6 D5 D4 D3 D2 D1 D0 CODE No decode for digits 7 0 0x x00 Hexadecimal decode for digit 0, no decode for digits 7 1 Hexadecimal decode for digits 2 0, no decode for digits 7 3 Hexadecimal decode for digits x x01 0x x07 0x xFF 7-SEGMENT ON SEGMENTS = 1 CHARACTER D7* D 6 D 4 D3 D2 D1 D0 dp* a b c d e f g 0 X X X X X X X X X X A X B X C X D X E X F X The decimal point segment is lit when bit D7 = Hz 1Hz R SET 40mA 2.5mA 2.5mA 37.5mA C SET R SET RC R SET C SET f f 1MHz 8MHz R SET R SET C SET 4MHz I SEG = KI / RSET ma f = KF / (RSET C SET + TRAY) MHz K I = 2240 K F =
15 16 R SET = kω C SET = pf C STRAY = pf 3pF R SET 56kΩ C SET 27pF R SET R SET C SET GND 1pF 5pF PCB f e a g d D7 D6 D5 D4 D3 D2 D1 D0 Segment line dp a b c d e f g b c d V+ 3.0V 40mA 2.4V (3.0V - 2.4V) = 0.6V 2.4V 0.6V +5V (5.0V - 2.4V) = 2.6V +3.3V (3.3V - 2.4V) = 0.9V 3 3.3V 5V MAX V 5V ±5% 15mA + (40mA x 8) = 335mA 4.75V (4.75V - 3.0V)/0.335A = 5.2Ω 4.7Ω ±10% (0.335A) 2 x (4.7Ω x 1.1) = 0.548W 1W MAX V - (335A x 4.7Ω x 0.9) = 3.83V +2.7V +5.0V I SEG 0.6V I SEG 7 15
16 17 SEGMENT S BIT SETTING IN PLANE P1 18 MAX6950/ MAX V SPI 5Mbps MAX6950/ MAX6951 2V ( ) P D = (V+ x I+) + (V+ - V) (DUTY I SEG N) V+ = SEGMENT S BIT SETTING IN PLANE P0 X 0 X 1 SEGMENT S BIT SETTING IN PLANE P1 SEGMENT S BIT SETTING IN PLANE P0 SEGMENT BEHAVIOR Segment off during both halves of each blink period Segment off during both halves of each blink period 0 0 Segment off 0 1 SEGMENT BEHAVIOR Segment on only during the 1st half of each blink period 1 0 Segment on only during the 2nd half of each blink period 1 1 Segment on DUTY = N = ( 8 ) V = I SEG = R SET P D = mw ma I SEG = 40mA, N = 8, Duty = 15/16, V = 2.4V at 40mA, V+ = 3.6V P D = 3.6V (15mA) + (3.6V - 2.4V)(15 / 16 40mA x 8) = 0.414W +120 C/W) 16 QSOP (T JA = 1/ = T A T J (MAX) = T A + (P D T JA ) = +150 C = T A + ( C/W) T A = +100 C 85 C +2.7V +5.0V 0.1µF MAX µF 1. R SET 7 PCB R SET 7 8 R SET 2. R SET 8 MAX6950/ 5 C1( ) C2 ( ) IC R SET IC 16
17 C2 22µF 3.3V 16 MAX6951 DIG1 DIG8 SEG1 SEG9 C1 100nF 9 8 DIGITS AND SEGMENTS (SEE TABLE 1 FOR CONNECTIONS) µc DIN 1 DIN ISET 7 CLK 15 2 CLK 8 9 C SET 27pF R SET 56kΩ TRANSISTOR COUNT: 17,350 PROCESS: CMOS 5 PCB 17
18 ISET BLINK CONTROL P0 ENABLE DATA SEGMENT CURRENT REFERENCE MULTIPLEX, PWM BLINK COUNTERS BLINK ENABLE BLINK RATE BLINK SYNC ENABLE DATA 8-BYTE DUAL-PORT RAM PLANE P P1 ENABLE 8 CLR ENABLE 3 ENABLE HEXADECIMAL ROM OUT IN MODE 8 DATA 8-BYTE DUAL-PORT RAM PLANE P1 8 CLR DATA ENABLE DATA PWM BRIGHTNESS CONTROL DIGIT MULTIPLEXER BLINK ENABLE REGISTER BLINK RATE REGISTER BLINK SYNC REGISTER INTENSITY REGISTER DECODE-MODE REGISTER GLOBAL CLEAR REGISTER SCAN-LIMIT REGISTER SHUTDOWN REGISTER TEST REGISTER CONFIGURATION REGISTER ENABLE PWM 8 CATHODE DRIVERS 9 ANODE DRIVERS DIG0/SEG0 DIG1/SEG1 DIG2/SEG2 DIG3/SEG3 DIG4/SEG4 (DIG5)/SEG5 (DIG6)/SEG6 DIGIT (DIG7)/SEG7 SEG8 SHUTDOWN TEST DIGIT AND CONTROL REGISTER DECODER 8 0 D0 REGISTER DIGIT/CONTROL 0 0 DIGIT PLANE D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 0 DIN D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 CLK 18
19 QSOP.EPS MAXIM Maxim Maxim Maxim Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA (408) Maxim Integrated Products Printed USA Maxim Integrated Products, Inc.
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