EE 330 Lecture 33. Cascaded Amplifiers High-Gain Amplifiers Current Source Biasing

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1 EE 330 Lecture 33 Cascaded Amplifiers High-Gain Amplifiers Current Source Biasing

2 Review from Last Time Can use these equations only when small signal circuit is EXACTLY like that shown!!

3 Review from Last Time Basic Amplifier Structures 1. Common Emitter/Common Source 2. Common Collector/Common Drain 3. Common Base/Common Gate 4. Common Emitter with R E / Common Source with R S 5. Cascode (actually CE:CB or CS:CD cascade) 6. Darlington (special CE:CE or CS:CS cascade) The first 4 are most popular

4 B Review from Last Time Basic Amplifier Characteristics Summary CE/CS in DD R C C B E EE out Large noninverting gain Low input impedance Moderate (or high) output impedance Used more as current amplifier or, in conjunction with CD/CS to form two-stage cascode CC/CD in DD C B E out R E SS Gain very close to +1 (little less) High input impedance for BJT (high for MOS) Low output impedance Widely used as a buffer CB/CG DD R C C B BB E in out Large noninverting gain Low input impedance Moderate (or high) output impedance Used more as current amplifier or, in conjunction with CD/CS to form two-stage cascode CEwRE/ CSwRS in DD R C C E R E out Reasonably accurate but somewhat small gain (resistor ratio) High input impedance Moderate output impedance Used when more accurate gain is required EE

5 Cascaded Amplifier Analysis and Operation Adjacent Stage Coupling Only Systematic Methods of Analysis/Design will be Developed One or more couplings of nonadjacent stages Less Common Analysis Generally Much More Involved, Use Basic Circuit Analysis Methods

6 Cascaded Amplifier Analysis and Operation Adjacent Stage Coupling Only Systematic Methods of Analysis/Design will be Developed Case 1: All stages Unilateral Case 2: One or more stages are not unilateral

7 Repeat from earlier discussions on amplifiers Cascaded Amplifier Analysis and Operation Case 1: All stages Unilateral R S out in R ox1 1 R ix1 A v RL1 R A v023 ix2 3 R ox2 4 R L out RiX1 R L1//RiX2 RL A A01 A02 in R ix1+rs R L1//R ix2+r0x1 R L+R0X2 Accounts for all loading between stages!

8 Cascaded Amplifier Analysis and Operation Case 2: One or more stages are not unilateral Standard two-port cascade R S 11 R in1 Two-Port Model 1 Two-Port A v01 Model 2 R o1 12 R in2 R o2 13 R in3 Two-Port Model 3 R o3 23 OUT in A v0r121 A v0111 A v0r222 A v0212 A v0r323 A v0313 R L Analysis by creating new two-port of entire amplifier quite tedious because of the reverse-gain elements Right-to-left nested R inx,a vx approach R S 1 R inx -A ox Model 2 R inx -A Model 3 R inx -A Model out in 1 R in1x A v1x 1 R in2x A v2x 2 R in3x A v3x 3 R L = R inx includes effects of all loading A X is the voltage ratio from input to output of a stage A X s include all loading Can not change any loading without recalculating everthing!

9 Example: Determine the voltage gain of the following circuit in terms of the smallsignal parameters of the transistors. Assume and Q 2 are operating in the Forward Active region and C 1 C 4 are large. DD R 1 R 3 R 5 R 6 OUT C 1 C 3 C 4 IN R S R 2 R 4 C 2 R 7 R 8 EE In this form, does not look EXACTLY like any of the basic amplifiers!

10 Example: DD R 1 R 3 R 5 R 6 OUT C 1 C 3 C 4 IN R S R 2 R 4 C 2 R 7 R 8 EE out R S A B Q 2 in R 1 //R 2 R 7 R 6 //R 8 R 3 //R 5 Will calculate A by determining the three ratios (not voltage gains of dependent source): A = A A A out out B A in B A in

11 Example: R S A B Q 2 out in R 1 //R 2 R 7 R 6 //R 8 R 3 //R 5 CE with R E R in2 A 2= R //R R out 6 8 B 7 Rin2 βr7

12 Example: out Q 2 R 7 R 6 //R 8 R in2 One-Port R in2 Rin2 βr7

13 Example: R S A B Q 2 out in R 1 //R 2 R 6 //R 8 R 3 //R 5 R 7 R in2 CE with R E R in2 A 2= R //R R out 6 8 B 7 Rin2 βr7

14 Example: R S A B in R 1 //R 2 R 3 //R 5 R in2 R S A B in R 1 //R 2 R3//R5//Rin2 A = g R //R //R B 1 m1 3 5 in2 A Rin1 r 1 R in1 CE Config

15 Example: B R in1 R3//R5//R in2 R in1

16 Example: R S A B in R 1 //R 2 R in1 R3//R5//Rin2 A 0= R //R //R R R //R //R A 1 2 in1 in S 1 2 in1

17 Example: R S A B Q 2 out in R 1 //R 2 R 7 R 6 //R 8 R 3 //R 5 EE Thus we have A = where out R 6//R8 R out out B A in B A in B 7 B A g R //R //R m1 3 5 in2 R //R //R R R //R //R A 1 2 in1 in S 1 2 in1 Rin2 βr7 Rin1 r 1

18 Example: R S A B Q 2 out in R 1 //R 2 R 7 R 6 //R 8 R 3 //R 5 EE Observation: By working from the output back to the input we were able to create a sequence of steps where the circuit at each step looked EXACTLY like one of the four basic amplifiers even though stages were not unilateral. Engineers often follow a design approach that uses a cascade of the basic amplifiers and that is why it is often possible to follow this approach to analysis. Will formalize what we have done (consider 3-stage unilateral cascade) Exactly same approach when not unilateral i B i B Stage 1 Stage 2 Stage 3 i B OUT R B1 in BE g π g m BE g 0 BE g π g m BE g 0 BE g π g m BE g 0 R B2 R B3 R L

19 Formalization of cascade circuit analysis working from load to input: (consider 3-stage unilateral cascade) R B1 i B i B 1 Stage 1 Stage 2 3 Stage 3 2 i B OUT in BE g π g m BE g 0 BE g π g m BE g 0 BE g π g m BE g 0 R B2 R B3 R L OUT OUT IN IN i B Stage 1 2 i B Stage 2 3 i B Stage 3 OUT R B1 in BE g π g m BE g 0 BE g π g m BE g 0 BE g π g m BE g 0 R B2 R B3 R L

20 Formalization of cascade circuit analysis working from load to input: (consider 3-stage unilateral cascade) 1 i B R B1 Stage 1 2 i B Stage 2 3 i B Stage 3 OUT in BE g π g m BE g 0 BE g π g m BE g 0 BE g π g m BE g 0 R B2 R B3 R L Starting at output stage obtain: 3 i B BE Stage 3 g π g m BE g 0 R L OUT OUT IN IN 1 2 OUT 3

21 Formalization of cascade circuit analysis working from load to input: (consider 3-stage unilateral cascade) 1 i B R B1 Stage 1 2 i B Stage 2 3 i B Stage 3 OUT in BE g π g m BE g 0 BE g π g m BE g 0 BE g π g m BE g 0 R B2 R B3 R L Replace Stage 3 with R IN3 1 i B Stage 1 2 i B Stage 2 3 Stage 3 R B1 in BE g π g m BE g 0 g π g m BE g 0 RB2 BE R B3 R IN3 Analyze Stage 2: 2 i B BE Stage 2 3 g π g m BE g 0 R B3 R IN3 3 OUT 1 2 OUT 2 IN IN 1 3

22 Formalization of cascade circuit analysis working from load to input: (consider 3-stage unilateral cascade) 1 i B R B1 Stage 1 2 i B Stage 2 3 i B Stage 3 OUT in BE g π g m BE g 0 BE g π g m BE g 0 BE g π g m BE g 0 R B2 R B3 R L Replace Stage 2 with R IN2 1 i B Stage 1 2 R B1 in BE g π g m BE g 0 R B2 R IN2 Analyze Stage 1: 1 i B BE Stage 1 2 g π g m BE g 0 R B2 R IN2 2 OUT 1 3 OUT 1 IN IN 2 3

23 Formalization of cascade circuit analysis working from load to input: (consider 3-stage unilateral cascade) 1 i B R B1 Stage 1 2 i B Stage 2 3 i B Stage 3 OUT in BE g π g m BE g 0 BE g π g m BE g 0 BE g π g m BE g 0 R B2 R B3 R L Replace Stage 1 with R IN1 1 R B1 in R IN1 Analyze Stage 0: 1 OUT 2 3 OUT IN IN 1 2 3

24 Formalization of cascade circuit analysis working from load to input: (when stages are not unilateral) R S 1 R inx -A ox Model 2 R inx -A Model 3 R inx -A Model out in 1 R in1x A v1x 1 R in2x A v2x 2 R in3x A v3x 3 R L = R inx includes effects of all loading A X includes all loading (not typical dependent voltage source since dependent upon other circuit elements) Can not change any loading Analysis systematic and rather simple 1 1 OUT 2 3 OUT IN IN IN A A A 1X 2X 3X This was the approach used in analyzing the previous cascaded amplifier

25 Example: R S A B Q 2 out in R 1 //R 2 R 7 R 6 //R 8 R 3 //R 5 EE Observation: By working from the output back to the input we were able to create a sequence of steps where the circuit at each step looked EXACTLY like one of the four basic amplifiers. Engineers often follow a design approach that uses a cascade of the basic amplifiers and that is why it is often possible to follow this approach to analysis. Two other methods could have been used to analyze this circuit What are they?

26 Example: R S A B Q 2 out in R 1 //R 2 R 7 R 6 //R 8 R 3 //R 5 EE Two other methods could have been used to analyze this circuit 1. Create a two-port model of the two stages (for this example, since the first-stage is unilateral, it can be shown that ) out RiX1 R L1//RiX2 RL A A01 A02 in R ix1+rs R L1//R ix2+r0x1 R L+R0X2 A 01 and A 02 are open-loop two-port gain and are different than what used above 1. Small signal model could have been put in for and Q 2

27 Example: R S A B Q 2 out in R 1 //R 2 R 7 R 6 //R 8 R 3 //R 5 EE Two other methods could have been used to analyze this circuit 2. Put in small-signal model for and Q 2 and solve resultant circuit (not too difficult for this specific example ) 1. Small signal model could have been put in for and Q 2

28 Example: out A =? in Express in terms of small-signal parameters DD M 2 R C R B1 R D M 1 Q 3 C 1 C M 2 4 out R L in I 1 R B2 - SS

29 Example: DD M 2 R C R B1 R D 1 M 1 Q 3 C 1 2 C M 2 4 out R L in I 1 R B2 - SS Note: Even though the second stage has a resistor in the collector, the gain expressions developed for the common collector amplifier still apply A = -g R //R out 2 1 m1 m4 D L in g m2 + β3 R B1//RB2 -g 1

30 High-gain BJT amplifier in R C B DD C E EE out A -g m -gmrc g0 GC To make the gain large, it appears that all one needs to do is make R C large! A -g R m C -I R CQ But t is fixed at approx 25m and for good signal swing, I CQ R C <( DD- EE )/2 A If DD - EE =5, A DD t m t EE C 100 Gain is practically limited with this supply voltage to around 100

31 in R D G High-gain MOS amplifier DD D S SS out A g -gm G 0 D -g R m D To make the gain large, it appears that all one needs to do is make R D large! A -g R m D -2I R DQ D EB But EB is practically limited to around 100m and for good signal swing, I DQ R D <( DD- SS )/2 A DD EB If DD - SS =5 and EB =100m, A 5 100m SS Gain is practically limited with this supply voltage to around 100 Are these fundamental limits on the gain of the BJT and MOS Amplifiers? 50

32 High-gain amplifier DD i B OU I B OUT OUT IN BE g π g m BE IN IN EE This gain is very large! A -g 0 m Too good to be true! Need better model of MOS device!

33 High-gain amplifier DD I B OUT i B OUT OUT IN IN BE g π g m BE g 0 IN EE This gain is very large (but realistic)! -g A m g0 -ICQ A - I / AF t CQ AF t 200 A AF - t 25m 8000 But how can we make a current source?

34 High-gain amplifier DD A 8000 I B OUT IN EE How can we build the ideal current source? What is the small-signal model of an actual current source?

35 End of Lecture 33

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