Design of crystal oscillators
|
|
- Pearl Malone
- 6 years ago
- Views:
Transcription
1 Design of crystal oscillators Willy Sansen KULeuven, ESAT-MICAS Leuven, Belgium Willy Sansen
2 Table of contents Oscillation principles Crystals Single-transistor oscillator MOST oscillator circuits Bipolar-transistor oscillator circuits Other oscillators Willy Sansen
3 The Barkhausen criterion F(jω) V f V in V ε A(jω) Σ V out V out = A(jω) V ε V f = F(jω) V out = F(jω) A(jω) V ε V f V ε = A(jω) F(jω) Oscillation if V in = 0 or if Ref. Barkhausen, Hirzel, Leipzig, 935 V f = A(jω) F(jω).0 V ε Positive FB! V f = Φ V A + Φ F = 0 o ε Willy Sansen
4 Split analysis Z resonator Z circuit Y res +Y circ Y res +Y circ = 0 Z res + Z cir = 0 Z circ +Z res Z res Z circ = 0 Oscillation if Re (Z circ +Z res ) = 0 sets the minimum gain! Im (Z circ +Z res ) = 0 sets the frequency! Willy Sansen
5 Table of contents Oscillation principles Crystals Single-transistor oscillator MOST oscillator circuits Bipolar-transistor oscillator circuits Other oscillators Willy Sansen
6 Crystal as resonator d f s =.66 d f s in MHz if d in mm quartz L s C s R s (series) C p = A ε 0 ε r d ω s 2 = Ls C s ε r 4.5 f s = 2π L s C s C p (package, parallel) L s ω s = Cs ω s L s Q ω s = Rs C s Q= Rs C s R s = Q Cs ωs Willy Sansen
7 Crystal parameters L s C s R s C p Xtal : f s = MHz Q = 0 5 C s = 0.03 pf C p 6 pf ( 200 C s ) L s ω s = Cs ω s L s 8.4 mh R s = = 5.3 Ω QC s ω s f s L s C s R s C p Q 00.0 khz 52 H 49 ff 400 Ω 8 pf MHz 2 H 6 ff 24 Ω 3.4 pf MHz 0 mh 26 ff 5 Ω 8.5 pf Willy Sansen
8 Series and parallel resonance L C R f r = 2π LC L C Z Cap. Ind. Z R R Ind. Cap. -90 o + 90 o + 90 o -90 o R f r f f r f Willy Sansen
9 Crystal impedance s 2 L s C s +sr s C s + Z s (s) = (s 2 L s C s C p R s C s C p s (C s +C p ) + s + ) C s +C p C s +C p Z s (s) R s f s f p C p s f Willy Sansen
10 Crystal impedance at resonance Z 00 kω f p f s =.998 MHz C s = 2.2 ff L s 0.52 H C p = 4.27 pf 00 Ω f s R s = 82 Ω Φ(Z) 00 o 0 o 90 o induct. Crystal operates in inductive region if circuit is capacitive! -00 o -90 o capac MHz Willy Sansen
11 Series and parallel resonance Z s (ω) = -j ωc p ω 2 - ω s 2 ω 2 - ω p 2 ω s 2 = Ls C s ω p 2 = ( + ) L s C p C s Z s (ω) = R s +jωl s + jωc s series parallel Z s (ω) = R s + ( - ) j ω s C s 2p ω ω s ω s ω Frequency pulling factor p = ω - ω s ω s Z s (ω) R s + j ωcs Ref. Vittoz, JSSC June 88, Willy Sansen
12 Series or parallel resonance? f s f p = khz p p = 0.25 % C p f m = khz p m = 0.25 % f s = khz p s = 0 f m - f s C s p m = = = 0.25 % 4C p khz f p f s = + + p p = C s 2C p f s C s C p C s f p - f s 2C p = 0.25 % Willy Sansen
13 Table of contents Oscillation principles Crystals Single-transistor oscillator MOST oscillator circuits Bipolar-transistor oscillator circuits Other oscillators Willy Sansen
14 Single-transistor X-tal oscillator C 3 C 2 Basic three-point oscillator g m C C 2 C 2 C 3 C 3 C 3 C 2 g m g m g m C C C Pierce Colpitts : -pin X=D Santos : -pin X=G Willy Sansen
15 Single-transistor X-tal oscillator analysis C 3 = C p + C DG C 3 C 2 L s C s C 3 C g m R s g m C 2 Z s Z c C Barkhausen : Z s +Z c = 0 Z s = R s + j Re (Z c ) = -R s 2p Im (Z c ) = - ωc s yields g m yields f or p 2p ωc s Ref. Vittoz, JSSC June 88, Willy Sansen
16 Complex plane for 3-pt oscillator : Design crit. g mmax g m A Im -R s 0 Re g m = 0 Im 0 - C C 2 ω(c 2p 3 + ) C Im A = - Im +C 2 0 ω s C s Ø = ωc3 + C C +C 2 3 C C 2 Small p : Large C,2 B g m = Im - ωc3 Large circle: Small C 3 Willy Sansen
17 Complex plane for 3-pt oscillator : Example -6 kω -80 Ω Im -R s 0 Re C = C 2 = 3 pf C 3 = 0.5 pf 20 MHz 80 Ω A g m = 0 Im 0-4 kω g mmax 3 ms 2p A Im A = - ωc s Ø = 2 kω p A = C s C 2(C 3 + C 2 ) C +C 2 g ma R s C C 2 ω s 2 g mb 450 ms B g m = Im - 6 kω µs Willy Sansen
18 Amplitude of oscillation i ds I ds I DSA t I ds V gs = = g ma 2 π I ds I DSA 2 I DSA g ma V GS -V T 2 kt V gs V GS -V T or 2n in wi q Large! I ds I DSA Nonlinear (Bessel) More spiked for higher C,2!!! Willy Sansen
19 Start-up of oscillation τ min occurs at g m g mmax τ min = L s Re (Z s ) + R s Re (Z s ) is half circle Ø Re (Z s ) = if C ω s C 3 <<C 2 3 R s << Re (Z s ) 2 C τ min since C C s ω s C s ωs or also τ min 2Q R s C 3 Willy Sansen
20 Power dissipation In MOST : g ma ω s 2 R s C C 2 R s (C ω s ) 2 I DSA g V GS -V T ma 2 µa 6 µw 2 V gs In X-tal : I c = = V gs C ω s V GS -V T C ω s Z C R s I 2 c R P c = = s V GS -V T 2 (C ω s ) = V GS -V T 2 g ma 0.2 µw 2 Willy Sansen
21 Design procedure for X-tal oscillators - X-tal : f s f p R s C p (or f s Q C s C p ) (Q = / ω s C s R s ). Take : C 3 > C p but as small as possible C s Pulling factor p = 2 C C 3 + C 2 2 C +C 2 C s C L C C L = = 2 C 2 2 C s If p < it is a series oscillator (best!) 4C p If p > it is a parallel oscillator (not stable!) Choose C L large (> C 3 ), subject to power dissipation! Willy Sansen
22 Design procedure for X-tal oscillators Calculate g ma R s C 2 ω L ω 2 s s ( C L C L ) C s Q and take g mstart 0 g ma 3. Choose V GS -V T, which gives the amplitude V gs g m (V GS -V T ) and current I DS = and W 2 L and power P = (V GS -V T ) 2 g m 2 4. Verify that biasing R B > / (R s C 3 2 ω s 2 ) Willy Sansen
23 Single-transistor X-tal oscillator C 3 C 2 Basic three-point oscillator g m C C 2 C 2 C 3 C 3 C 3 C 2 g m g m g m C C C Pierce Colpitts : -pin X=D Santos : -pin X=G Willy Sansen
24 Pierce X-tal oscillator I B V B R B C 3 C 2 g m C 32 khz.2 V 78 na Willy Sansen
25 Colpitts X-tal oscillator I B C 2 v OUT v OUT V B g m C 3 C 2 C 3 C C Crystal grounded : single-pin : X = D Willy Sansen
26 Santos X-tal oscillator i OUT I B (AGC) V B R B g m C v OUT C 3 C v OUT C 2 g m R B C 2 I B (AGC) C 3 Crystal grounded : single-pin : X = G Ref. Santos, JSSC April 84, Ref. Redman-White, JSSC Feb.90, Willy Sansen
27 Table of contents Oscillation principles Crystals Single-transistor oscillator MOST oscillator circuits Bipolar-transistor oscillator circuits Other oscillators Willy Sansen
28 Practical Pierce X-tal oscillator M5 M4 C C c M M6 00 MΩ C 2 C s = 0.5 ff C 3 = 0.6 pf C = C 2 = 2.8 pf 2 MHz M3 M2 g ma = 2 µs I DSA = 80 na I DS = 350 na V gs = 300 mv Ref. Vittoz, JSSC June 88, Willy Sansen
29 Full schematic Ref. Vittoz, JSSC June 88, Willy Sansen
30 Single-pin oscillator with crystal to Gate C C2 R B M OUT f s = MHz f p = 0.02 MHz C s = 24.3 ff C o = 7.4 pf L = 0.4 mh R = 7.2 Ω (?) p = C = C 2 = 50 pf g ma = 350 µs I DSA = 90 µa (V GS -V T = 0.5 V) Willy Sansen
31 Single-pin oscillator - g m + - g m g m C load C R B C 2 g m = R s (C s ω 0 ) 2 DC unstable! Positive FB dominant at crystal frequency! Ref. van den Homberg, JSSC July 99, Willy Sansen
32 Single-pin oscillator MHz, 3.3 V, 0.35 ma Ref. van den Homberg, JSSC July 99, Willy Sansen
33 X-tal oscillators with CMOS inverters = Large current peaks! Bad PSRR!! Willy Sansen
34 Table of contents Oscillation principles Crystals Single-transistor oscillator MOST oscillator circuits Bipolar-transistor oscillator circuits Other oscillators Willy Sansen
35 Pierce X-tal oscillator I B R 2 C 3 C C 2 R L vout C 3 C 2 V B R B g m R C Willy Sansen
36 Colpitts X-tal oscillator I B C 2 v OUT v OUT V B g m C 3 C 2 C 3 C C Crystal grounded : single-pin : X = D Willy Sansen
37 Santos X-tal oscillator V B R B g m C 3 C C 2 v OUT I B (AGC) Crystal grounded : single-pin : X = G Buffered output Ref. Santos, JSSC April 84, Ref. Redman-White, JSSC Feb.90, Willy Sansen
38 98 GHz VCO in SiGe Bipolar technology Colpitts 0.55 x 0.45 mm 2 ma at - 5 V -97 dbc/hz at MHz Ref. Prendl BCTM Toulouse 03 Willy Sansen
39 Positive feedback circuits - R L Q Q 2 v OUT T=g m R L R L >R s Ref. Nordholt, CAS 90, Willy Sansen
40 Positive feedback circuits Ω 200 v OUT Buffered ouput! Ω 500 µa 250 Ref. Nordholt, CAS 90, Willy Sansen
41 Positive feedback circuits - 3 g ma = 8 ms 00 MHz Ref. Nordholt, CAS 90, Willy Sansen
42 Table of contents Oscillation principles Crystals Single-transistor oscillator MOST oscillator circuits Bipolar-transistor oscillator circuits Other oscillators Willy Sansen
43 Voltage Controlled Oscillator I B R L L L R L ω s = LC D C D V c C D g ma R L (C D ω s )2 v OUT v OUT dv 2 out { ω}= 4 ω s 4kTR L ( + ) ( ) 2 df 3 ω Ref. Craninckx, ACD Kluwer 96, ; JSSC May 97, Willy Sansen
44 Differential crystal Oscillator R R v OUT v OUT C I B I B Willy Sansen
45 Relaxation Oscillator R R v OUT v OUT C I B I B Ref. Grebene, JSSC, Aug.69, 0-22; Gray, Meyer, Wiley, 984. Willy Sansen
46 RC Oscillators : 3 x 60 o = 80 o C R C R C R f c = φ 0-45 o -90 o -60 o at.73 f c 2π RC f c f - + V out Willy Sansen
47 Wien Oscillator : 3 x Gain required C R V ε + 2τ s + τ = 2 s 2 V out 3 + 3τ s + τ 2 s 2 C R V ε + - 2R V out φ τ = RC f osc = 2π τ R 0 f Willy Sansen
48 Voltage-controlled X-tal oscillator ± C Res. Resonator 457 khz Tuning ± 5 khz Wien bridge : R 2 = 2 R Ref. Huang, JSSC June 88, Willy Sansen
49 Variable capacitance ± C G m block ± C I 2 Y in = sc d G m R d 25 R d C d block ± G m with I 2 Ref. Huang JSSC June 88, Willy Sansen
50 G m block to generate ± G m I = 90 µa I 2 = 0 80 µa G m = B [(2βI ) /2 -(2βI 2 ) /2 ] Willy Sansen
51 R d C d block as differentiator C d = 4 pf R d = 40 kω Ref. Huang JSSC June 88, Willy Sansen
52 Table of contents Oscillation principles Crystals Single-transistor oscillator MOST oscillator circuits Bipolar-transistor oscillator circuits Other oscillators Willy Sansen
53 References X-tal oscillators - A.Abidi, "Low-noise oscillators, PLL s and synthesizers", in R. van de Plassche, W.Sansen, H. Huijsing, "Analog Circuit Design", Kluwer Academic Publishers, 997. J. Craninckx, M. Steyaert, "Low-phase-noise gigahertz voltage-controlled oscillators in CMOS", in H. Huijsing, R. van de Plassche, W.Sansen, "Analog Circuit Design", Kluwer Academic Publishers, 996, pp Q.T. Huang, W. Sansen, M. Steyaert, P.Van Peteghem, "Design and implementation of a CMOS VCXO for FM stereo decoders", IEEE Journal Solid-State Circuits Vol. 23, No.3, June 988, pp E. Nordholt, C. Boon, "Single-pin crystal oscillators" IEEE Trans. Circuits. Syst. Vol.37, No.2, Feb.990, pp D. Pederson, K.Mayaram, Analog integrated circuits for communications, Kluwer Academic Publishers, 99. Willy Sansen
54 References X-tal oscillators - 2 W. Redman-White, R. Dunn, R. Lucas, P. Smithers, "A radiation hard AGC stabilised SOS crystal oscillator", IEEE Journal Solid-State Circuits Vol. 25, No., Feb. 990, pp J. Santos, R. Meyer, "A one pin crystal oscillator for VLSI circuits", IEEE Journal Solid-State Circuits Vol. 9, No.2, April 984, pp M. Soyer, "Design considerations for high-frequency crystal oscillators", IEEE Journal Solid-State Circuits Vol. 26, No.9, June 99, pp E. Vittoz, M. Degrauwe, S. Bitz, "High-performance crystal oscillator circuits: Theory and application", IEEE Journal Solid-State Circuits Vol. 23, No.3, June 988, pp V. von Kaenel, E. Vittoz, D. Aebischer, " Crystal oscillators", in H. Huijsing, R. van de Plassche, W.Sansen, "Analog Circuit Design", Kluwer Academic Publishers, 996, pp Willy Sansen
55 Appendix: Polar diagrams Willy Sansen Willy Sansen
56 Amplitude, phase, Real & Imaginary Im φ Re = Re 2 + Im 2 tg(φ) = Im Re Re = cos (φ) Im = sin (φ) Willy Sansen
57 Polar diagram of RC network - Z R Im Z Z C C R 0 Im 0 ω = ω = 0 Cω R Z = R + ω = Cjω Re Re ω = 0 ω = RC Willy Sansen
58 Polar diagram of RC network - 2 Z C Z = R + Cjω R Im 0 Im 0 R ω = 0 R = ω = ω = ω C RC R = Re Re R = 0 Willy Sansen
59 Polar diagram of RC network - 3 Z Im 0 R ω = ω = 0 Re R Z = R + RCjω C Im 0 R = 0 ω = R = RC ωc Re - ωc R = Willy Sansen
60 Polar diagram of RC network - 4 Z R C Im 0 R ω = ω = 0 Re Z r R Z = R + RCjω C 0 r ω = ω = 0 R+r Re Z = r + R + RCjω ω = RC Ref. Sansen, JSSC Dec.72, Willy Sansen
61 Polar diagram of RC network - 5 Z R C Im 0 R = 0 Re Im 0 Re Z C 2 Z = R + RCjω - ωc 2 R = 0 R = Z = + jωc 2 R C R + RC jω - ωc R = C +C 2 - ωc C 2 R = ωc Willy Sansen
62 Circuit input impedance Zc Z c g m + 2 jωc C jωc 3 (g m + jωc ) C 3 C 3 C 2 if C 3 << C = C 2 g m = C Z c C For g m 0 Z c0 2 /ωc For g m Z c /ωc 3 Willy Sansen
63 Complex plane for 3-point oscillator g mmax g m A Im -R s 0 Re g m = 0 Im 0 - C C 2 ω(c 2p 3 + ) C Im A = - Im +C 2 0 ω s C s C 3 C 2 C B Ø = ωc3 g m = + C 3 C +C 2 C C 2 Im - ωc3 - + C 3 Willy Sansen
64 Calculation of g ma Z c C 3 = R S Z c = g ma C 2 = C C 3 s g m + (C +C 2 )s C C 2 g m + (C +C 2 + )s C 3 C Re (Z c ) = R s For small g m : g ma R s (C eff ω s ) 2 2C 3 C eff = C ( + ) C C Maximum negative resistance is / 2ωC 3 at g mmax = ωc C C 3 Willy Sansen
Systematic Design of Operational Amplifiers
Systematic Design of Operational Amplifiers Willy Sansen KULeuven, ESAT-MICAS Leuven, Belgium willy.sansen@esat.kuleuven.be Willy Sansen 10-05 061 Table of contents Design of Single-stage OTA Design of
More informationAmplifiers, Source followers & Cascodes
Amplifiers, Source followers & Cascodes Willy Sansen KULeuven, ESAT-MICAS Leuven, Belgium willy.sansen@esat.kuleuven.be Willy Sansen 0-05 02 Operational amplifier Differential pair v- : B v + Current mirror
More informationStability of Operational amplifiers
Stability o Operational ampliiers Willy Sansen KULeuven, ESAT-MICAS Leuven, Belgium willy.sansen@esat.kuleuven.be Willy Sansen 0-05 05 Table o contents Use o operational ampliiers Stability o 2-stage opamp
More informationFeedback Transimpedance & Current Amplifiers
Feedback Transimpedance & Current Amplifiers Willy Sansen KULeuven, ESATMICAS Leuven, Belgium willy.sansen@esat.kuleuven.be Willy Sansen 1005 141 Table of contents Introduction Shuntshunt FB for Transimpedance
More informationElectronic Circuits EE359A
Electronic Circuits EE359A Bruce McNair B206 bmcnair@stevens.edu 201-216-5549 Lecture 18 379 Signal Generators and Waveform-shaping Circuits Ch 17 380 Stability in feedback systems Feedback system Bounded
More informationCHAPTER 14 SIGNAL GENERATORS AND WAVEFORM SHAPING CIRCUITS
CHAPTER 4 SIGNA GENERATORS AND WAEFORM SHAPING CIRCUITS Chapter Outline 4. Basic Principles of Sinusoidal Oscillators 4. Op Amp RC Oscillators 4.3 C and Crystal Oscillators 4.4 Bistable Multivibrators
More informationIntroduction to CMOS RF Integrated Circuits Design
V. Voltage Controlled Oscillators Fall 2012, Prof. JianJun Zhou V-1 Outline Phase Noise and Spurs Ring VCO LC VCO Frequency Tuning (Varactor, SCA) Phase Noise Estimation Quadrature Phase Generator Fall
More informationEE 560 CHIP INPUT AND OUTPUT (I/0) CIRCUITS. Kenneth R. Laker, University of Pennsylvania
1 EE 560 CHIP INPUT AND OUTPUT (I/0) CIRCUITS 2 -> ESD PROTECTION CIRCUITS (INPUT PADS) -> ON-CHIP CLOCK GENERATION & DISTRIBUTION -> OUTPUT PADS -> ON-CHIP NOISE DUE TO PARASITIC INDUCTANCE -> SUPER BUFFER
More informationVoltage-Controlled Oscillator (VCO)
Voltage-Controlled Oscillator (VCO) Desirable characteristics: Monotonic f osc vs. V C characteristic with adequate frequency range f max f osc Well-defined K vco f min slope = K vco VC V C in V K F(s)
More informationLecture 23: Negative Resistance Osc, Differential Osc, and VCOs
EECS 142 Lecture 23: Negative Resistance Osc, Differential Osc, and VCOs Prof. Ali M. Niknejad University of California, Berkeley Copyright c 2005 by Ali M. Niknejad A. M. Niknejad University of California,
More informationECE-343 Test 2: Mar 21, :00-8:00, Closed Book. Name : SOLUTION
ECE-343 Test 2: Mar 21, 2012 6:00-8:00, Closed Book Name : SOLUTION 1. (25 pts) (a) Draw a circuit diagram for a differential amplifier designed under the following constraints: Use only BJTs. (You may
More informationLecture 37: Frequency response. Context
EECS 05 Spring 004, Lecture 37 Lecture 37: Frequency response Prof J. S. Smith EECS 05 Spring 004, Lecture 37 Context We will figure out more of the design parameters for the amplifier we looked at in
More informationUniversity of Toronto. Final Exam
University of Toronto Final Exam Date - Dec 16, 013 Duration:.5 hrs ECE331 Electronic Circuits Lecturer - D. Johns ANSWER QUESTIONS ON THESE SHEETS USING BACKS IF NECESSARY 1. Equation sheet is on last
More informationAdvanced Current Mirrors and Opamps
Advanced Current Mirrors and Opamps David Johns and Ken Martin (johns@eecg.toronto.edu) (martin@eecg.toronto.edu) slide 1 of 26 Wide-Swing Current Mirrors I bias I V I in out out = I in V W L bias ------------
More informationBipolar junction transistors
Bipolar junction transistors Find parameters of te BJT in CE configuration at BQ 40 µa and CBQ V. nput caracteristic B / µa 40 0 00 80 60 40 0 0 0, 0,5 0,3 0,35 0,4 BE / V Output caracteristics C / ma
More informationAdvanced Analog Integrated Circuits. Operational Transconductance Amplifier I & Step Response
Advanced Analog Integrated Circuits Operational Transconductance Amplifier I & Step Response Bernhard E. Boser University of California, Berkeley boser@eecs.berkeley.edu Copyright 2016 by Bernhard Boser
More information55:041 Electronic Circuits The University of Iowa Fall Final Exam
Final Exam Name: Score Max: 135 Question 1 (1 point unless otherwise noted) a. What is the maximum theoretical efficiency for a class-b amplifier? Answer: 78% b. The abbreviation/term ESR is often encountered
More informationAdvantages of Using CMOS
Advantages of Using CMOS Compact (shared diffusion regions) Very low static power dissipation High noise margin (nearly ideal inverter voltage transfer characteristic) Very well modeled and characterized
More informationElectronic Circuits Summary
Electronic Circuits Summary Andreas Biri, D-ITET 6.06.4 Constants (@300K) ε 0 = 8.854 0 F m m 0 = 9. 0 3 kg k =.38 0 3 J K = 8.67 0 5 ev/k kt q = 0.059 V, q kt = 38.6, kt = 5.9 mev V Small Signal Equivalent
More informationECE-343 Test 1: Feb 10, :00-8:00pm, Closed Book. Name : SOLUTION
ECE-343 Test : Feb 0, 00 6:00-8:00pm, Closed Book Name : SOLUTION C Depl = C J0 + V R /V o ) m C Diff = τ F g m ω T = g m C µ + C π ω T = g m I / D C GD + C or V OV GS b = τ i τ i = R i C i ω H b Z = Z
More informationECE 3050A, Spring 2004 Page 1. FINAL EXAMINATION - SOLUTIONS (Average score = 78/100) R 2 = R 1 =
ECE 3050A, Spring 2004 Page Problem (20 points This problem must be attempted) The simplified schematic of a feedback amplifier is shown. Assume that all transistors are matched and g m ma/v and r ds.
More informationAssignment 3 ELEC 312/Winter 12 R.Raut, Ph.D.
Page 1 of 3 ELEC 312: ELECTRONICS II : ASSIGNMENT-3 Department of Electrical and Computer Engineering Winter 2012 1. A common-emitter amplifier that can be represented by the following equivalent circuit,
More informationFinal Exam. 55:041 Electronic Circuits. The University of Iowa. Fall 2013.
Final Exam Name: Max: 130 Points Question 1 In the circuit shown, the op-amp is ideal, except for an input bias current I b = 1 na. Further, R F = 10K, R 1 = 100 Ω and C = 1 μf. The switch is opened at
More informationECEN 610 Mixed-Signal Interfaces
ECEN 610 Mixed-Signal Interfaces Sebastian Hoyos Texas A&M University Analog and Mixed Signal Group Spring 014 S. Hoyos-ECEN-610 1 Sample-and-Hold Spring 014 S. Hoyos-ECEN-610 ZOH vs. Track-and-Hold V(t)
More informationHomework Assignment 08
Homework Assignment 08 Question 1 (Short Takes) Two points each unless otherwise indicated. 1. Give one phrase/sentence that describes the primary advantage of an active load. Answer: Large effective resistance
More informationENGN3227 Analogue Electronics. Problem Sets V1.0. Dr. Salman Durrani
ENGN3227 Analogue Electronics Problem Sets V1.0 Dr. Salman Durrani November 2006 Copyright c 2006 by Salman Durrani. Problem Set List 1. Op-amp Circuits 2. Differential Amplifiers 3. Comparator Circuits
More informationR-L-C Circuits and Resonant Circuits
P517/617 Lec4, P1 R-L-C Circuits and Resonant Circuits Consider the following RLC series circuit What's R? Simplest way to solve for is to use voltage divider equation in complex notation. X L X C in 0
More informationBasic Principles of Sinusoidal Oscillators
Basic Principles of Sinusoidal Oscillators Linear oscillator Linear region of circuit: linear oscillation Nonlinear region of circuit: amplitudes stabilization Barkhausen criterion X S Amplifier A X O
More informationINTEGRATED CIRCUITS. For a complete data sheet, please also download:
INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family Specificatio The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS
More informationINTEGRATED CIRCUITS. For a complete data sheet, please also download:
INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS
More informationDESIGN MICROELECTRONICS ELCT 703 (W17) LECTURE 3: OP-AMP CMOS CIRCUIT. Dr. Eman Azab Assistant Professor Office: C
MICROELECTRONICS ELCT 703 (W17) LECTURE 3: OP-AMP CMOS CIRCUIT DESIGN Dr. Eman Azab Assistant Professor Office: C3.315 E-mail: eman.azab@guc.edu.eg 1 TWO STAGE CMOS OP-AMP It consists of two stages: First
More informationEECS240 Spring Today s Lecture. Lecture 2: CMOS Technology and Passive Devices. Lingkai Kong EECS. EE240 CMOS Technology
EECS240 Spring 2013 Lecture 2: CMOS Technology and Passive Devices Lingkai Kong EECS Today s Lecture EE240 CMOS Technology Passive devices Motivation Resistors Capacitors (Inductors) Next time: MOS transistor
More informationDATA SHEET. PMBFJ308; PMBFJ309; PMBFJ310 N-channel silicon field-effect transistors DISCRETE SEMICONDUCTORS
DISCRETE SEMICONDUCTORS DATA SHEET N-channel silicon field-effect transistors Supersedes data of April 995 File under Discrete Semiconductors, SC7 996 Sep FEATURES Low noise Interchangeability of drain
More informationCircle the one best answer for each question. Five points per question.
ID # NAME EE-255 EXAM 3 November 8, 2001 Instructor (circle one) Talavage Gray This exam consists of 16 multiple choice questions and one workout problem. Record all answers to the multiple choice questions
More informationLecture 4: R-L-C Circuits and Resonant Circuits
Lecture 4: R-L-C Circuits and Resonant Circuits RLC series circuit: What's V R? Simplest way to solve for V is to use voltage divider equation in complex notation: V X L X C V R = in R R + X C + X L L
More informationSwitched-Capacitor Circuits David Johns and Ken Martin University of Toronto
Switched-Capacitor Circuits David Johns and Ken Martin University of Toronto (johns@eecg.toronto.edu) (martin@eecg.toronto.edu) University of Toronto 1 of 60 Basic Building Blocks Opamps Ideal opamps usually
More informationLecture 16 Crystal oscillators
Lecture 16 Crystal oscillators Internal structure Analysis of a harmonic oscillator Frequency response of the crystal oscillator The 4060 oscillator driver / counter http://www.mineralminers.com/html/phantom_quartz_crystal.htm
More informationID # NAME. EE-255 EXAM 3 April 7, Instructor (circle one) Ogborn Lundstrom
ID # NAME EE-255 EXAM 3 April 7, 1998 Instructor (circle one) Ogborn Lundstrom This exam consists of 20 multiple choice questions. Record all answers on this page, but you must turn in the entire exam.
More informationAt point G V = = = = = = RB B B. IN RB f
Common Emitter At point G CE RC 0. 4 12 0. 4 116. I C RC 116. R 1k C 116. ma I IC 116. ma β 100 F 116µ A I R ( 116µ A)( 20kΩ) 2. 3 R + 2. 3 + 0. 7 30. IN R f Gain in Constant Current Region I I I C F
More informationEE 230 Lecture 24. Waveform Generators. - Sinusoidal Oscillators
EE 230 Lecture 24 Waveform Generators - Sinusoidal Oscillators Quiz 18 Determine the characteristic equation for the following network without adding an excitation. C R L And the number is? 1 3 8 2? 6
More informationConventional Paper I (a) (i) What are ferroelectric materials? What advantages do they have over conventional dielectric materials?
Conventional Paper I-03.(a) (i) What are ferroelectric materials? What advantages do they have over conventional dielectric materials? (ii) Give one example each of a dielectric and a ferroelectric material
More informationMICROELECTRONIC CIRCUIT DESIGN Second Edition
MICROELECTRONIC CIRCUIT DESIGN Second Edition Richard C. Jaeger and Travis N. Blalock Answers to Selected Problems Updated 10/23/06 Chapter 1 1.3 1.52 years, 5.06 years 1.5 2.00 years, 6.65 years 1.8 113
More informationStudio 9 Review Operational Amplifier Stability Compensation Miller Effect Phase Margin Unity Gain Frequency Slew Rate Limiting Reading: Text sec 5.
Studio 9 Review Operational Amplifier Stability Compensation Miller Effect Phase Margin Unity Gain Frequency Slew Rate Limiting Reading: Text sec 5.2 pp. 232-242 Two-stage op-amp Analysis Strategy Recognize
More informationIXBK55N300 IXBX55N300
High Voltage, High Gain BiMOSFET TM Monolithic Bipolar MOS Transistor IXBK55N3 IXBX55N3 V CES = 3V 11 = 55A V CE(sat) 3.2V TO-264 (IXBK) Symbol Test Conditions Maximum Ratings V CES = 25 C to 15 C 3 V
More information3. Basic building blocks. Analog Design for CMOS VLSI Systems Franco Maloberti
Inverter with active load It is the simplest gain stage. The dc gain is given by the slope of the transfer characteristics. Small signal analysis C = C gs + C gs,ov C 2 = C gd + C gd,ov + C 3 = C db +
More informationECE 438: Digital Integrated Circuits Assignment #4 Solution The Inverter
ECE 438: Digital Integrated Circuits Assignment #4 The Inverter Text: Chapter 5, Digital Integrated Circuits 2 nd Ed, Rabaey 1) Consider the CMOS inverter circuit in Figure P1 with the following parameters.
More informationIXBK55N300 IXBX55N300
High Voltage, High Gain BiMOSFET TM Monolithic Bipolar MOS Transistor V CES = V 11 = 55A V CE(sat) 3.2V TO-264 (IXBK) Symbol Test Conditions Maximum Ratings V CES = 25 C to 15 C V V CGR = 25 C to 15 C,
More informationEE221 Circuits II. Chapter 14 Frequency Response
EE22 Circuits II Chapter 4 Frequency Response Frequency Response Chapter 4 4. Introduction 4.2 Transfer Function 4.3 Bode Plots 4.4 Series Resonance 4.5 Parallel Resonance 4.6 Passive Filters 4.7 Active
More informationDATA SHEET. HEF4067B MSI 16-channel analogue multiplexer/demultiplexer. For a complete data sheet, please also download: INTEGRATED CIRCUITS
INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF,
More informationSinusoidal Steady-State Analysis
Chapter 4 Sinusoidal Steady-State Analysis In this unit, we consider circuits in which the sources are sinusoidal in nature. The review section of this unit covers most of section 9.1 9.9 of the text.
More informationQ. 1 Q. 25 carry one mark each.
GATE 5 SET- ELECTRONICS AND COMMUNICATION ENGINEERING - EC Q. Q. 5 carry one mark each. Q. The bilateral Laplace transform of a function is if a t b f() t = otherwise (A) a b s (B) s e ( a b) s (C) e as
More informationDATA SHEET. BF245A; BF245B; BF245C N-channel silicon field-effect transistors DISCRETE SEMICONDUCTORS
DISCRETE SEMICONDUCTORS DATA SHEET N-channel silicon field-effect transistors Supersedes data of April 995 File under Discrete Semiconductors, SC7 996 Jul FEATURES Interchangeability of drain and source
More informationCOURSE OUTLINE. Introduction Signals and Noise Filtering Sensors: Piezoelectric Force Sensors. Sensors, Signals and Noise 1
Sensors, Signals and Noise 1 COURSE OUTLINE Introduction Signals and Noise Filtering Sensors: Piezoelectric Force Sensors Piezoelectric Force Sensors 2 Piezoelectric Effect and Materials Piezoelectric
More informationIXBT12N300 IXBH12N300
High Voltage, High Gain BIMOSFET TM Monolithic Bipolar MOS Transistor S 11 = 3V = A (sat) 3.2V TO-26 (IXBT) Symbol Test Conditions Maximum Ratings S = 25 C to 15 C 3 V V CGR = 25 C to 15 C, R GE = 1MΩ
More informationCMOS Cross Section. EECS240 Spring Dimensions. Today s Lecture. Why Talk About Passives? EE240 Process
EECS240 Spring 202 CMOS Cross Section Metal p - substrate p + diffusion Lecture 2: CMOS Technology and Passive Devices Poly n - well n + diffusion Elad Alon Dept. of EECS EECS240 Lecture 2 4 Today s Lecture
More informationUniversity of Toronto. Final Exam
University of Toronto Final Exam Date - Apr 18, 011 Duration:.5 hrs ECE334 Digital Electronics Lecturer - D. Johns ANSWER QUESTIONS ON THESE SHEETS USING BACKS IF NECESSARY 1. Equation sheet is on last
More information6.1 Introduction
6. Introduction A.C Circuits made up of resistors, inductors and capacitors are said to be resonant circuits when the current drawn from the supply is in phase with the impressed sinusoidal voltage. Then.
More informationELECTROMAGNETIC OSCILLATIONS AND ALTERNATING CURRENT
Chapter 31: ELECTROMAGNETIC OSCILLATIONS AND ALTERNATING CURRENT 1 A charged capacitor and an inductor are connected in series At time t = 0 the current is zero, but the capacitor is charged If T is the
More informationUNIVERSITY OF CALIFORNIA College of Engineering Department of Electrical Engineering and Computer Sciences
UNIVERSITY OF CALIFORNIA College of Engineering Department of Electrical Engineering and Computer Sciences E. Alon Final EECS 240 Monday, May 19, 2008 SPRING 2008 You should write your results on the exam
More informationChapter 13 Small-Signal Modeling and Linear Amplification
Chapter 13 Small-Signal Modeling and Linear Amplification Microelectronic Circuit Design Richard C. Jaeger Travis N. Blalock 1/4/12 Chap 13-1 Chapter Goals Understanding of concepts related to: Transistors
More informationThe current source. The Active Current Source
V ref + - The current source Minimum noise euals: Thevenin Norton = V ref DC current through resistor gives an increase of /f noise (granular structure) Accuracy of source also determined by the accuracy
More informationIXBT20N360HV IXBH20N360HV
High Voltage, High Gain BIMOSFT TM Monolithic Bipolar MOS Transistor Advance Technical Information V CS = V = A V C(sat).V TO-HV (IXBT) Symbol Test Conditions Maximum Ratings V CS = C to C V V CGR = C
More informationThe Wien Bridge Oscillator Family
Downloaded from orbit.dtu.dk on: Dec 29, 207 The Wien Bridge Oscillator Family Lindberg, Erik Published in: Proceedings of the ICSES-06 Publication date: 2006 Link back to DTU Orbit Citation APA): Lindberg,
More informationChapter 10 Feedback. PART C: Stability and Compensation
1 Chapter 10 Feedback PART C: Stability and Compensation Example: Non-inverting Amplifier We are analyzing the two circuits (nmos diff pair or pmos diff pair) to realize this symbol: either of the circuits
More informationLecture 04: Single Transistor Ampliers
Lecture 04: Single Transistor Ampliers Analog IC Design Dr. Ryan Robucci Department of Computer Science and Electrical Engineering, UMBC Spring 2015 Dr. Ryan Robucci Lecture IV 1 / 37 Single-Transistor
More informationVidyalankar S.E. Sem. III [EXTC] Analog Electronics - I Prelim Question Paper Solution
. (a) S.E. Sem. [EXTC] Analog Electronics - Prelim Question Paper Solution Comparison between BJT and JFET BJT JFET ) BJT is a bipolar device, both majority JFET is an unipolar device, electron and minority
More informationDynamic operation 20
Dynamic operation 20 A simple model for the propagation delay Symmetric inverter (rise and fall delays are identical) otal capacitance is linear t p Minimum length devices R W C L t = 0.69R C = p W L 0.69
More informationIXBT24N170 IXBH24N170
High Voltage, High Gain BIMOSFET TM Monolithic Bipolar MOS Transistor IXBT24N17 IXBH24N17 S 11 = 1 = 24A (sat) 2. TO-26 (IXBT) Symbol Test Conditions Maximum Ratings S = 25 C to 15 C 17 V V CGR = 25 C
More informationPiecewise Curvature-Corrected Bandgap Reference in 90 nm CMOS
IJSTE - International Journal of Science Technology & Engineering Volume 1 Issue 2 August 2014 ISSN(online) : 2349-784X Piecewise Curvature-Corrected Bandgap Reference in 90 nm CMOS P R Pournima M.Tech
More informationExact Analysis of a Common-Source MOSFET Amplifier
Exact Analysis of a Common-Source MOSFET Amplifier Consider the common-source MOSFET amplifier driven from signal source v s with Thévenin equivalent resistance R S and a load consisting of a parallel
More informationCARNEGIE MELLON UNIVERSITY DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING DIGITAL INTEGRATED CIRCUITS FALL 2002
CARNEGIE MELLON UNIVERSITY DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING 18-322 DIGITAL INTEGRATED CIRCUITS FALL 2002 Final Examination, Monday Dec. 16, 2002 NAME: SECTION: Time: 180 minutes Closed
More informationHigh Speed Communication Circuits and Systems Lecture 4 Generalized Reflection Coefficient, Smith Chart, Integrated Passive Components
High Speed Communication Circuits and Systems Lecture 4 Generalized Reflection Coefficient, Smith Chart, Integrated Passive Components Michael H. Perrott February 11, 2004 Copyright 2004 by Michael H.
More informationFrequency Detection of CDRs (1)
Frequency Detection of CDs (1) ecall that faster PLL locking can be accomplished by use of a phase-frequency detector (PFD): V in V up V up V dn -4 π -2 π +2 π +4 π φ in φ out 2V swing V f V dn K pd =
More informationDriven RLC Circuits Challenge Problem Solutions
Driven LC Circuits Challenge Problem Solutions Problem : Using the same circuit as in problem 6, only this time leaving the function generator on and driving below resonance, which in the following pairs
More informationAC Circuits Homework Set
Problem 1. In an oscillating LC circuit in which C=4.0 μf, the maximum potential difference across the capacitor during the oscillations is 1.50 V and the maximum current through the inductor is 50.0 ma.
More informationENGR-4300 Spring 2009 Test 2. Name: SOLUTION. Section: 1(MR 8:00) 2(TF 2:00) 3(MR 6:00) (circle one) Question I (20 points): Question II (20 points):
ENGR43 Test 2 Spring 29 ENGR43 Spring 29 Test 2 Name: SOLUTION Section: 1(MR 8:) 2(TF 2:) 3(MR 6:) (circle one) Question I (2 points): Question II (2 points): Question III (17 points): Question IV (2 points):
More informationECE-342 Test 3: Nov 30, :00-8:00, Closed Book. Name : Solution
ECE-342 Test 3: Nov 30, 2010 6:00-8:00, Closed Book Name : Solution All solutions must provide units as appropriate. Unless otherwise stated, assume T = 300 K. 1. (25 pts) Consider the amplifier shown
More informationCharge Pump. Loop Filter. VCO Divider
FEATURES PIN CONFIGURATION Low phase noise XO Input from crystal or clock at 10-27MHz. Integrated crystal load capacitor: no external load capacitor required. Output clocks up to 160MHz. Low phase noise
More informationPOWER SUPPLY INDUCED JITTER MODELING OF AN ON- CHIP LC OSCILLATOR. Shahriar Rokhsaz, Jinghui Lu, Brian Brunn
POWER SUPPY INDUED JITTER MODEING OF AN ON- HIP OSIATOR Shahriar Rokhsaz, Jinghui u, Brian Brunn Rockethips Inc. (A Xilinx, Inc. Division) ABSTRAT This paper concentrates on developing a closed-form small
More informationIXBX50N360HV. = 3600V = 50A V CE(sat) 2.9V. BiMOSFET TM Monolithic Bipolar MOS Transistor High Voltage, High Frequency. Advance Technical Information
BiMOSFET TM Monolithic Bipolar MOS Transistor High Voltage, High Frequency Advance Technical Information S = 3V = A (sat) 2.9V Symbol Test Conditions Maximum Ratings S = 25 C to C 3 V V CGR = 25 C to C,
More informationRadio Frequency Electronics
Radio Frequency Electronics Preliminaries III Lee de Forest Born in Council Bluffs, Iowa in 1873 Had 180 patents Invented the vacuum tube that allows for building electronic amplifiers Vacuum tube started
More informationCHAPTER.4: Transistor at low frequencies
CHAPTER.4: Transistor at low frequencies Introduction Amplification in the AC domain BJT transistor modeling The re Transistor Model The Hybrid equivalent Model Introduction There are three models commonly
More informationLecture 21: Packaging, Power, & Clock
Lecture 21: Packaging, Power, & Clock Outline Packaging Power Distribution Clock Distribution 2 Packages Package functions Electrical connection of signals and power from chip to board Little delay or
More informationECE 546 Lecture 11 MOS Amplifiers
ECE 546 Lecture MOS Amplifiers Spring 208 Jose E. Schutt-Aine Electrical & Computer Engineering University of Illinois jesa@illinois.edu ECE 546 Jose Schutt Aine Amplifiers Definitions Used to increase
More informationAnalog Design Challenges in below 65nm CMOS
Analog Design Challenges in below 65nm CMOS T. R. Viswanathan University of Texas at Austin 4/11/2014 Seminar 1 Graduate Students Amit Gupta (TI):Two-Step VCO based ADC K. R. Raghunandan (Si Labs): Analog
More informationHomework Assignment 11
Homework Assignment Question State and then explain in 2 3 sentences, the advantage of switched capacitor filters compared to continuous-time active filters. (3 points) Continuous time filters use resistors
More informationVery Large Scale Integration (VLSI)
Very Large Scale Integration (VLSI) Lecture 4 Dr. Ahmed H. Madian Ah_madian@hotmail.com Dr. Ahmed H. Madian-VLSI Contents Delay estimation Simple RC model Penfield-Rubenstein Model Logical effort Delay
More informationType V DS I D R DS(on) Package Ordering Code BTS V 10 A 0.2 Ω TO-220AB C67078-A5008-A2
TEMPFET Features N channel Enhancement mode Temperature sensor with thyristor characteristic The drain pin is electrically shorted to the tab 1 2 3 Pin 1 2 3 G D S Type V DS I D R DS(on) Package Ordering
More informationSpurious-Tone Suppression Techniques Applied to a Wide-Bandwidth 2.4GHz Fractional-N PLL. University of California at San Diego, La Jolla, CA
Spurious-Tone Suppression Techniques Applied to a Wide-Bandwidth 2.4GHz Fractional-N PLL Kevin Wang 1, Ashok Swaminathan 1,2, Ian Galton 1 1 University of California at San Diego, La Jolla, CA 2 NextWave
More informationESE 570: Digital Integrated Circuits and VLSI Fundamentals
ESE 570: Digital Integrated Circuits and VLSI Fundamentals Lec 15: March 15, 2018 Euler Paths, Energy Basics and Optimization Midterm! Midterm " Mean: 89.7 " Standard Dev: 8.12 2 Lecture Outline! Euler
More informationCARLETON UNIVERSITY. FINAL EXAMINATION December DURATION 3 HOURS No. of Students 130
ALETON UNIVESITY FINAL EXAMINATION December 005 DUATION 3 HOUS No. of Students 130 Department Name & ourse Number: Electronics ELE 3509 ourse Instructor(s): Prof. John W. M. ogers and alvin Plett AUTHOIZED
More informationFlavien Heu+er Sales & Applica+ons Engineer EFCC 2015
Oscillator design guidelines for implantable medical device applications Flavien Heu+er Sales & Applica+ons Engineer 1 EFCC 2015 Agenda o Introduc/on o Key parameters in specifying quartz crystals o Suggested
More informationEECS 141: FALL 05 MIDTERM 1
University of California College of Engineering Department of Electrical Engineering and Computer Sciences D. Markovic TuTh 11-1:3 Thursday, October 6, 6:3-8:pm EECS 141: FALL 5 MIDTERM 1 NAME Last SOLUTION
More informationCHAPTER 3: TRANSISTOR MOSFET DR. PHAM NGUYEN THANH LOAN. Hà Nội, 9/24/2012
1 CHAPTER 3: TRANSISTOR MOSFET DR. PHAM NGUYEN THANH LOAN Hà Nội, 9/24/2012 Chapter 3: MOSFET 2 Introduction Classifications JFET D-FET (Depletion MOS) MOSFET (Enhancement E-FET) DC biasing Small signal
More informationMMIX4B12N300 V CES = 3000V. = 11A V CE(sat) 3.2V. High Voltage, High Gain BIMOSFET TM Monolithic Bipolar MOS Transistor
High Voltage, High Gain BIMOSFET TM Monolithic Bipolar MOS Transistor Preliminary Technical Information V CES = 3V 11 = 11A V CE(sat) 3.2V C1 C2 (Electrically Isolated Tab) G1 E1C3 G2 E2C G3 G E3E C1 C2
More informationEE221 Circuits II. Chapter 14 Frequency Response
EE22 Circuits II Chapter 4 Frequency Response Frequency Response Chapter 4 4. Introduction 4.2 Transfer Function 4.3 Bode Plots 4.4 Series Resonance 4.5 Parallel Resonance 4.6 Passive Filters 4.7 Active
More informationRefinements to Incremental Transistor Model
Refinements to Incremental Transistor Model This section presents modifications to the incremental models that account for non-ideal transistor behavior Incremental output port resistance Incremental changes
More information6.012 Electronic Devices and Circuits Spring 2005
6.012 Electronic Devices and Circuits Spring 2005 May 16, 2005 Final Exam (200 points) -OPEN BOOK- Problem NAME RECITATION TIME 1 2 3 4 5 Total General guidelines (please read carefully before starting):
More informationECE 523/421 - Analog Electronics University of New Mexico Solutions Homework 3
ECE 523/42 - Analog Electronics University of New Mexico Solutions Homework 3 Problem 7.90 Show that when ro is taken into account, the voltage gain of the source follower becomes G v v o v sig R L r o
More informationA1P50S65M2. ACEPACK 1 sixpack topology, 650 V, 50 A trench gate field-stop IGBT M series, soft diode and NTC. Datasheet. Features.
Datasheet ACPACK 1 sixpack topology, 65 V, 5 A trench gate field-stop IGBT M series, soft diode and NTC Features ACPACK 1 ACPACK 1 power module DBC Cu Al 2 O 3 Cu Sixpack topology 65 V, 5 A IGBTs and diodes
More information