# Chapter7. FET Biasing

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1 Chapter7. J configurations Fixed biasing Self biasing & Common Gate Voltage divider MOS configurations Depletion-type Enhancement-type

2 JFET: Fixed Biasing Example 7.1: As shown in the figure, it is the fixed biasing configuration of n-channel JFET. Determine: V GSQ, I DQ, V DS, V D, V G and V S. Solution: Mathematical approach V GSQ =-V GG = -2V.

3 I DQ I DSS V 1 GS VP 2 2V 10mA 1 8V 2 = 5.625mA V DS =V DD I D R D = 16V - (5.625mA) (2k ) = 4.75V V D =V DS = 4.75V V G =V GS = -2V V S = 0V

4 Graphical approach First, according to Shockley s equation, we can sketch out the transfer curve. It is known that I DSS = 10mA and V P = -8V. Three points are sufficient to plot the curve. (0, I DSS ) (0, 10mA) (V P,0) (-8V, 0) (V P /2, I DSS /4) (-4V, 2.5mA)

5 The fixed level of V GS has been superimposed as a vertical line at V GS = -V GG = -2V. The intersection of the two curves is the solution to the configuration, referred to as the quiescent or operating point. By drawing a horizontal line from the Q-point to the vertical I D axis, we get I DQ = 5.6mA

6 The remaining work is almost the same as previous approach: V DS =V DD I D R D = 16V - (5.6mA) (2k ) = 4.8V V D =V DS = 4.8V V G =V GS = -2V V S = 0V

7 Figure: Example 7.1, FET fixed biasing

8 Figure: Example 7.1, Graphical approach

9 JFET: Self-Bias Example 7.2: As shown in the figure, it is the self biasing configuration of n-channel JFET. This network needs only one dc supply. Determine: V GSQ, I DQ, V DS, V D, V G and V S. Solution: This time, we only use graphical approach.

10 For dc analysis, all the capacitors are replaced with open circuit. Note that I G = 0mA. From the dc circuit, we get V GS = I D R S It is a straight line through the origin. The other point is (-4V, 4mA). So the load line is plotted through the two points.

11 Then, according to Shockley s equation, we can sketch out the transfer curve. It is known that I DSS = 8mA and V P = -6V. Three points are sufficient to plot the curve. (0, I DSS ) (0, 8mA) (V P,0) (-6V, 0) (V P /2, I DSS /4) (-3V, 2mA)

12 The intersection of the two curves is the Q- point. So we get I DQ = 2.6mA V GSQ = -2.6V V DS =V DD I D (R D +R S ) = 20V - (2.6mA) (1k + 3.3k ) = 8.82V

13 V S =I D R S = (2.6mA) (1k ) = 2.6V V G = 0V V D =V DS +V S = 8.82V+ 2.6V = 11.42V or V D =V DD I D R D = 20V- (2.6mA) (3.3k ) = 11.42V

14 Figure: Example 7.2, FET self-bias

15 Figure: Example 7.2, Q-point of self-bias

16 JFET: Common Gate Example 7.4: As shown in the figure, it is the common gate configuration of n-channel JFET. Determine: V GSQ, I DQ, V DS, V D, V G and V S. Solution: This network is corresponding to commonbase network of BJT.

17 According to Shockley s equation, we can sketch out the transfer curve. It is known that I DSS = 12mA and V P = -6V. Three points are sufficient to plot the curve. (0, I DSS ) (0, 12mA) (V P,0) (-6V, 0) (V P /2, I DSS /4) (-3V, 3mA)

18 From the dc circuit, we get V GS = I D R S = I D (680 ) It is a straight line through the origin. The other point is (-4.08V, 6mA). So the load line is plotted through the two points. So from the Q-point, we get I DQ 3.8mA V GSQ -2.6V

19 V G = 0V V D =V DD I D R D = 12V- 3.8mA 1.5k = 6.3V V S =I D R S =3.8mA 680 = 2.58V V DS =V D V S = 6.3V-2.58V = 3.72V

20 Figure: Example 7.4, Common gate configuration

21 Figure: Example 7.4, Transfer curve & load line

22 JFET: Voltage Divider Example 7.5: As shown in the figure, it is the voltage divider configuration of n-channel JFET. Determine: V GSQ, I DQ, V D, V S, V DS, and V DG. Solution: This network is the same as voltage divider network of BJT.

23 According to Shockley s equation, we can sketch out the transfer curve. It is known that I DSS = 8mA and V P = -4V. Three points are sufficient to plot the curve. (0, I DSS ) (0, 8mA) (V P,0) (-4V, 0) (V P /2, I DSS /4) (-2V, 2mA)

24 For dc analysis, all the capacitors are replaced with open circuit. Note that I G = 0mA. So we get R V R 2 G V DD 1 R2 = 1.82V Also it s obvious that 270k 16V 2.1M 270k V GS =V G I D R S = 1.82V- I D (1.5k )

25 So the load line is plotted through the two points. (1.82V, 0mA) & (0V, 1.21mA) Then from the Q-point, we get I DQ 2.4mA V GSQ -1.8V V D =V DD I D R D = 16V- 2.4mA 2.4k = 10.24V

26 V S =I D R S =2.4mA 1.5k = 3.6V V DS =V DD I D (R D +R S ) = 16V- 2.4mA (2.4k + 1.5k ) = 6.64V Or V DS =V D V S = 10.24V-3.6V = 6.64V V DG =V D V G = 10.24V-1.82V = 8.42V

27 Figure: Example 7.5, Voltage divider configuration

28 Figure: Example 7.5, Transfer curve & load line

29 Depletion-Type MOSFET Example 7.7: As shown in the figure, it is the n-channel depletion-type MOSFET configuration. Determine: V GSQ, I DQ, and V DS. Solution: For the n-channel depletion-type MOSFET, V GS can be positive and I D can exceed I DSS.

30 According to Shockley s equation, we can sketch out the transfer curve. It is known that I DSS = 6mA and V P = -3V. Three points are sufficient to plot the curve while V GS <0. (0, I DSS ) (0, 6mA) (V P,0) (-3V, 0) (V P /2, I DSS /4) (-1.5V, 1.5mA)

31 when V GS > 0, letting V GS =1V, and according to Shockley s equation, we get I D V 1 GS I DSS VP 1V 6mA 1 3V = 10.67mA So the transfer curve has been sketched out. 2 2

32 For dc analysis, all the capacitors are replaced with open circuit. Note that I G = 0mA. So we get R V R 2 G V DD 1 R2 = 1.5V Also it s obvious that 11M 18V 110M 11M V GS =V G I D R S = 1.5V- I D (750 )

33 So the load line is plotted through the two points. (1.5V, 0mA) & (0V, 2mA) Then from the Q-point, we get I DQ 3.1mA V GSQ -0.8V V DS =V DD I D (R D + R S ) = 18V- (2.4mA) (2.4k +750 ) 10.1V

34 Figure: Example 7.7, depletion-type MOSFET configuration

35 Figure: Example 7.7, Transfer curve & load line

36 Enhancement-Type MOSFET Example 7.11 : As shown in the figure, it is the n-channel enhancement-type MOSFET feedback biasing configuration. Determine: V GSQ and I DQ. Solution: Due to the existence of V GS(Th), we need four points to obtain the transfer curve.

37 The I D is defined by I D = k (V GS V T ) 2 Solving for k, we obtain I D( on) 6mA k 2 V V ) (8V 3V ( GS ( on) GS ( Th) = A/V 2 Then, Letting V GS = 6V, we get I D = (V GS V T ) 2 = (6V 3V) 2 = 2.16mA 2 )

38 Also, Letting V GS = 10V, we get I D = (V GS V T ) 2 = (10V 3V) 2 = 11.76mA So four points are sufficient to plot the curve. V GS(Th) (3V, 0mA) (V GS(on), I D(on) ) (8V, 6mA) (6V, 2.16mA) (10V, 11.76mA)

39 From the dc circuit, we get V GS =V DD I D R D = 12V I D (2k ) So the load line is plotted through the two points. (0V, 6mA) and (12V, 0mA) So from the Q-point, we get I DQ 2.75mA V GSQ 6.4V

40 Figure: Example 7.11, enhancement-type MOSFET configuration

41 Figure: Example 7.11, Transfer curve & load line

42 Summary of Chapter 7 J configurations Fixed biasing Self biasing & Common Gate Voltage divider MOS configurations Depletion-type: voltage divider Enhancement-type: feedback biasing

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