Lecture Outline. ESE 570: Digital Integrated Circuits and VLSI Fundamentals. Review: CMOS Inverter: Visual VTC. Review: CMOS Inverter: Visual VTC

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1 ESE 570: Digital Integrated Circuits and LSI Fundamentals Lec 0: February 4, 207 MOS Inverter: Dynamic Characteristics Lecture Outline! Review: Symmetric CMOS Inverter Design! Inverter Power! Dynamic Characteristics Delay 2 Review: CMOS Inverter: isual TC Review: CMOS Inverter: isual TC - out = in - T0p - out = in - T0p th T0p out = in - T0n th T0p out = in - T0n th th th T0n th T0n - - th - th T0n IL - IH T0n IL IH 3 4 Review: CMOS Inverter: Design/Sizing Review: Noise Margin Example T 0n th = ( T 0 p ) = 2 T 0 p th # th Important design Eq. for CMOS inverter TC. Compute the noise margins for a symmetric CMOS inverter has been designed to achieve th = /2, where = 5 and T0n = - T0p =. If th is set to ideal case: th = 2 = 2 T 0 p 2 = 2 2 T 0 p # 2 # 2 ideal th If T0n = - T0p = - T0 (symmetric CMOS) NM H = NM L = 2.25 RECALL (with = 5 ). NM H, NM L > /4 =.25 = 2 T 0 p 2 = k If, also 2 2 T 0 = R symetric = µ = W n n W p = µ n # 2 # 2 T 0 µ p W p W n µ p 2. Ideal NM => NM H = NM L = 2.5 > /2 5 6

2 Power Inverter Power! P = I! Tricky part: Understanding I (pairing with correct ) 8 Static Current Switching Currents! P = I static! Dynamic current flow:! If both transistor on: Current path from dd to Gnd Short circuit current 9 0 Currents Summary Currents Summary! I changes over! I changes over! At least two components! At least two components I static no switching I static no switching I switch when switching I switch when switching and I sc and I sc CLK φ ramp_enable RAMP 2 2

3 Switching Currents Switching! I total (t) = I static (t)i switch (t) Dynamic Power! I switch (t) = I sc (t) (t) I static I sc 3 4 Charging Switching Energy focus on (t)! (t) why is it changing? I ds = f( ds, gs ) and gs, ds changing I DS ν sat C OX W GS T ( DSAT 2 ) W ) I DS = µ n C OX ( # L GS T ) DS 2, DS. 2 - I sc I static 5 6 Switching Energy focus on (t) Switching Energy! Do we know what this is? (t) E = P(t) = I(t) dd = dd E = P(t) = I(t) dd = dd 7 8 3

4 Switching Energy Switching Energy! Do we know what this is?! Do we know what this is? Q = (t) Q = (t)! What is Q? E = P(t) = I(t) dd = dd E = P(t) = I(t) dd = dd 9 20 Switching Energy Switching Energy! Do we know what this is?! Do we know what this is? Q = (t) Q = (t)! What is Q? E = P(t) = I(t) dd = dd Q = C =! What is Q? E = P(t) = I(t) dd = dd Q = C = E = C dd 2 Capacitor charging energy 2 22 Switching Power! Every output switches 0# pay: E = C 2 Switching! P dyn = (# 0# trans) C 2 / Short Circuit Power! # 0# trans = ½ # of transitions! P dyn = (# trans) ½C 2 /

5 Short Circuit Power! Between TN and dd - TP Both N and P devices conducting Short Circuit Power! Between TN and dd - TP Both N and P devices conducting! Roughly: I sc in dd-thp thn dd dd Isc 25 out 26 Peak Current Peak Current! I peak around dd /2 If TN = TP and sized equal rise/spring I DS ν sat C OX W GS T ( DSAT 2 )! I peak around dd /2 If TN = TP and sized equal rise/spring I DS ν sat C OX W GS T ( DSAT 2 ) I t ( peak sc 2 ) in dd-thp thn dd in dd-thp thn dd dd Isc dd Isc out 27 out 28 Peak Current! I peak around dd /2 If TN = TP and sized equal rise/spring I DS ν sat C OX W GS T ( DSAT 2 ) I t ( peak sc 2 ) # E = dd I peak t sc ( in 2 dd dd-thp thn dd Isc Short Circuit Energy! Make it look like a capacitance, C SC Q=I t Q=C E = dd I peak t sc # # 2 E = dd Q SC E = dd (C SC dd ) = C SC 2 dd out

6 Short Circuit Energy! Every switch (0# and #0) Also dissipate short-circuit energy: E = C 2 Dynamic Characteristics Different C = C sc C cs fake capacitance (for accounting) 3 32 Inverter Delay Inverter Delay! Caused by charging and discharging the capacitive What is the? Inverter Delay Inverter Delay C gb = C gbn C gbp C = C # dbn C# dbp C# gdn C# gdp C int C gb

7 Inverter Delay Inverter Delay n = fan-out Usually C db >> C gd C sb >> C gs C C # dbn C# dbp C int C gb C C dbn C dbp C int nc gb Propogation Delay Definitions Propogation Delay Definitions 0 t t 0 50 = / Propogation Delay Definitions Rise/Spring Times

8 MOS Inverter Dynamic Performance! ANALYSIS (OR SIMULATION): For a given MOS inverter schematic and C, estimate (or measure) the propagation delays! DESIGN: For given specs for the propagation delays and C, determine the MOS inverter schematic MOS Inverter Dynamic Performance! ANALYSIS (OR SIMULATION): For a given MOS inverter schematic and C, estimate (or measure) the propagation delays! DESIGN: For given specs for the propagation delays and C, determine the MOS inverter schematic METHODS:. Average Current Model METHODS: 2. Differential Equation Model Δ C HL = C OH 50 i C d out d = C out i C τ PLH C Δ LH 50 OL Assume in ideal or τ PLH Assume in ideal MOS Inverter Dynamic Performance! ANALYSIS (OR SIMULATION): For a given MOS inverter schematic and C, estimate (or measure) the propagation delays! DESIGN: For given specs for the propagation delays and C, determine the MOS inverter schematic METHODS: 3. st Order RC delay Model Method Average Current Model 0.69 C R n τ PLH 0.69 C R p Assume in ideal 45 Calculation of Propagation Delays Calculation of Propagation Delays Δ C HL = C OH 50 Δ C HL = C OH 50 τ PLH C Δ LH 50 OL τ PLH C Δ LH 50 OL

9 Calculation of Propagation Delays Calculation of Rise/Spring Times Δ C HL = C OH 50 τ fall C Δ 90 0 I avg, I avg,90 0 τ PLH C Δ LH 50 OL τ rise C Δ 0 90 I avg, I avg, Calculation of Rise/Spring Times Calculation of Rise/Spring Times τ fall C Δ 90 0 I avg, I avg,90 0 τ fall C Δ 90 0 I avg, I avg,90 0 τ rise C Δ 0 90 I avg, I avg,0 90 τ rise C Δ 0 90 I avg, I avg, Calculating Propagation Delays Method 2 Assume in is an ideal step-input Differential Equation Model Two Cases. in abruptly rises => out Springs => 2. in abruptly Springs => out rises => τ PLH i DP - i Dn 54 9

10 Case : in Abruptly Rises - Case : in Abruptly Rises Case : in Abruptly Rises - Case : in Abruptly Rises Case : in Abruptly Rises - Recall: CMOS Inverter: isual TC - out = in - T0p th T0p out = in - T0n th out = T0n th T0n - th - T0n IL IH

11 Case : in Abruptly Rises - Case : in Abruptly Rises - saturation linear t 0 #t t #t 50 T 0 n /2 =C d out C T 0 n d out out = T0n d C out i Dn d = C out i Dn = t=t 50 out= /2 = C t=t 0 out= ) d out i Dn ( =C /2 ) d out C ) i Dn ( T 0 n i Dn ( T 0 n t 0 #t t #t 50 d out out = T0n 6 saturation: i Dn = 2 ( in )2,sat T 0 n C 2 ) 2 # T 0 n d out,sat = d 2 ( out T 0n )2 2C,sat = T 0n ) 2 62 Case : in Abruptly Rises - Case : in Abruptly Rises - saturation linear t 0 #t t #t 50 T 0 n /2 =C d out C T 0 n ( ) d out linear: i Dn = 2 ( ) 2 in T 0n out out /2,lin T 0 n ( 2 2( ) 2 T 0n out out # ),lin = 2C /2 k n #( 2 ) out 2 T 0 n out ),lin = 2C 2 ) ln out #( 2 ) out ) d out d out out= /2 out= T 0 n out = T0n 63,lin = 2C 2 ) ln # out ( 2 ) ( out ) C,lin = ) ln # 2 ) 2 ( 2 out= /2 out= T 0 n 64 Case : in Abruptly Rises - Case : in Abruptly Rises - saturation linear saturation linear t 0 #t t #t 50 T 0 n /2 =C d out C T 0 n d out out = T0n t 0 #t t #t 50 T 0 n /2 =C d out C T 0 n d out out = T0n 2C,sat = T 0n C τ ) 2 PHL,lin = ) ln 2 ) 2 # 2 2C,sat = T 0n ) 2 C,lin = ) ln 2 ) 2 # 2 2C = T 0n ) C 2 ) ln 2 ) 2 # 2 2C = T 0n ) C 2 ) ln 2 ) 2 # 2 R n 65 ) 2 =C T 0n ) ) ln # 2( ), T 0n (. 2-66

12 Case : in Abruptly Rises - Case : in Abruptly Rises - ) 2 =C T 0n ) ) ln # 2 ), (. 2 - ) 2 =C T 0n ) ) ln # 2 ), (. 2 - Recall from static CMOS Inverter: T 0n th = ( T 0 p ) = 2 T 0 p th # th Recall from static CMOS Inverter: T 0n th = ( T 0 p ) = 2 T 0 p th # th DESIGN: () th ; (2) ; (3) k p DESIGN: () th ; (2) ; (3) k p () th ; (2) τ PLH k p ; (3) k p Idea Admin! P tot = P static P dyn P sc Can t ignore Static Power (aka. Leakage power)! Propogation Delay Average Current Model Differential Equation Model st Order Model! HW 4 due Thursday, 2/

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