# VERITAS L1 trigger Constant Fraction Discriminator. Vladimir Vassiliev Jeremy Smith David Kieda

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1 VERITAS L trigger Constant Fraction Discriminator Vladimir Vassiliev Jeremy Smith David Kieda

2 Content Night Sky Background Noise Traditional Threshold Discriminator Constant Fraction Discriminator CFD: NSB and DC offset effects CFD: discriminator rate feedback CFD: schematic CFD: simulated performance Pricing Budget 2

3 pe pulse: measurements 3

4 pe pulse: simulations 4

5 Night Sky Background () 5

6 Night Sky Background (2) Stephane s LeBohec calibration m=7.4 is 0.2 pe/ns m=6.6 is 0.4 pe/ns m=5.9 is 0.8 pe/ns m=5. is.6 pe/ns m=4.4 is 3.2 pe/ns m=0.0 is 80 pe/ns 6

7 Statistical characteristics of NSB amplitude, A(t). st momentum <A(t)>Av t=rate/ pe peak pe peak=0.7 [ns pe ] 2nd momentum <(A(t) <A(t)> Av t)2> Av t =a2 <A(t)> Av t a2=0.62 [pe] 3rd momentum <(A(t) <A(t)> Av t)3> Av t =a32 <A(t)> Av t a3=0.8 [pe] 7

8 Threshold discriminator U(t)= U Npe 50 Npe th 5 Npe Np e 8

9 Threshold discriminator rate (positive edge) 9

10 Peak trigger rate (threshold discriminator) VERITAS operation region 0

11 CFD in fadc channel by Jim Buckley, WBS SP7 Theory Practice 2 2 ( + ) N U(t ) + N U(t) = 0 pe 3 3 pe 2 2 ( + ) N U(t ) + N U(t) = U + (t) + N U(t) pe dc noise pe 3 3 pe 2 2 ( + ) U(t ) + U(t) = U (t) 2 2 ( + ) U(t ) + U(t) = dc + noise N N pe pe U(t) N pe

12 CFD principle 2

13 CF discriminator: rate vs. offset 3

14 CF discriminator: HIGH state time fraction vs. offset 4

15 CFD: HIGH state time fraction vs. rate 5

16 CF discriminator dead time 6

17 CF discriminator time walk 7

18 CF discriminator time dispersion 8

19 CF discriminator dead time 9

20 CF discriminator time walk 20

21 CF discriminator time dispersion 2

22 CF discriminator time walk 22

23 CF discriminator time dispersion 23

24 Frequency to voltage feedback 24

25 Original CFD board design by Jim Buckley, WBS SP7 Board Fabrication: 8.70 Board Stuffing: Board Components: WBS budget per board: Total for 3,500 boards: 24.5K Total for CFDs in WBS: 308.2K 25

26 CFD Functional Schematic Zero crossing comparator.5 ns delay PMT signal D Q CLK R fraction CFD rate feedback f2v Variable gain Programmable width Threshold discriminator Discriminator threshold adjustment Time walk optimization Coincidence resolving time adjustment 26

27 CFD board schematic 27

28 f2v SPICE simulations 28

29 f2v 2MHz input 29

30 f2v 20MHz input 30

31 Variable Gain Circuit 3

32 Variable Gain (0 MHz) 32

33 Variable Gain (50 MHz) 33

34 Variable Gain (n=64) 34

35 L Width circuit 35

36 Width simulations 36

37 CFD board pin outs P in J0 J0 2 J0 3 J0 4 J0 5 J0 6 J0 7 J0 8 J0 9 J0 0 J0 J0 2 J0 3 J0 4 J0 5 J0 6 J0 7 Na m e /F u n ctio n A G ND IN 5V A W IDTH TH RF B + 5V A J0 8 DE N M O DE GND 2V 5.2V DO UT O U T+ O U T DIN DCK De scrip tio n A nalog G round P M T S ignal Input A nalog P ow er L W idth Control Dis c rim inator Thres hold C ontrol Rate F eedb ac k C ontrol A nalog P ow er Not in us e Trigger M ode Control Digital G round Digital E CL term ination Digital P ower S erial Data O utput P os itive Trigger O utput Negative Trigger O utput S erial Data Input S erial Data Cloc k (Ris ing E dge) S erial Data S trobe (Cloc k data w hile LO W, Latc h data on ris ing edge) S p e cifica tio n.9m V /pe 5 V + 0.0V to.25v + 0.V to 2.6V 3.26 m V /pe +5 V E CL 2 V 5.2 V TTL/CM O S E CL E CL TTL/CM O S TTL/CM O S TTL/CM O S 37

38 CFD board components # P a rt A D 9687CS A D 8009A R M A X A D 7376A RU 50 M A X4 7 8 C S A M C 0E L58D M C 0E L3D M A X5 0 4 C E E M A X6 0 2 B M C 0 E L T2 4 D CD A 505 CD A 2005 E XC M L 2 0 A U B A V 7 4 ZX F M M T5 7 9 C T E R J 6 E N F 0. 0 K V E R J 6 E N F V E R J 6 E N F 0. 0 V E R J 6 E N F V E R J 6 E N F 0 0 V E R J 6 E N F.0 0 K V E R J 6 E N F K V E R J 6 E N F K V E R J 6 E N F 5 0 V E R J 6 E N F V E R J 6 E N F.5 0 K V E R J 6 E N F 0 K V E R J 6 E N F K V E R J 6 E N F K V E R J 6 E N F 6 8 K V E R J 6 E N F K V E C J 2 V C 2 A 0 0 D E C U V H JC G E C U V H 0 2 JC X E C U V H K B G E C J 2 Y B H 0 4 K E C J 2 Y B A 0 5 K E C S T C X 0 6 R PCB 4 B o a rd S t u ffin g C o m p le te B o a rd : D e s c rip t io n R e f D e s M a n u fa c tu re rv e n d o r Q n ty D u a l, U ltra F a s t E C L O u tp u t C o m p a rauto r M a x im M a x im L o w D is to rtio n A m p lifie r, G H z, U V 2/ u S A n a lo g D e vic Fe su t u re 2 U ltra F a s t E C L O u tp u t C o m p a ra to r U 3 M a x im M a x im D ig ita l P o te n tio m e te r, + / 5 V O p e r U 4 A n a lo g D e vic Fe su t u re D u a l P re c is io n O p A m p U5,0 M a x im M a x im 2 E C L 2 : M u ltip le x e r U6 O N S e m ic o n df u ct utorer E C L D F lip F lo p w it h S e t a n d R e s e t U 7, 8 O N S e m ic o n df u ct utorer 2 D u a l 2 B it D A C, V o lta g e O u t, S e ria luin9te rfa c e M a x im M a x im V o lta g e R e fe re n c e, V U2 M a x im M a x im 5 V TTL t o D iffe re n tia l E C L Tra n s la to r U O N S e m ic o n df u ct utorer D e la y L in e,.5 n S, 5 0 o h m, F ix e d, H ig D hl S p e e de, LSMu ErfaCc e M oeulm n t ic D e la y L in e, 2.0 n S, 5 0 o h m, F ix e d, H ig D hl S 2 p e e de L M E C E lm ic S u rfa c e M o u n t B e a d C o re L P a n a s o n ic D ig ik e y 2 D u a l D io d e w / c o m m o n c a th o d e D ZE TE X D ig ik e y R F Tra n s is to r Q ZE TE X D ig ik e y R e s is to r, 0.0 K o h m % / 0 WR,, 6 P a n a s o n ic D ig ik e y 3 R e s is to r, o h m % / 0 W R 2 4 P a n a s o n ic D ig ik e y 3 R e s is to r, 0.0 o h m % / 0 W R 5, 2 7 P a n a s o n ic D ig ik e y 2 R e s is to r, o h m % / 0 W R 6, 7,9, 8P 2a2n,2 a s9o,3n0ic D ig ik e y 0 R e s is to r, 0 0 o h m % / 0 W R 8 P a n a s o n ic D ig ik e y R e s is to r,.0 0 K o h m % / 0 WR 0, 4 P a n a s o n ic D ig ik e y 2 R e s is to r, K o h m % / 0 WR 2 P a n a s o n ic D ig ik e y R e s is to r, K o h m % / 0 WR 3, 5, 7P,3 a n a,3s2o n ic D ig ik e y 5 R e s is to r, 5 0 o h m % / 0 W R 2 3,2 4 P a n a s o n ic D ig ik e y 2 R e s is to r, o h m % / 0 W R 2 5,2 6 P a n a s o n ic D ig ik e y 2 R e s is to r,.5 0 K o h m % / 0 WR 2 8 P a n a s o n ic D ig ik e y R e s is to r, 0 K o h m % / 0 W R 3 3 P a n a s o n ic D ig ik e y R e s is to r, K o h m % / 0 WR 3 4 P a n a s o n ic D ig ik e y R e s is to r, K o h m % / 0 WR 3 6 P a n a s o n ic D ig ik e y R e s is to r, 6 8 K o h m % / 0 W R 3 7 P a n a s o n ic D ig ik e y R e s is to r, K o h m % / 0 WR 3 8 P a n a s o n ic D ig ik e y C a p a c ito r, 0 p F + / 0. 5 p F V C P a n a s o n ic D ig ik e y C a p a c ito r, 7 5 p F 5 % V C2 P a n a s o n ic D ig ik e y C a p a c ito r, p F 5 % V C3 P a n a s o n ic D ig ik e y C a p a c ito r, p F 0 % V C4 P a n a s o n ic D ig ik e y C a p a c ito r, 0. u F 0 % V C P a n a s o n ic D ig ik e y 2 3 C a p a c ito r, u F 0 % V C P a n a s o n ic D ig ik e y 3 C a p a c ito r, 0 u F 6 V Ta n t a lu m C h ip ECIA 3 B 3 4 P a n a s o n ic D ig ik e y 4 In te rc o n n e c t, S in g le R o w, H ig hj t 0 M ill M a x M ill M a x 4 la y e r,.2 " x 2.0 " n re : 0 0 /la y e r V ik tro n L ik a a d d itio n a l 2 la y e rs B u d g e ta ry Q u o te C irtra n C o s t(5 0 0 ) To ta l: To ta l(5 0 0 ) C o s t( ) To ta l: To ta l( ) P a c k a g e S O S O S O TS S O P S O S O S O Q S O P S O T S O S O L S O L S O T S O T E IA B

39 CFD Budget Com ponents F abric ation S tuffing T o ta l: Total(500) per board Total for 3500: ,73.20, , , Total(3000) per board , , , , ,8.80 Total budgeted in W B S for 3500: 24, Total in W B S : 308, A vailable for engineering, R & D, tes t board m anufac turing, and tes ting: 54,

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