6.152J / 3.155J Spring 05 Lecture 08-- IC Lab Testing. IC Lab Testing. Outline. Structures to be Characterized. Sheet Resistance, N-square Resistor

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1 IC Lab Testing Review Process Outline Structures to be Characterized Resistors Sheet Resistance, Nsquare Resistor MOS Capacitors Flatband Voltage, Threshold Voltage, Oxide Thickness, Oxide Charges, Substrate Doping & Type Acknowledgement: Notes adapted from Prof. Akinwande s Spring Term 04 file 6.152J / 3.155J Feb. 28, 2005 IC Lab Characterization 1 Objective Review the structure of devices fabricated in laboratory Examine the current vs. voltage (IV) or capacitance vs. voltage (CV) characteristics of the devices Extract device or process parameters using device models Reference Microelectronics: An Integrated Approach by Howe and Sodini (6.012 Text) Reading Assignment: Plummer et al., Sections and Supplementary Handouts on Course Website 6.152J / 3.155J Feb. 28, 2005 IC Lab Characterization 2 1

2 Our Process Polysilicon Gate (ntype) MOS Capacitor ntype substrate 50 nm n + gate oxide 250 nm ntype polysilicon gate Various size capacitors PolySilicon sheet resistance monitor 50 nm oxide 250 nm n + doped PolySi ntype Si 6.152J / 3.155J Feb. 28, 2005 IC Lab Characterization 3 Drift Current Conduction in Si In general: J = nqv = nqµ!, µ " v /! For n >> p n is density of electrons p is density of holes µ N is electron mobility µ P is hole mobility σ is the conductivity ε x is the electric field q is electronic charge 6.152J / 3.155J Feb. 28, 2005 IC Lab Characterization 4 2

3 Keep in mind: effective mass is how hard it is to induce current E E g Conduction band free electrons Valence band holes k=2π/λ E =! 2 k 2 / 2m * # m*! 1 " 2 E & % $! 2 "k 2 ( ' )1 High curvature, low mass; Flat E k, infinite mass Core states bound electrons 6.152J / 3.155J Feb. 28, 2005 IC Lab Characterization 5 IV Characteristics Resistors Physical Structure V=IR All these have the same resistance: w t L L = w therefore Resistance is given by where ρ is resistivity in Ωcm L is length in cm (or µm) w is width in cm (or µm) t is thickness in cm (or µm) R S sheet resistance (process) N SQ is number of squares (mask) If L = N sq w then 6.152J / 3.155J Feb. 28, 2005 IC Lab Characterization 6 3

4 Concept of Sheet Resistivity L = w R = R S R 1 R 2 R 1 = R 2 R = 2R S Process Sheet Resistance R S (Ω/sq.) 1 R = R 2 S R = 8.5R S Mask # of Squares 6.152J / 3.155J Feb. 28, 2005 IC Lab Characterization 7 Real (Implanted) Resistors t = x j 0 x 1 x 1 R = L t qµ P %!" N A N D # $ dx W R S = 0 t 1 qµ P %!" N A N D # $ dx 0 If the doping is uniform 1 R = qµ P!" N A N D # $ t L W R S = 1 qµ P!" N A N D # $ t 6.152J / 3.155J Feb. 28, 2005 IC Lab Characterization 8 4

5 Measurement of Sheet Resistance V DC < V AB ϕ I + VDA D A C B ICB R' = V DC I AB R" = V DA I CB Four contacts are placed in four corners of a structure (ABCD) and two measurements in are taken to measure resistances R and R. Current is forced through contacts A & B and the voltage drop between C & D is measured to determine R. Current is forced through contacts C & B and the voltage drop between D & A is measured to determine R. R s =! t = " R'+ R'' # # f ln2 2 $ R' ' % & R'' ( ) 6.152J / 3.155J Feb. 28, 2005 IC Lab Characterization 9 Van der Pauw Correction Factor R s =! t = " R'+ R'' # # f ln 2 2 $ R' ' % & R'' ( ) Equipotential geometry factor Compensate placement error Correction Factor Assumptions: Uniform thickness Continuous layer (no holes) 6.152J / 3.155J Feb. 28, 2005 IC Lab Characterization 10 5

6 Cross Bridge Structures Sheet Resistance Measurements R s =! ln 2 " R + R abcd dabc 2 Sheet resistance is determined from the crossbridge structures using van der Pauw measurements as shown above J / 3.155J Feb. 28, 2005 IC Lab Characterization 11 N Square Resistor L mask L = L mask + ΔL Mask error ΔL/2 w = w mask + Δw N = L mask / W mask >> 1 R = R S L w! R L + "L S w + "w # R L S w (1$ "w / w) = R N (1$ "w / w) S sq Can be used to determine the process bias ΔW 6.152J / 3.155J Feb. 28, 2005 IC Lab Characterization 12 6

7 Ohmmeter: V/I I = V R + 2R contact R contact I 2point meas. ok for large R I measured exactly 4Point Probe Measurement V+ V V measured exactly Eliminates the effect of contact resistance 6.152J / 3.155J Feb. 28, 2005 IC Lab Characterization 13 Analysis of Resistivity Semiconductor Conductivity, σ and Resistivity, ρ 1/ρ =σ = q(µ n n + µ p p) For ntype semiconductors n >> p 1/ρ = σ = qµ n n Single Crystal Silicon ntype: N D N A (net donor doping density) µ Si = f(n D + N A ) (a not obvious relation) Polysilicon µ poly << µ Si 6.152J / 3.155J Feb. 28, 2005 IC Lab Characterization 14 7

8 Single Crystal Silicon Mobility E E g # m*! 1 " 2 E & % $! 2 "k 2 ( ' )1 k=2π/λ Sodini & Howe Figure J / 3.155J Feb. 28, 2005 IC Lab Characterization 15 Insulator Single Crystal Silicon Resistivity Semiconductor Metal Plummer et al J / 3.155J Feb. 28, 2005 IC Lab Characterization 16 8

9 PolySi Resistivity Dep. Time Kamins, Kluwer 6.152J / 3.155J Feb. 28, 2005 IC Lab Characterization 17 PolySi Resistivity Dopant Use for lab report (gate electrode) Kamins, Kluwer 6.152J / 3.155J Feb. 28, 2005 IC Lab Characterization 18 9

10 MOS Capacitor Oxide Gate n + poly Si Gate t ox A ntype Si Body Body φ C = A! ox = A!! n+ is the gate(metal) potential (established r,ox 0 by V G φ n is the potential of nsi t substrate ox t n ox i is the intrinsic carrier concentration of Si tε r,ox = 3.9, ε 0 = x ox is oxide thickness F/cm C! 10 "15 F/µm 2 ε ox, ε Si the oxide & Si dielectric constants N D is the substrate doping Q I is the oxide charge density at the interface (see later) 6.152J / 3.155J Feb. 28, 2005 IC Lab Characterization 19 High Frequency CV Measurements Threshold voltage (V T ) Gate voltage at onset of inversion layer boundary HFCV between depletion and inversion regimes Flatband voltage (V FB ) Gate voltage at which the field in the semiconductor is 0 boundary between depletion and accumulation regimes High Frequency CV C min C inv C max V T C MOS C min C max C ox V FB V GB Inversion Depletion Accumulation High Frequency Capacitance Voltage (HFCV) measurements taken at 1 MHz. Small ac signal ( MHz) is superimposed on DC bias; Bias ramped from voltages corresponding to inversion to voltages corresponding to accumulation; ac current measured 6.152J / 3.155J Feb. 28, 2005 IC Lab Characterization 20 10

11 V G = 0 is not same as V FB Flatband voltage (V FB ) Gate voltage at which the field in the semiconductor is 0 boundary between depletion and accumulation regimes n + gate oxide oxide nsi High Frequency CV C min C inv C max C MOS C min C max C ox Free carrier diffusion V T V FB V GB n + gate ox nsi Inversion Depletion Accumulation Depletion, + ionized donors Need V G > 0 (V G = V FB ) To restore zero field in semiconductor 6.152J / 3.155J Feb. 28, 2005 IC Lab Characterization 21 QuasiStatic CV Measurements C MOS C max C max C ox C QS QSCV QSCV C min C inv C min V T V FB V GB Quasi Static Capacitance Voltage (QSCV) measurements taken with very slow ramp (staircase) Inversion Depletion Accumulation The displacement charge is proportional to capacitance: Q = CV A comparison of the QSCV and HFCV allows for the extraction of the interface trap charge density as a function of energy J / 3.155J Feb. 28, 2005 IC Lab Characterization 22 11

12 MOS Capacitor Gate PolySi t ox mobile electrons fixed ionized donors Q = CV, !Q!t Body " I = C!#V!t C =!Q!t!t!"V #!Q!t constant Oxide nsi n! p = N D 2 np = n i " n # N D 6.152J / 3.155J Feb. 28, 2005 IC Lab Characterization 23 Oxide MOS Capacitor in Accumulation (V GB >V FB ) Charge Distribution in Accumulation charge density PolySi ntype Si ρ Silicon Oxide 0 x t ox Equivalent Circuit C ox n + poly Si C Dmin C ox Positive charge on the gate electrode Majority carriers (electrons) accumulate at the surface Mobile carriers on both sides of side Behaves like parallel plate capacitor with oxide as an insulator C MOS = C ox =! ox t ox! ox = 3.9! o ( wl)! o = " 10 #14 F/cm C MOS,accumulation = C max = C ox 6.152J / 3.155J Feb. 28, 2005 IC Lab Characterization 24 12

13 MOS Capacitor in Depletion (V T < V G < V FB ) Oxide n + poly Si ntype Si Charge Distribution in Depletion charge density x d C ox Mobile negative charge (electrons) on the gate Majority carriers depleted in nsi exposing ionized donors and forming the depletion layer Equivalent capacitance in depletion is a series combination of the depletion capacitance and the oxide capacitance PolySi Mobile Electrons ρ Ionized Donors Oxide t ox 0 x d Silicon x C Dmin C MOS,depletion = C C ox D C ox + C D C D ( V GB ) =! Si x d (V GB ) wl C ox C D 6.152J / 3.155J Feb. 28, 2005 IC Lab Characterization 25 Oxide n + poly Si MOS Capacitor in Inversion (V G < V T ) Charge Distribution in Inversion charge density PolySi Mobile Electrons ρ Holes at interface + Ionized + Donors + Oxide x d,max C ox ntype Si Silicon C Dmin x x d,max C Dmin Inversion Layer Hole Density [Ccm 2 ] Mobile negative charge on gate Mobile positive charge (holes) at the Si/SiO 2 interface Immobile ionized positive charge in silicon At high freq., holes are not generated fast enough at the Si/SiO 2 interface (holes have lower mobility) C MOS,inversion,QS = C max! C ox C MOS,inversion,HF = C min = C C ox Dmin C ox + C Dmin C D min = 6.152J / 3.155J Feb. 28, 2005 IC Lab Characterization 26 C ox! Si x d max Q P =!C ox ( V G! V T ) 13

14 Depletion Layer Thickness x d x d,max C D,min =! Si x d,max C D =! Si x d (V G ) V T V FB Inversion Depletion Accumulation 6.152J / 3.155J Feb. 28, 2005 IC Lab Characterization 27 CV Curves C QS QuasiStatic CV High Frequency CV C max C max = C ox Measurements C max = C ox C min = C inv V FB C HF C min = C inv C min V T V FB V GB Inversion Depletion Accumulation Extractions t ox = ε ox A/C ox N D n Q P = qn P C QS Capacitance measured at low frequency C HF Capacitance measured at high frequency 6.152J / 3.155J Feb. 28, 2005 IC Lab Characterization 28 14

15 Effect of Oxide Charge c SiO + O2 SiO 2 e C Net shift in the CV curve Need to add more negative charges (V G ) to invert surface 6.152J / 3.155J Feb. 28, 2005 IC Lab Characterization 29 CV Analysis: Inversion C MOS,inversion,HF = C min = C ox C Dmin C ox + C Dmin C ox C Dmin is the depletion layer capacitance in semiconductor C Dmin Can extract N D C D min = q! Si N D ( ), 2 2" n " n = k B T q ln N D n i! n = q" N Si D 2 4C D min # n i = N D exp! q" & n % $ k B T ( ' φ n N D 6.152J / 3.155J Feb. 28, 2005 IC Lab Characterization 30 15

16 CV Analysis: Flatband C FB = 1 1 kt + C q! N 2 ox Si D C ox C FB is flat band capacitance C Dmin Can extract V FB V FB is the V GB at which C MOS = C FB 6.152J / 3.155J Feb. 28, 2005 IC Lab Characterization 31 Threshold and Flatband Voltages Threshold voltage (V T ) = gate voltage at onset of inversion layer boundary between depletion and inversion regimes Flatband voltage (V FB ) = gate voltage at which the field in the semiconductor is 0 boundary between depletion and accumulation regimes V T = V FB! 2" n! t ox 2# # Si qn D ( 2" n ) ox φ n+ is the gate(metal) potential φ n is the potential of nsi substrate n i is the intrinsic carrier concentration of Si t ox is oxide thickness ε ox, ε Si the oxide & Si dielectric constants N D is the substrate doping Q I is the oxide charge density at the interface t V FB =! (" n +! " n )! Q ox I # ox! n = k T B q ln " N % D $ ' # n i &! n + = 0.55V 6.152J / 3.155J Feb. 28, 2005 IC Lab Characterization 32 16

17 Summary (I will not leave today s lecture until I know how to characterize ) Measurements Extraction Substrate Resistivity Substrate Doping Oxide Thickness Poly Silicon Thickness Poly Silicon Sheet Resistance Poly Si Doping, Effective Mobility CV (multiple areas) Oxide Thickness, Substrate Doping, Flatband Voltage (Fixed Charge) Comparisons / Discussion Oxide Thickness Theory, CV Substrate Doping Resistivity, CV Poly Si mobility Expectations (relative single crystal) Flatband Voltage (Fixed Charge) Expectations (sign and magnitude) 6.152J / 3.155J Feb. 28, 2005 IC Lab Characterization 33 How to Write an IEEE Letter 3.155J/6.152J Spring 2005 Writing Instructor: Thea Singer 6.152J / 3.155J Feb. 28, 2005 IC Lab Characterization 34 17

18 Microelectronics Letters Journals IEEE Electron Device Letters Applied Physics Letters Available online at libraries.mit.edu Click on VERA (Virtual Electronic Resource Access) 6.152J / 3.155J Feb. 28, 2005 IC Lab Characterization 35 Lab Report ~10 pages Title Page Abstract Introduction Theory Methods Results Discussion Conclusion References Letter (Ma, et al.) 3 pages Title, name, , date, lab group Abstract Introduction (includes Theory) Experiment Results & Discussion Conclusion References (IEEE style) 6.152J / 3.155J Feb. 28, 2005 IC Lab Characterization 36 18

19 The audience for your letter are readers who are familiar with microelectronics processing (But not necessarily specialists in the field) Title: Specific, key terms, active Use of CapacitanceVoltage Measurements for the characterization of a new polygate MOS process Abstract: The abstract should be limited to words and should concisely state what was done, how it was done, principal results, and their significance. The abstract will appear later in various abstracts journals and should contain the most critical information in the paper. IEEE Information for Authors 6.152J / 3.155J Feb. 28, 2005 IC Lab Characterization 37 The Introduction provides the context for your research and a clear purpose statement Background/Context: Identify gap in current state of the field Challenge: Find the gap in the current research that Ma presents in your sample article. Purpose* of this work: In this work, we will show that 900 ~ 950 C lowtemperature twostep furnace N2O anneal [14] can effectively prevent boron diffusion from P+ poly gates into Si substrate. * Purpose of your letter is to evaluate fabrication process 6.152J / 3.155J Feb. 28, 2005 IC Lab Characterization 38 19

20 The Experiment = Methods Explains what was done and why Past tense without reference to self ( I or we ) You may give overview and use references for details, but describe ways process deviated from that in references....gate oxides were first grown at 850 C in dry O2 and then annealed in N2O. Two splits of oxide thickness were chosen each with 5 N2O anneal conditions, as listed in Table 1. Tenmin anneals in N2 followed both the initial oxidation and subsequent N2O annealing steps. (Ma, et al) 6.152J / 3.155J Feb. 28, 2005 IC Lab Characterization 39 The Results & Discussion explain your evaluation of the fabrication process Evaluate the process through a discussion of your findings, including: What are the measured vs. expected values? What does the difference tell you about the process? What do the results suggest? Use quantitative evidence to support your claims. May not need all results, but discuss unexpected results. Make this section more than an error analysis! 6.152J / 3.155J Feb. 28, 2005 IC Lab Characterization 40 20

21 The Conclusion summarizes the process In conclusion, lowtemperature nitrided oxides obtained by twostep N2O anneal have been shown to be a good barrier to boron penetration. Significantly, these N2Oannealed oxides can avoid the highdensity electron trapping problem common in NH3nitrided oxides and requires only a low thermal budget. (Ma, et al) 6.152J / 3.155J Feb. 28, 2005 IC Lab Characterization 41 Tables and Figures should be able to stand alone for readers who skim Use clear labels: define variables and give units of measure. Use captions to direct audience to main point of visual. Items to be compared should be placed near each other Remove unnecessary details, e.g., grid lines 8.E04 Capacitance (F/m 2 ) 6.E04 4.E04 2.E04 C min =2.3E4 C FB =5.5E4 C acc =7E4 0.E Voltage (V) Fig. 2. Average Normal Capacitance as a function of applied Voltage Cacc used in tox calculation, CFB used in QF calculation and Cmin used in ND calculation J / 3.155J Feb. 28, 2005 IC Lab Characterization Courtesy of R.A. Dahl 42 21

22 Appendices do not need to be referenced in the body of the Letter Appendix A: Results Graphs showing the raw data (IV and CV curves) A table summarizing all measured & calculated parameters for easy comparison. See course slides for the data to include. Appendix B: Calculations Show how you obtained the calculated results in Appendix A J / 3.155J Feb. 28, 2005 IC Lab Characterization 43 Structure sentences to convey correct meaning Challenge Weak: The reason the film was thinner than expected was because Weak: The annealing step caused the resistivity to decrease J / 3.155J Feb. 28, 2005 IC Lab Characterization 44 22

23 Structure sentences to convey correct meaning Challenge Weak: The reason the film was thinner than expected was because Better: The film was thinner than expected because Weak: The annealing step caused the resistivity to decrease. Better: Annealing decreased the resistivity J / 3.155J Feb. 28, 2005 IC Lab Characterization 45 Writing Help The Science of Scientific Writing by Gopen & Swan A Google search will generate many hits. The Writing Center web.mit.edu/writing The Mayfield Handbook of Scientific and Technical Writing J/6.152J Writing Tutors Mya Poe myapoe@mit.edu Thea Singer thea.singer@comcast.net 6.152J / 3.155J Feb. 28, 2005 IC Lab Characterization 46 23