Chapter 9: Controller design. Controller design. Controller design

Transcription

1 Chapter 9. Controller Deign 9.. Introduction 9.2. Eect o negative eedback on the network traner unction Feedback reduce the traner unction rom diturbance to the output Feedback caue the traner unction rom the reerence input to the output to be inenitive to variation in the gain in the orward path o the loop 9.3. Contruction o the important quantitie /(T) and T/(T) and the cloed-loop traner unction Controller deign 9.4. Stability The phae margin tet The relation between phae margin and cloed-loop damping actor Tranient repone v. damping actor 9.5. Regulator deign Lead (PD) compenator Lag (PI) compenator Combined (PID) compenator Deign example 2 Controller deign 9.6. Meaurement o loop gain Voltage injection Current injection Meaurement o untable ytem 9.7. Summary o key point 3

2 9.. Introduction v g (t) Switching converter Load i load (t) v(t) Output voltage o a witching converter depend on duty cycle d, input voltage v g, and load current i load. δ(t) δ(t) Tranitor gate driver Pule-width modulator v c (t) v g (t) dt T t v(t) Diturbance i load (t) d(t) Switching converter v(t) = (v g, i load, d) } } Control input 4 The dc regulator application Objective: maintain contant output voltage v(t) = V, in pite o diturbance in v g (t) and i load (t). Typical variation in v g (t): 00Hz or 20Hz ripple, produced by rectiier circuit. v g (t) i load (t) d(t) Switching converter v(t) = (v g, i load, d) } } Diturbance Control input v(t) Load current variation: a igniicant tep-change in load current, uch a rom 50% to 00% o rated value, may be applied. A typical output voltage regulation peciication: 5V ± 0.V. Circuit element are contructed to ome peciied tolerance. In high volume manuacturing o converter, all output voltage mut meet peciication. 5 The dc regulator application So we cannot expect to et the duty cycle to a ingle value, and obtain a given contant output voltage under all condition. Negative eedback: build a circuit that automatically adjut the duty cycle a neceary, to obtain the peciied output voltage with high accuracy, regardle o diturbance or component tolerance. 6

3 Negative eedback: a witching regulator ytem Power input Switching converter i load Load v g v Senor gain Tranitor gate driver δ Pule-width modulator 7 Error ignal v c G c () v e Hv Compenator Reerence input v re Negative eedback v re Reerence input Error ignal v e (t) v c Compenator Pule-width modulator Senor gain v g (t) i load (t) d(t) Switching converter v(t) = (v } g, i load, d) Diturbance Control input } v(t) Eect o negative eedback on the network traner unction Small ignal model: open-loop converter e()d() : M(D) L e v g () j()d() C v() R i load () Output voltage can be expreed a where v()=g vd() d()g vg() v g()z out() i load() G vd ()= v() d() v g =0 i load =0 G vg ()= v() v g () d =0 i load =0 Z out ()= v() i load () d =0 v g =0 9

4 Voltage regulator ytem mall-ignal model Ue mall-ignal converter model v g () Perturb and linearize remainder o eedback loop: v re(t)=v re v re(t) v e(t)=v e v e(t) etc. v re () Reerence input Error ignal v e () e()d() j()d() G c () Compenator v c () : M(D) V M Pule-width modulator L e d() C v() R i load () v() Senor gain 0 Regulator ytem mall-ignal block diagram i load () v Z out () g () G vg () ac line variation Pule-width Compenator modulator v re () v e () v c () d() G Reerence Error c () V G vd () M Duty cycle input ignal variation Converter power tage Load current variation v() Output voltage variation v() Senor gain Solution o block diagram Manipulate block diagram to olve or v(). Reult i G v = v c G vd / V M Z re v HG c G vd / V g i out M HG c G vd / V load M HG c G vd / V M G vg which i o the orm G vg Z out v = v T re H T v g T i load T with T()= G c() G vd()/v M ="loop gain" Loop gain T() = product o the gain around the negative eedback loop. 2

5 9.2.. Feedback reduce the traner unction rom diturbance to the output Original (open-loop) line-to-output traner unction: G vg ()= v() v g () d =0 i load =0 With addition o negative eedback, the line-to-output traner unction become: v() v g () v re =0 i load =0 = G vg() T() Feedback reduce the line-to-output traner unction by a actor o T() I T() i large in magnitude, then the line-to-output traner unction become mall. 3 Cloed-loop output impedance Original (open-loop) output impedance: Z out ()= With addition o negative eedback, the output impedance become: Feedback reduce the output impedance by a actor o T() v() i load () d =0 v g =0 v() = Z out() i load () v re =0 T() v g =0 I T() i large in magnitude, then the output impedance i greatly reduced in magnitude Feedback caue the traner unction rom the reerence input to the output to be inenitive to variation in the gain in the orward path o the loop Cloed-loop traner unction rom v re to v() i: v() = v re () T() v g =0 T() i load =0 I the loop gain i large in magnitude, i.e., >>, then (T) T and T/(T) T/T =. The traner unction then become v() v re () which i independent o the gain in the orward path o the loop. Thi reult applie equally well to dc value: V = V re H(0) T(0) T(0) H(0) 5

6 9.3. Contruction o the important quantitie /(T) and T/(T) Example 8 6 T 0 db Q db ω z T()=T 0 2 Qω p ω p ω p p 4/decade z 2/decade c Croover requency p2 4/decade 4 Hz 0 Hz 00 Hz khz 0 khz 00 khz At the croover requency c, = 6 Approximating /(T) and T/(T) T or >> T T or << T() or >> T() or << 7 Example: contruction o T/(T) 8 6 T or >> T T or << 4 p 2 2 T T z 2/decade Croover requency c p2 4/decade 4 Hz 0 Hz 00 Hz khz 0 khz 00 khz 8

7 Example: analytical expreion or approximate reerence to output traner unction At requencie uiciently le that the croover requency, the loop gain T() ha large magnitude. The traner unction rom the reerence to the output become v() v re () = T() T() Thi i the deired behavior: the output ollow the reerence according to the ideal gain /. The eedback loop work well at requencie where the loop gain T() ha large magnitude. At requencie above the croover requency, <. The quantity T/(T) then ha magnitude approximately equal to, and we obtain v() v re () = T() T() T() = G c()g vd () V M Thi coincide with the open-loop traner unction rom the reerence to the output. At requencie where <, the loop ha eentially no eect on the traner unction rom the reerence to the output. 9 Same example: contruction o /(T) T 0 db p 4/decade 4/decade T 0 db p Q db z 2/decade 2/decade z Q db T c Croover requency T() p2 T() or >> or << 4/decade 8 Hz 0 Hz 00 Hz khz 0 khz 00 khz 20 Interpretation: how the loop reject diturbance Below the croover requency: < c and > Then /(T) /T, and diturbance are reduced in magnitude by / T() or >> T() or << Above the croover requency: > c and < Then /(T), and the eedback loop ha eentially no eect on diturbance 2

8 Terminology: open-loop v. cloed-loop Original traner unction, beore introduction o eedback ( open-loop traner unction ): G vd() G vg() Z out() Upon introduction o eedback, thee traner unction become ( cloed-loop traner unction ): T() T() The loop gain: T() G vg () T() Z out () T() Stability Even though the original open-loop ytem i table, the cloed-loop traner unction can be untable and contain right hal-plane pole. Even when the cloed-loop ytem i table, the tranient repone can exhibit undeirable ringing and overhoot, due to the high Q -actor o the cloedloop pole in the vicinity o the croover requency. When eedback detabilize the ytem, the denominator (T()) term in the cloed-loop traner unction contain root in the right hal-plane (i.e., with poitive real part). I T() i a rational raction o the orm N() / D(), where N() and D() are polynomial, then we can write T() T() = N() D() N() D() T() = N() D() N() = N()D() D() = N()D() Could evaluate tability by evaluating N() D(), then actoring to evaluate root. Thi i a lot o work, and i not very illuminating. 23 Determination o tability directly rom T() Nyquit tability theorem: general reult. A pecial cae o the Nyquit tability theorem: the phae margin tet Allow determination o cloed-loop tability (i.e., whether /(T()) contain RHP pole) directly rom the magnitude and phae o T(). A good deign tool: yield inight into how T() hould be haped, to obtain good perormance in traner unction containing /(T()) term. 24

9 9.4.. The phae margin tet A tet on T(), to determine whether /(T()) contain RHP pole. The croover requency c i deined a the requency where T(j2π c ) = 0dB The phae margin ϕ m i determined rom the phae o T() at c, a ollow: ϕ m = 8 T(j2π c ) I there i exactly one croover requency, and i T() contain no RHP pole, then the quantitie T()/(T()) and /(T()) contain no RHP pole whenever the phae margin ϕ m i poitive. 25 Example: a loop gain leading to a table cloed-loop ytem 6 4 T 2 p z Croover requency T c ϕ m 8 27 Hz 0 Hz 00 Hz khz 0 khz 00 khz T(j2π c ) = 2 ϕ m = 8 2 = Example: a loop gain leading to an untable cloed-loop ytem 6 4 T 2 p Croover requency T p2 c ϕ m (< 0) 8 27 Hz 0 Hz 00 Hz khz 0 khz 00 khz T(j2π c ) = 23 ϕ m = 8 23 = 5 27

10 The relation between phae margin and cloed-loop damping actor How much phae margin i required? A mall poitive phae margin lead to a table cloed-loop ytem having complex pole near the croover requency with high Q. The tranient repone exhibit overhoot and ringing. Increaing the phae margin reduce the Q. Obtaining real pole, with no overhoot and ringing, require a large phae margin. The relation between phae margin and cloed-loop Q i quantiied in thi ection. 28 A imple econd-order ytem Conider the cae where T() 2 can be wellapproximated in 4 the vicinity o the croover requency a T() = ω 0 ω T 2 2/decade 0 T 9 2 /0 2 ϕ m /decade Cloed-loop repone I Then or, T() = ω 0 ω 2 T() T() = T() = ω 2 0 ω 0 ω 2 T() T() = Qω c ω c 2 where ω c = ω 0ω 2 =2π c Q = ω 0 ω c = ω 0 ω 2 30

11 Low-Q cae Q = ω 0 ω c = ω 0 ω 2 low-q approximation: Q ω c = ω ω c 0 Q = ω 2 2/decade T T 0 0 c = 0 2 Q = 0 / c /decade 3 High-Q cae ω c = ω 0ω 2 =2π c Q = ω 0 ω c = 2/decade 0 2 ω 0 ω T T c = Q = 0 / c 4/decade 32 Q v. ϕ m Solve or exact croover requency, evaluate phae margin, expre a unction o ϕ m. Reult i: Q = co ϕ m in ϕ m ϕ =tan - 4Q 4 m 2Q 4 33

12 Q v. ϕ m Q 2 5 db 5 db 5 db 5 db Q = ϕ m = 52 Q = db ϕ m = ϕ m Tranient repone v. damping actor Unit-tep repone o econd-order ytem T()/(T()) v(t)= 2Qe-ω c t/2q 4Q 2 in 4Q 2 ω 2Q c t tan - 4Q 2 Q > 0.5 ω 2 ω v(t)= ω 2 ω e ω t ω ω e ω 2 t 2 Q < 0.5 ω, ω 2 = ω c 2Q ± 4Q2 For Q > 0.5, the peak value i peak v(t)=e π / 4Q2 35 Tranient repone v. damping actor v(t) 2.5 Q = 50 Q = 0 Q = 4 Q = Q = Q = 0.75 Q = 0.5 Q = 0.3 Q = 0.2 Q = 0. 0 Q = 0.05 Q = ω c t, radian 36

13 9.5. Regulator deign Typical peciication: Eect o load current variation on output voltage regulation Thi i a limit on the maximum allowable output impedance Eect o input voltage variation on the output voltage regulation Thi limit the maximum allowable line-to-output traner unction Tranient repone time Thi require a uiciently high croover requency Overhoot and ringing An adequate phae margin mut be obtained The regulator deign problem: add compenator network G c () to modiy T() uch that all peciication are met Lead (PD) compenator ω z G c ()=G c0 ω p G c G c0 G c0 p z p ϕmax Improve phae margin G c z = z p p /0 0 z 45 /decade z /0 45 /decade 38 Lead compenator: maximum phae lead 9 Maximum phae lead 75 ϕmax = z p G c ( ϕmax )=tan p / z p z 2 p = in θ z in θ z p 39

14 Lead compenator deign To optimally obtain a compenator phae lead o θ at requency c, the pole and zero requencie hould be choen a ollow: z = c p = c in θ in θ in θ in θ I it i deired that the magnitude o the compenator gain at c be unity, then G c0 hould be choen a G c0 = z p G c G c p G c0 z p G c0 ϕmax z = z p p /0 0 z 45 /decade z /0 45 /decade 40 Example: lead compenation 6 T 0 4 T 0 G c0 Original gain T Compenated gain 0 2 z c 2 p 4 T Compenated phae aymptote Original phae aymptote 9 ϕ m Lag (PI) compenation G c G c ()=G c ω L 2 /decade G c Improve lowrequency loop gain and regulation L 0 L G c 9 L /0 45 /decade 42

15 Example: lag compenation original (uncompenated) loop gain i T T u ()= u0 ω 0 compenator: G c ()=G c ω L Deign trategy: chooe G c to obtain deired croover requency ω L uiciently low to maintain adequate phae margin T u T u T T u0 43 L 0 0 G c T u0 0 L 0 0 Hz 0 Hz 00 Hz khz 0 khz 00 khz c ϕ m Example, continued Contruction o /(T), lag compenator example: 4 2 L 0 G c T u0 c 2 4 T L 0 G c T u0 Hz 0 Hz 00 Hz khz 0 khz 00 khz Combined (PID) compenator ω L ω z G c ()=G cm ω p ω 4 p2 G c G G c c 2 p p2 G cm c z L 2 0 L 45 /decade 0 z p2 /0 9 4 G c 9 L /0 p /0 9/decade z /0 9/decade 0 p

16 Deign example L 50 µh i load v g (t) 28 V Tranitor gate driver δ Pule-width modulator C 500 µf = 00 khz V M = 4 V v c G c () v(t) Compenator R 3 Ω Error ignal v e v re 5 V Hv Senor gain 46 Quiecent operating point Input voltage V g = 28V Output V = 5V, I load = 5A, R = 3Ω Quiecent duty cycle D = 5/28 = Reerence voltage V re = 5V Quiecent value o control voltage V c = DV M = 2.4V Gain H = V re /V = 5/5 = /3 47 Small-ignal model V D 2 d : D L v g () V R d C v() R i load () v re (= 0) Error ignal v e () G c () Compenator v c () d() V M V M = 4 V T() v() H = 3 48

17 Open-loop control-to-output traner unction G vd () G vd ()= D V R L 2 LC tandard orm: G vd ()=G d0 Q 0 ω 0 ω 0 alient eature: 6V G vd G vd 4V G vd Q G d0 = 28 V 29 dbv 0 = db 2V 0 G 0 /2Q 0 vd 0 = 900 Hz V 2V 9 2 4V 8 0 /2Q 0 0 =. khz 27 G d0 = D V =28V 0 = ω 0 2π = 2π LC = khz Q 0 = R C = dB L Hz 0 Hz 00 Hz khz 0 khz 00 khz 49 Open-loop line-to-output traner unction and output impedance G vg ()=D L R 2 LC ame pole a control-to-output traner unction tandard orm: G vg ()=G g0 Q 0 ω 0 ω 0 Output impedance: Z out ()=R L = L C R L 2 LC 2 50 Sytem block diagram T()=G c () G vd () VM T()= G c() V V M D Q 0 ω 0 ω 0 2 v g () ac line variation G vg () i load () Load current variation Z out () v re (=0) v e () G c () T() v c () V M = 4 V V M H = 3 d() Duty cycle variation G vd () Converter power tage v() 5

18 Uncompenated loop gain (with G c = ) 4 T u T u 2 T u T u db Q 0 = db 0 khz With G c =, the loop gain i T u ()=T u0 Q 0 ω 0 ω 0 T u0 = HV DV M = dB T u 0 2Q 0 = 900 Hz c =.8 khz, ϕ m = 5 0 2Q 0 =. khz 4/decade Hz 0 Hz 00 Hz khz 0 khz 00 khz Lead compenator deign Obtain a croover requency o 5 khz, with phae margin o 52 T u ha phae o approximately 8 at 5 khz, hence lead (PD) compenator i needed to increae phae margin. Lead compenator hould have phae o 52 at 5 khz T u ha magnitude o 20.6 db at 5 khz Lead compenator gain hould have magnitude o 20.6 db at 5 khz Lead compenator pole and zero requencie hould be z =(5kHz) p =(5kHz) in (52 ) in (52 ) =.7kHz in (52 ) in (52 ) = 4.5kHz Compenator dc gain hould be G c0 = c 0 2 T u0 z p = 3.7.3dB 53 Lead compenator Bode plot 4 G c p G G c c0 2 G c z G p c0 c z = z p 2 4 z /0 p /0 0 z 9 G c 9 8 Hz 0 Hz 00 Hz khz 0 khz 00 khz 54

19 Loop gain, with lead compenator ω z T()=T u0 G c0 ω p Q 0 ω 0 ω T 0 = db Q 0 = db T T 70 Hz 0 khz z.7 khz c 5 khz 900 Hz p 4 khz.4 khz 7 khz 9. khz ϕ m = Hz 0 Hz 00 Hz khz 0 khz 00 khz 55 /(T), with lead compenator T 0 = db T /T 0 = db 0 z Q 0 = db c p Q 0 need more low-requency loop gain hence, add inverted zero (PID controller) 4 Hz 0 Hz 00 Hz khz 0 khz 00 khz 56 Improved compenator (PID) ω ω L z G c ()=G cm ω 4 p G c G c G c 2 p G cm c z L 2 4 G c 9 L /0 z /0 45 /decade p /0 9/decade 57 0 L 0 z 45 /dec Hz 0 Hz 00 Hz khz 0 khz 00 khz add inverted zero to PD compenator, without changing dc gain or corner requencie chooe L to be c /0, o that phae margin i unchanged

20 T() and /(T()), with PID compenator Q 0 L 0 z c 2 4 T Q 0 p 6 8 Hz 0 Hz 00 Hz khz 0 khz 00 khz 58 Line-to-output traner unction v v g Gvg (0) = D Open-loop G vg 2/decade Cloed-loop G vg T D T u0 G cm Q 0 0 L z c 4/decade Hz 0 Hz 00 Hz khz 0 khz 00 khz Meaurement o loop gain Block Block 2 A Z () v re () v e () G ()v e () v x () G 2 ()v x () = v() T() Objective: experimentally determine loop gain T(), by making meaurement at point A Correct reult i Z T()=G () 2 () G 2 () Z () 60

21 Conventional approach: break loop, meaure T() a conventional traner unction V CC 0 Block Block 2 dc bia Z () v re () v e () G ()v e () v y () v z v x () G 2 ()v x () = v() T m () meaured gain i T m ()= v y() v x () v re =0 v g =0 T m()=g () G 2() 6 Meaured v. actual loop gain Actual loop gain: T()=G () Meaured loop gain: T m()=g () G 2() Expre T m a unction o T: T m ()=T() Z () G 2 () Z () T m () T() provided that Z 2 >> Z 62 Dicuion Breaking the loop dirupt the loading o block 2 on block. A uitable injection point mut be ound, where loading i not igniicant. Breaking the loop dirupt the dc biaing and quiecent operating point. A potentiometer mut be ued, to correctly bia the input to block 2. In the common cae where the dc loop gain i large, it i very diicult to correctly et the dc bia. It would be deirable to avoid breaking the loop, uch that the biaing circuit o the ytem itel et the quiecent operating point. 63

22 9.6.. Voltage injection 0 Block v z Block 2 i() Z () Z () v re () v e () G ()v e () v y () v x () G 2 ()v x () = v() T v () Ac injection ource v z i connected between block and 2 Dc bia i determined by biaing circuit o the ytem itel Injection ource doe modiy loading o block 2 on block 64 Voltage injection: meaured traner unction T v () Network analyzer meaure T v ()= v y() v x () v re =0 v g =0 0 v re () v e () Block v z Block 2 i() Z () Z () G ()v e () v v Z y () x () 2 () T v () G 2 ()v x () = v() Solve block diagram: v e ()= G 2 () v x () v y ()=G () v e ()i() Z () Hence v y()=v x() G 2() G ()i() Z () with i()= v x() Subtitute: v y ()=v x () G () G 2 () Z () which lead to the meaured gain T v ()=G () G 2 () Z () 65 Comparion o T v () with T() Actual loop gain i T()=G () G 2 () Z () Gain meaured via voltage injection: T v ()=G () G 2 () Z () Expre Tv() in term o T(): T v ()=T() Z () Z () Condition or accurate meaurement: T v () T() provided (i) Z () <<, and (ii) T() >> Z () 66

23 Example: voltage injection Block Block 2 v 50 Ω z v y () v x () 500 Ω Z ()=50Ω =500Ω Z () = 0. 20dB Z () =. 0.83dB uppoe actual T()= 0 4 2π 0Hz 2π 00kHz 67 Example: meaured T v () and actual T() 0 8 T v ()=T() Z () Z () 6 4 T v 2 2 Z Z 2 20dB T v 4 0 Hz 00 Hz khz 0 khz 00 khz MHz Current injection 0 v re () v e () G ()v e () T i ()= i y() i x () v re =0 v g =0 Block Block 2 i y () i x () Z () i z () Z () G 2 ()v x () = v() T i () 69

24 Current injection It can be hown that T i ()=T() Z 2() Z 2() Z () Z () Condition or obtaining accurate meaurement: (i) << Z (), and (ii) T() >> Z 2() Z () Injection ource impedance Z i irrelevant. We could inject uing a Thevenin-equivalent voltage ource: i y () C b R v z () i z () i x () Meaurement o untable ytem Injection ource impedance Z doe not aect meaurement Increaing Z reduce loop gain o circuit, tending to tabilize ytem Original (untable) loop gain i meaured (not including Z ), while circuit operate tabily v z Block Block 2 0 Z () R ext Z () v re () v e () G ()v e () v y () L ext v x () G 2 ()v x () = v() T v () Summary o key point. Negative eedback caue the ytem output to cloely ollow the reerence input, according to the gain /. The inluence on the output o diturbance and variation o gain in the orward path i reduced. 2. The loop gain T() i equal to the product o the gain in the orward and eedback path. The loop gain i a meaure o how well the eedback ytem work: a large loop gain lead to better regulation o the output. The croover requency c i the requency at which the loop gain T ha unity magnitude, and i a meaure o the bandwidth o the control ytem. 72

25 Summary o key point 3. The introduction o eedback caue the traner unction rom diturbance to the output to be multiplied by the actor /(T()). At requencie where T i large in magnitude (i.e., below the croover requency), thi actor i approximately equal to /T(). Hence, the inluence o low-requency diturbance on the output i reduced by a actor o /T(). At requencie where T i mall in magnitude (i.e., above the croover requency), the actor i approximately equal to. The eedback loop then ha no eect. Cloed-loop diturbance-tooutput traner unction, uch a the line-to-output traner unction or the output impedance, can eaily be contructed uing the algebra-onthe-graph method. 4. Stability can be aeed uing the phae margin tet. The phae o T i evaluated at the croover requency, and the tability o the important cloed-loop quantitie T/(T) and /(T) i then deduced. Inadequate phae margin lead to ringing and overhoot in the ytem tranient repone, and peaking in the cloed-loop traner unction. 73 Summary o key point 5. Compenator are added in the orward path o eedback loop to hape the loop gain, uch that deired perormance i obtained. Lead compenator, or PD controller, are added to improve the phae margin and extend the control ytem bandwidth. PI controller are ued to increae the low-requency loop gain, to improve the rejection o low-requency diturbance and reduce the teady-tate error. 6. Loop gain can be experimentally meaured by ue o voltage or current injection. Thi approach avoid the problem o etablihing the correct quiecent operating condition in the ytem, a common diiculty in ytem having a large dc loop gain. An injection point mut be ound where intertage loading i not igniicant. Untable loop gain can alo be meaured. 74