Review: What s an FSM? EECS Components and Design Techniques for Digital Systems

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1 EECS 5 - Componn nd Dign Tchniqu for Digil Sym Lc 8 Uing, Modling nd Implmning FSM Dvid Cullr Elcricl Enginring nd Compur Scinc Univriy of Cliforni, Brkly hp:// hp://www-in.c.brkly.du/~c5 Rviw: Wh n FSM? Nx i funcion of nd inpu Moor Mchin: oupu i funcion of h inpua S / oupu inpub Mly Mchin: oupu i funcion of nd inpu S inpua/oupua inpub/oupub Ofn PLA 9/23/4 EECS5 F4 Cullr Lc 8 9/23/4 EECS5 F4 Cullr Lc 8 2 Rviw: Forml Dign Proc Logic quion from bl: OUT = PS NS = PS xor IN Circui Digrm: p n Rviw of Dign Sp:. Circui funcionl pcificion 2. S Trniion Digrm 3. Symbolic S Trniion Tbl 4. Encodd S Trniion Tbl 5. Driv Logic Equion 6. Circui Digrm FF for XOR g for n clculion for NS nd OUT DFF o hold prn no ndd for oupu 9/23/4 EECS5 F4 Cullr Lc 8 3 Rviw: Fini S Mchin Rprnion S: drmind by poibl vlu in qunil org lmn Trniion: chng of Clock: conrol whn cn chng by conrolling org lmn Squnil Logic Squnc hrough ri of Bd on qunc of vlu on inpu ignl Clock priod dfin lmn of qunc 9/23/4 EECS5 F4 Cullr Lc 8 4 Oulin Rviw Typicl u of FSM Synchronou Sq. Circui f compoiion Timing FSM in vrilog (rinforcing lb lcur) S rducion nd ignmn 9/23/4 EECS5 F4 Cullr Lc 8 5 Rcll: Prlll o Sril Convrr //Prlll o Sril convrr modul PrToSr(LD, X, ou, K); inpu [3:] X; inpu LD, K; oupu ou; rg ou; rg [3:] Q; ign ou = Q[]; (podg K) bgin On common u of FSM i in dpr from on ubym o nohr. diffrn d widh diffrn bi r if (LD) Q <= X; diffrn proocol, l Q <= { b,q[3:]}; modul // PrToSr 9/23/4 EECS5 F4 Cullr Lc 8 6

2 Exmpl: By-bi rm By-bi rm wih R Mching By FIFO ini / LD bi /pop bi pop bi 2 conrollr bi 3 Shif rgir LD bi 4 Sril link bi 5 bi 6 bi 7 / LD 9/23/4 EECS5 F4 Cullr Lc 8 7 By FIFO ini / LD bi /pop ~ bi bi ~ ~ pop bi 2 ~ conrollr bi 3 Shif rgir ~ LD bi 4 ~ Sril link bi 5 ~ bi 6 How would you implmn hi FSM? ~ bi 7 / LD 9/23/4 EECS5 F4 Cullr Lc 8 ~ 8 Anohr xmpl: bu proocol A bu i: hrd communicion link ingl of wir ud o connc mulipl ubym Exmpl: Pnium Sym Orgnizion Procor/Mmory Bu Procor Conrol Mmory Inpu Dph Oupu PCI Bu A Bu i lo fundmnl ool for compoing lrg, complx ym (mor lr in h rm) ymic mn of brcion 9/23/4 EECS5 F4 Cullr Lc 8 9 I/O Bu 9/23/4 EECS5 F4 Cullr Lc 8 Arbirion for h bu Simpl Synchronou Proocol Bu Arbir Grn Dvic Rq Dvic 2 Dvic N BRq BG CMD Addr I wn h bu nop I ill wn h bu You go i Rd+Addr Mm grb ddr Proc grb d I m don fr hi D D D2 Cnrl rbirion hown hr Ud in nilly ll procor-mmory bu nd in highpd I/O bu 9/23/4 EECS5 F4 Cullr Lc 8 Evn mmory bu r mor complx hn hi mmory (lv) my k im o rpond i nd o conrol d r 9/23/4 EECS5 F4 Cullr Lc 8 2

3 Procor Sid of Proocol - kch Idl ~BR ~BG proc rd Rqu bu BR BG Mmory wi? Addiionl oupu? Mmory id? Addr BR,RD, ddr_nbl D BR, MDR_nbl D 2 ~BR, MDR_nbl BRq BG Simpl Synchronou Proocol (con) CMD Addr D I wn h bu nop I ill wn h bu You go i Rd+Addr Mm grb ddr D Proc grb d I m don fr hi D2 idl rq rq w-ddr r-d r-d2 idl 9/23/4 EECS5 F4 Cullr Lc 8 3 9/23/4 EECS5 F4 Cullr Lc 8 4 Fundmnl Dign Principl Divid circui ino combinionl nd Locliz fdbck loop nd mk i y o brk cycl Implmnion of org lmn ld o vriou form of qunil Form of Squnil Logic Aynchronou qunil chng occur whnvr inpu chng (lmn my b impl wir or dly lmn) Synchronou qunil chng occur in lock p cro ll org lmn (uing priodic wvform - h clock) 9/23/4 EECS5 F4 Cullr Lc 8 5 9/23/4 EECS5 F4 Cullr Lc 8 6 Gnrl Modl of Synchronou Circui clock inpu Compoing FSM ino lrgr dign FSM FSM inpu rg rg oupu opion fdbck All wir, xcp clock, my b mulipl bi wid. Rgir (rg) collcion of flip-flop clock diribud o ll flip-flop ypicl r? oupu Combinionl Logic Block () no inrnl (no fdbck) oupu only funcion of inpu Priculr inpu/oupu r opionl Opionl Fdbck ALL CYES GO THROUGH A REG! 9/23/4 EECS5 F4 Cullr Lc 8 7 9/23/4 EECS5 F4 Cullr Lc 8 8

4 Compoing Moor FSM Compoing Mly FSM nx Moor oupu nx Moor oupu Mly FSM Oupu Nx Oupu Nx Synchronou dign mhodology prrvd 9/23/4 EECS5 F4 Cullr Lc 8 9 Synchronou dign mhodology viold!!! Why do dignr ud hm? Fw, ofn mor nurl in iolion Sf if lch ll h oupu» Look lik mly mchin, bu in rlly» Wh hppn o h iming? 9/23/4 EECS5 F4 Cullr Lc 8 2 FSM iming Clock How long mu hi b? S Tim (Clock Priod) Announcmn Rding 8.4,7.4, 8. W ouchd on id from chpr, no in rdr. Will b vilbl on lin. Inpu Wh drmin hi? Oupu S (inrnl) Oupu propgion dly S rgir propgion dly Wh drmin min FSM cycl im (mx clock r)? 9/23/4 EECS5 F4 Cullr Lc 8 2 9/23/4 EECS5 F4 Cullr Lc 8 22 Fini S Mchin in Vrilog Mly oupu Vrilog FSM - Rduc xmpl Chng h fir o in ch ring of Exmpl Moor mchin implmnion inpu combinionl nx combinionl currn Moor oupu modul Rduc(Ou, Clock, R, In); oupu Ou; inpu Clock, R, In; rg Ou; rg [:] CurrnS; // rgir rg [:] NxS; // S ignmn loclprm STATE_Zro = 2 h, STATE_On = 2 h, STATE_Two = 2 h2, STATE_X = 2 hx; 9/23/4 EECS5 F4 Cullr Lc /23/4 EECS5 F4 Cullr Lc 8 24

5 Moor Vrilog FSM: combinionl pr Moor Vrilog FSM: pr or CurrnS) bgin NxS = CurrnS; Ou = b; c (CurrnS) STATE_Zro: bgin // l inpu w zro if (In) NxS = STATE_On; STATE_On: bgin // w'v n on if (In) NxS = STATE_Two; l NxS = STATE_Zro; STATE_Two: bgin // w'v n l 2 on Ou = ; if (~In) NxS = STATE_Zro; dful: bgin // in c w rch bd Ou = bx; NxS = STATE_X; c // Implmn h rgir (podg Clock) bgin if (R) CurrnS <= l CurrnS <= modul STATE_Zro; NxS; No: podg Clock rquir NONBLOCKING ASSIGNMENT. Blocking Aignmn <-> Combinionl Logic Nonblocking Aignmn <-> Squnil Logic (Rgir) Compu: oupu = G() 9/23/4 EECS5 F4 Cullr Lc 8 nx = F(, in) 25 9/23/4 EECS5 F4 Cullr Lc 8 26 Mly Vrilog FSM for Rduc- xmpl modul Rduc(Clock, R, In, Ou); inpu Clock, R, In; oupu Ou; rg Ou; rg CurrnS; // rgir rg NxS; loclprm STATE_Zro = b, STATE_On = b; Clock) bgin if (R) CurrnS <= STATE_Zro; l CurrnS <= NxS; No: mllr mchin (In or CurrnS) bgin NxS = CurrnS; Ou = b; c (CurrnS) zro: if (In) NxS = STATE_On; on: bgin // w'v n on if (In) NxS = STATE_On; l NxS = STATE_Zro; Ou = In; Oupu = G(, inpu) c modul 9/23/4 EECS5 F4 Cullr Lc 8 27 Rricd FSM Implmnion Syl Mly mchin rquir wo lwy block Rgir nd podg Clock block Inpu o oupu nd combinionl block Moor mchin cn b don wih on lwy block, bu. E.g. impl counr Vry bd id for gnrl FSM» Thi will co you hour of confuion, don ry i» W will no ccp lb wih hi yl for gnrl FSM U wo lwy block! Moor oupu Shr wih rgir, u uibl ncoding 9/23/4 EECS5 F4 Cullr Lc 8 28 Singl-lwy Moor Mchin (No Allowd!) modul rduc (clk, r, in, ou); inpu clk, r, in; oupu ou; rg ou; rg [:] ; // rgir prmr zro =, on =, wo = 2; 9/23/4 EECS5 F4 Cullr Lc 8 29 Singl-lwy Moor Mchin (No Allowd!) # clk) c () zro: bgin ou <= ; if (in) <= on; l <= zro; on: if (in) bgin <= wo; ou <= ; l bgin <= zro; ou <= ;! " wo: if (in) bgin <= wo; ou <= ; l bgin <= zro; ou <= ; dful: bgin <= zro; ou <= ; c modul 9/23/4 EECS5 F4 Cullr Lc 8 3

6 Fini S Mchin FSM Opimizion inpu combinionl nx Mly oupu combinionl currn Moor oupu Rcommd FSM implmnion yl Implmn combinionl uing on lwy block Implmn n xplici rgir uing cond lwy block S Rducion: Moivion: lowr co» fwr flip-flop in onho implmnion» poibly fwr flipflop in ncodd implmnion» mor don cr in NS» fwr g in NS Simplr o dign wih xr hn rduc lr. Exmpl: Odd priy chckr. Two mchin - idnicl bhvior. S [] S [] S2 [] S [] S [] 9/23/4 EECS5 F4 Cullr Lc 8 3 9/23/4 EECS5 F4 Cullr Lc 8 32 S Rducion S Rducion i bd on: Two r quivln if, for ch mmbr of h of inpu, hy giv xcly h m oupu nd h circui ihr o h m or o n quivln. If wo r quivln, on cn b limind wihou ffcing h bhvior of h FSM. Svrl lgorihm xi: Row mching mhod. Implicion bl mhod. Row Mching i bd on h -rniion bl: If wo hv h m oupu, nd boh rniion o h m nx, or boh rniion o ch ohr, or boh lf-loop, hn hy r quivln. Combin h quivln ino nw rnmd. Rp unil no mor r combind. No: Thi lgorihm i lighly diffrn hn h book. Row Mching Exmpl S Trniion Tbl NS oupu PS x= x= x= x= b b c d c d d f f f g f g f 9/23/4 EECS5 F4 Cullr Lc /23/4 EECS5 F4 Cullr Lc 8 34 Row Mching Exmpl (con) NS oupu PS x= x= x= x= b b c d c d d f f f f NS oupu PS x= x= x= x= b b c d c d d d d Rducd S Trniion Digrm S Rducion Th row mching mhod i no gurnd o rul in h opiml oluion in ll c, bcu i only look pir of. For xmpl: / / / S S S2 / / / Anohr (mor complicd) mhod gurn h opiml oluion: Implicion bl mhod: cf. Mno, chpr 9 Wh rul of humb huriic? 9/23/4 EECS5 F4 Cullr Lc /23/4 EECS5 F4 Cullr Lc 8 36

7 S Mp S S S3 S2 Aignmn S q2 q q S S S2 S3 S4 q q q q S4 q2 q2 S S4 S3 S S S3 S2 S S2 Aignmn S q2 q q S S S2 S3 S4 S4 K-mp r ud o hlp viuliz good ncoding. Adjcn in h STD hould b md djcn in h mp. 9/23/4 EECS5 F4 Cullr Lc 8 37 S Aignmn Alrniv huriic bd on inpu nd oupu bhvior wll rniion: α i/j β i/k Adjcn ignmn o: h hr common nx (group ' in nx mp) High Prioriy Mdium Prioriy α α i/j β β i/j Low Prioriy h hr common ncor (group ' in nx mp) h hv common oupu bhvior (group ' in oupu mp) 9/23/4 EECS5 F4 Cullr Lc 8 38 Summry FSM r criicl ool in your dign oolbox Adpr, Proocol, Dph Conrollr, Thy ofn inrc wih ohr FSM Imporn o dign ch wll nd o mk hm work oghr wll. Kp your vrilog FSM cln Spr combinionl pr from upd Good mchin dign i n iriv proc S ncoding Rducion Aignmn 9/23/4 EECS5 F4 Cullr Lc 8 39

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