Chapter 3. Boolean Algebra. (continued)

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1 Chapter 3. Boolean Algebra (continued)

2 Algebraic structure consisting of: set of elements B binary operations {+, -} unary operation {'} Boolean Algebra such that the following axioms hold:. B contains at least two elements, a, b, such that a = b 2. Closure a,b in B, (i) a + b in B (ii) a b in B 3. Commutative Laws: a,b in B, (i) a + b = b + a (ii) a b = b a 4. Identities:, in B (i) a + = a (ii) a = a 5. Distributive Laws: (i) a + (b c) = (a + b) (a + c) (ii) a (b + c) = a b + a c 6. Complement: (i) a + a' = (ii) a a'= 3-2

3 Theorem for Multiplying Out and Factoring To To obtain obtain a sum-of-product form form Multiplying out out using using distributive laws laws X ( Y + Z) = XY + ( X + Y )( X + Z) = X + YZ 678 Theorem ( X + Y)( X ' + Z) = XZ + for for multiplying out: out: XZ X ' Y (3-3) If X =, (3-3) reduces to Y(+ Z) = + Y or Y = Y. If X =, (3-3) reduces to (+ Y)Z = Z + Y or Z = Z. because the equation is valid for both X = and X =, it is always valid. The followingexampleillustrates the use of Theorem for for factoring: A B + AC ' = ( A + C)( A' + B) Theorem(3-3) for factoring: 3. Multiplying Out and Factoring Expressions 3-3

4 Multiplying Out Theorem for multiplying out: Multiplying out using distributive laws ( Q + AB')( C' D + Q') = QC' D + Q' AB' ( Q + AB')( C' D + Q') = QC' D + QQ' + AB' C' D + AB' Q' Redundant terms multiplying out: () distributive laws (2) theorem(3-3) ( A + B + C')( A + B + D)( A + B + E)( A + D' + E)( A' + C) = ( A + B + C' D)( A + B + E)[ AC + A'( D' + E)] = ( A + B + C' DE)( AC + A' D' + A' E) = AC + ABC + A' BD' + A' BE + A' C' DE (3-4) What theorem was applied to eliminate ABC? 3. Multiplying Out and Factoring Expressions 3-4

5 EXAMPLE: CONVERT to SOP FORM (A+B+C ) (A+B+D) (A+B+E) (A+D +E)(A +C) Let X=A+B, Y=C, Z=D (X+Y)(X+Z) = X+YZ =(A+B+C D) (A+B+E) (A+D +E) (A +C) Let X=A, Y=D +E, Z=C, (X+Y)(X +Z) = XZ+X Y =(A+B+C D)(A+B+E) (AC+A (D +E)) =(A+B+C D)(A+B+E) (AC+A D +A E)) by distr. law Let X=A+B, Y=C D, Z=E, (X+Y)(X+Z) = X+YZ =(A+B+C DE) (AC+A D +A E)) Mult. out by distr. law and eliminate terms such as AA D +ABC+A BD +A BE +C DEAC+C DEA D+C DEA E = AC + ABC + A BD + A BE + A C DE Let X=AC, Y=B X+XY = X = AC + A BD + A BE + A C DE =AAC+AA D +AA E 3. Multiplying Out and Factoring Expressions 3-5

6 EXAMPLE: CONVERT to POS FORM AC + A BD + A BE + A C DE (A is common to three terms) = AC + A (BD + BE + C DE) by distr. law Let X=A, X =A, Y=BD + BE + C DE, Z=C XZ+X Y=(X+Y)(X +Z) =(A+BD +BE+C DE)(A +C)=(A+C DE+BD +BE)(A +C) -re-arranging = A+C DE +B(D +E ) (A +C) by distr. law Let X= A+C DE, Y=B, Z=D +E X+YZ=(X+Y)(X+Z) (8D) = (A+B+C DE)(A+C DE +D +E)(A +C) But E+C DE = E (using X+XY=X) so C DE is redundant = (A+B+C DE) (A+D +E)(A +C) Let X=A+B, Y=C, Z=DE X+YZ=(X+Y)(X+Z) =(A+B+C )(A+B+DE) (A+D +E)(A +C) Let X=A+B, Y=D, Z=E X+YZ=(X+Y)(X+Z) =(A+B+C ) (A+B+D)(A+B+E) (A+D +E)(A +C) 3. Multiplying Out and Factoring Expressions 3-6

7 XOR, XNOR XOR: X or Y but not both ("inequality", "difference") XNOR: X and Y are the same ("equality", "coincidence") Description Z = if X has a different value than Y Description Z = if X has the same value as Y Gates X Y Z Gates X Y Z T ruth T able T ruth T able X Y Z X Y Z (a) XOR (b) XNOR X Y = X Y' + X' Y X Y = X Y + X' Y' 3.2 Exclusive-OR and Equivalence Operations 3-7

8 Theorems for Exclusive-OR Theorems for Exclusive-OR X = X X = X ' X X X X = X '= Y = Y ( X Y ) Z = X ( Y Z) = X Y Z X ( Y Z) = XY XZ X (commutative law) (associative law) (distributive law) ( X Y )' = X Y' = X' Y = XY + X'Y' 3.2 Exclusive-OR and Equivalence Operations 3-8

9 XOR and Equivalence Operations Equivalence operation (Exclusive-NOR) ( ) = ( ) = ( ) = ( ) = Truth Table XY X Y Symbol 3.2 Exclusive-OR and Equivalence Operations 3-9

10 Waveform View 3.2 Exclusive-OR and Equivalence Operations 3 -

11 Consensus Theorem Consensus theorem states: XY + X Z + YZ = XY + X Z The YZ term is called the consensus term and is redundant. The consensus term is formed from a PAIR OF TERMS in which a variable (X) and its complement (X ) are present; the consensus term is formed by multiplying the two terms and leaving out the selected variable and its complement. The consensus of XY, X Z is YZ. 3.3 The Consensus Theorem 3 -

12 Prove The Consensus Theorem Consensus Theorem Proof: XY + X Z + YZ = XY + X Z + (X + X )YZ = XY + X Z + XYZ + X YZ = (XY + XYZ) + (X Z + X YZ) = XY ( + Z) + X Z ( + Y) = XY + X Z You could also use a truth table to prove this. 3.3 The Consensus Theorem 3-2

13 Dual Of Consensus Theorem (X + Y) (X + Z) (Y + Z) = (X + Y) (X + Z) The consensus of (X + Y)(X + Z) is (Y + Z). How do you use the consensus theorem? Simply be suspicious anytime you have two terms that have a variable and its complement. Form the consensus term and see if it is present; if consensus term is present, just get rid of it. 3.3 The Consensus Theorem 3-3

14 Consensus Theorem Example: eliminate BCD BCD A ' C' D + A' BD + BCD + ABC + ACD' Example: eliminate A BD, A BD, ABC ABC A ' C' D + A' BD + BCD + ABC + ACD' Example: Reducing an an expression by by adding adding a term term and and eliminate. F = ABCD + B' CDE + A' B' + BCE' F = ABCD + B' CDE + A' B' + BCE' + ACDE Final Final expression F = A' B' + BCE' + ACDE Consensus Term added 3.3 The Consensus Theorem 3-4

15 Logic Expressions Minimization Goal is to find an equivalent of an original logic expression that: a) has fewer variables per term b) has fewer terms c) needs less logic to implement There are three main manual methods Algebraic minimization Karnaugh Map minimization Quine-McCluskey (tabular) minimization 3.4 Algebraic Simplification of Switching Expressions 3-5

16 Rationale for Simplification Logic Minimization: reduce complexity of the gate level implementation reduce number of literals (gate inputs) reduce number of gates reduce number of levels of gates fewer inputs implies faster gates in some technologies fan-ins (number of gate inputs) are limited in some technologies fewer levels of gates implies reduced signal propagation delays minimum delay configuration typically requires more gates number of gates (or gate packages) influences manufacturing costs Traditional methods: methods: reduce delay delay at at expense of of adding adding gates gates New New methods: methods: trade trade off off between increased circuit circuit delay delay and and reduced gate gate count count 3.4 Algebraic Simplification of Switching Expressions 3-6

17 Algebraic Minimization Process is to apply the switching algebra postulates, laws, and theorems to transform the original expression Hard to recognize when a particular law can be applied Difficult to know if resulting expression is truly minimal Very easy to make a mistake Incorrect complementation Dropped variables 3.4 Algebraic Simplification of Switching Expressions 3-7

18 Adjacency XY + XY = X (X+Y) (X+Y )=X Look for two terms that are identical except for compl. in one variable. -Application removes one term and one variable from the remaining term. Combining Terms by Adjacency: Example: abc d + abcd = abd Example: (duplicating abc first then eliminating by adjacency) ab c + abc +a bc = ab c + abc + abc + a bc = ac + bc 3.4 Algebraic Simplification of Switching Expressions 3-8

19 Absorption X + XY = X X (X+Y) = X Look for two terms that are the same except for an extra variable Eliminating Terms by Absorption: Example: a b + a bc = a b 3.4 Algebraic Simplification of Switching Expressions 3-9

20 Simplification X + X Y = X + Y X (X +Y) = XY Eliminating Literals by Simplification: Example: A B +A B C D + ABCD = A (B+B C D )+ABCD (factored) = A (B+C D ) + ABCD (simplification) = A B+A C D + ABCD (distributed A ) = B(A + ACD ) + A C D (factored out B) = B(A + CD ) + A C D (simplification) 3.4 Algebraic Simplification of Switching Expressions 3-2

21 Proving Validity of an Equation. Construct Truth Table and evaluate both sides of eqn. 2. Make L.S. equal R.S. or R.S. equal L.S. by algebraic manipulation. 3. Reduce both L.S. and R.S. independently to the same expression. To show an equation is NOT Valid Give one combination of values (, ) of the variables for which L.S.!= R.S. (This is equivalent to finding one line in a truth table for which L.S. and R.S. have different values.) 3.5 Proving Validity of an Equation 3-2

22 Valid Operations When attempting to prove that an equation. is valid: It is permissible to perform the same operation on on both sides of the eqn. as long as the operation is reversible (has an inverse) within Boolean Algebra.. Complement both sides -- Allowed Mult. both sides by same expression -- Not Allowed Add same term to both sides --- Not Allowed 3.5 Proving Validity of an Equation 3-22

23 Proving Validity of an Equation Prove : A ' BD' + BCD + ABC' + AB' D = BC' D' + AD + A' BC = A ' BD' + BCD + ABC' + AB' D + BC' D' + A' BC + ABD (add consensus of A BD and ABC ) (add consensus of A BD and BCD) (add consensus of BCD and ABC ) = AD + A' BD' + BCD + ABC' + BC' D' + A' BC = BC' D' + AD + A' BC (eliminate consensus of BC D and AD) (eliminate consensus of AD and A BC) (eliminate consensus of BC D and A BC) 3.5 Proving Validity of an Equation 3-23

24 Proving Validity of an Equation Some of Boolean Algebra are not true for ordinary algebra Example: If x + y = x + z, then y = z True in ordinary algebra + = + but Not True in Boolean algebra Example: If xy = xz, then y = z True in ordinary algebra Not True in Boolean algebra Example: If y = z, then x + y = x + z True in ordinary algebra If y = z, then xy = xz True in Boolean algebra 3.5 Proving Validity of an Equation 3-24

25 Positive and Negative Logic General Concept Positive Logic High Voltage => Logic Low Voltage => Logic Negative Logic High Voltage => Logic Low Voltage => Logic Positive and Negative Logic 3-25

26 Positive and Negative Logic (cont d) Implication Positive Logic High Voltage => Logic Low Voltage => Logic Voltage A B F Low Low Low Low High Low High Low Low High High High Logic A B F - Equivalent gate: AND Positive and Negative Logic 3-26

27 Positive and Negative Logic (cont d 2) Implication Negative Logic High Voltage => Logic Low Voltage => Logic Voltage A B F Low Low Low Low High Low High Low Low High High High Logic A B F - Equivalent gate: OR Positive and Negative Logic 3-27

28 Positive and Negative Logic (cont d 3) Implication Positive Logic High Voltage => Logic Low Voltage => Logic Voltage A B F Low Low Low Low High High High Low High High High High Logic A B F - Equivalent gate: OR Positive and Negative Logic 3-28

29 Positive and Negative Logic (cont d 4) Implication Negative Logic High Voltage => Logic Low Voltage => Logic Voltage A B F Low Low Low Low High High High Low High High High High Logic A B F - Equivalent gate: AND Positive and Negative Logic 3-29

30 Positive vs. Negative Logic Normal Convention: Positive Logic/Active High Low Voltage = ; High Voltage = Alternative Convention sometimes used: Negative Logic/Active Low F V oltage T ruth T able Positive Logic Negative Logic A low low high high B low high low high F low low low high A B F A B F Behavior in terms of Electrical Levels Two Alternative Interpretations Positive Logic AND Negative Logic OR Dual Operations` Positive and Negative Logic 3-3

31 Positive vs. Negative Logic Conversion from Positive to Negative Logic F V oltage T ruth T able Positive Logic Negative Logic A low low high high B low high low high F high low low low A B F A B F Positive Logic NOR: A + B = A B Negative Logic NAND: A B = A + B Dual operations: AND becomes OR, OR becomes AND Complements remain unchanged Positive and Negative Logic 3-3

32 Positive vs. Negative Logic Practical Example Change Request (active high) Use OR gate if input polarities are neg. logic Change Request (active low) Use AND gate if active high Active High Change Lights (active high) Active Low Change Lights (active low) T imer Expired (active high) (a) T imer Expired (active low) (b) Change Request (active low) Change Request (active low) Mismatch between input and output logic polarities T imer Expired (active low) Bubble Mismatch Change Lights (active low) T imer Expired (active low) Bubble Match Change Lights (active low) (c) (d) Use NAND w/ inverted inputs if negative logic Positive and Negative Logic 3-32

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