LECTURE 3 CMOS PHASE LOCKED LOOPS

Transcription

1 Lecture 03 (8/9/18) Page 3-1 LECTURE 3 CMOS PHASE LOCKED LOOPS Topics The acquisition process unlocked state Noise in linear PLLs Organization: Systems Perspective Types of PLLs and PLL Measurements PLL Applications and Examples Circuits Perspective PLL Components Technology Perspective CMOS Technology

2 Lecture 03 (8/9/18) Page 3-2 THE ACQUISTION PROCESS LPLL IN THE UNLOCKED STATE Unlocked Operation If the PLL is initially unlocked, the phase error, e, can take on arbitrarily large values and as a result, the linear model is no longer valid. The mathematics behind the unlocked state are beyond the scope of this presentation. In the section we will attempt to answer the following questions from an intuitive viewpoint: 1.) Under what conditions will the LPLL become locked? 2.) How much time does the lock-in process require? 3.) Under what conditions will the LPLL lose lock?

3 Lecture 03 (8/9/18) Page 3-3 Some Definitions of Key Performance Parameters 1.) The hold range ( H ) is the frequency range over which an LPLL can statically maintain phase tracking. A PLL is conditionally stable only within this range. Hold-In Range (Static Limits of Stability) w w o -Dw H w o w o +Dw H ) The pull-in range ( P ) is the range within which an LPLL will always become locked, but the process can be rather slow. Pull-in Range w w o -Dw P w o w o +Dw P ) The pull-out range ( PO ) is the dynamic limit for stable operation of a PLL. If tracking is lost within this range, an LPLL normally will lock again, but this process can be slow. (Dynamic Limits of Stability) w w o -Dw PO w o w o +Dw PO ) The lock range ( L ) is the frequency range within which a PLL locks within one single-beat note between reference frequency and output frequency. Normally, the operating frequency range of an LPLL is restricted to the lock range. Lock Range w w o -Dw L w o w o +Dw L

4 Lecture 03 (8/9/18) Page 3-4 Illustration of Static Ranges Assume the frequency of the VCO is varied very slowly from a value below o - H to a frequency above o + H. w VCO Hold-in Range Pull-in Range w o -Dw H w o -Dw P w o +Dw P w o +Dw H w in The following pages will attempt to relate the key parameters of hold range, pull-in range, pull-out range, and lock range to the time constants, 1 and 2 and the gain factors K d, K o, and K a.

5 Lecture 03 (8/9/18) Page 3-5 Hold Range ( H ) The magnitude of the hold range is calculated by finding the frequency offset of the input that causes a phase error of ± /2. Let, 1 = o ± H 1 (t) = H t 1 (s) = e (s) = 1 (s) H e (s) = s s 2 s + K o K d F(s) lim t e(t) = lim s s 0 e (s) = K o K d F(0) (valid for small values of e) For large variations, we write lim H e(t) = t K o K d F(0) H = ±K o K d F(0) when e = ± /2 For the various filters- 1.) Passive lag filter: H = ±K o K d 2.) Active lag filter: H = ±K o K d K a 3.) Active PI filter: H = ± (If H = ± the actual hold range may be limited by the frequency range of the VCO) s 2

6 Lecture 03 (8/9/18) Page 3-6 Lock Range ( L ) Assume the loop is unlocked and the reference frequency is 1 = o +. Therefore, v 1 (t) = V 10 sin( o t + t) The VCO output is assumed to be v 2 (t) = V 20 sgn( o t) v d (t) = K d sin( t) + higher frequency terms Assuming the higher frequency terms are filtered out, the filter output is v f (t) K d F(j ) sin( t) This signal causes a frequency modulation of the VCO output frequency as shown. Frequency w 1 w o Dw K o K d F(jDw) w 2 (t) Note: No locking occurs in the above illustration because > K o K d F(j ). t

7 Lecture 03 (8/9/18) Page 3-7 Lock Range Continued Locking will take place if K o K d F(j ). Therefore, the lock range can be expressed as, L = ± K o K d F(j ) and is illustrated as, Frequency w 1 w o w 2 (t) w 2 = w 1 Dw K o K d F(jDw) Locks within one cycle or beat note t

8 Lecture 03 (8/9/18) Page 3-8 Lock Range - Continued If we assume that the lock range is greater than the filter frequencies, 1/ 1 and 1/ 2, the lock range for the various filters can be expressed as, 2 1.) Passive lag filter: L = ± K o K d F(j ) ± K o K d ± K 1 + o K 2 d ) Active lag filter: L = ± K a F(j ) ± K a ) Active PI filter: L = ± F(j ) ± 2 1 Previously, we found expressions for n and for each type of filter. Using these expressions and assuming that the loop gain is large, we find for all three filters that L ±2 n The lock-in time or settling time can be approximated as one cycle of oscillation, T L 1 f n = 2 n

9 Lecture 03 (8/9/18) Page 3-9 Pull-In Range ( P ) Again assume the loop is unlocked and the reference frequency is 1 = o + and the VCO initially operates at the center frequency of o. Let us re-examine the previous considerations: Frequency w 1 Dw min Dw max Pull-in Effect w o w 2 w 2 (t) Since min is less than max, the frequency of the positive going sinusoid is less than the frequency of the negative going sinusoid. As a consequence, the average value of the VCO output, 2, pulls toward 1. t

10 Lecture 03 (8/9/18) Page 3-10 The Pull-In Process For an unlocked PLL with the frequency offset,, less than the pull-in range, P, the VCO output frequency, 2 will approach the reference frequency, 1, over a time interval called the pull-in time, T P. Illustration: Frequency w 1 Dw w 2 w o w 2 (t) Pull-in Time, T P t

11 Lecture 03 (8/9/18) Page 3-11 Pull-In Range ( P ) for Various Types of Filters The mathematical treatment of the pull-in process is beyond the scope of this presentation. The results are summarized below. Type of Filter Passive Lag Active Lag P (Low Loop Gains) P (High Loop Gains) Pull-In Time, T P n K o K d - n n K o K d - n K a n K o K d n K o K d = 2 2 o 16 3 n = 2 2 o K a 16 3 n Active PI Lag = 2 2 o 16 3 n R.M. Best, Phase-Locked Loops Design, Simulation, and Applications, 4 th ed., McGraw-Hill Book Co., 1999, Appendix A.

12 Lecture 03 (8/9/18) Page 3-12 Example 3 A second-order PLL having a passive lag loop filter is assumed to operate at a center frequency, f o, of 100kHz and has a natural frequency, f n, of 3 Hz which is a very narrow band system. If = 0.7 and the loop gain, K o K d = sec. -1, find the lock-in time, T L, and the pull-in time, T P, for an initial frequency offset of 30 Hz. Solution T L 1 f n = 1 3 = secs. T P = 2 2 o 16 3 = 4 4 f 2 o n f 3 = 30 2 n 32(0.7)33 = secs.

13 Lecture 03 (8/9/18) Page 3-13 Pull-Out Range ( PO ) The pull-out range is that frequency step which causes a lock-out if applied to the reference input of the PLL. An exact calculation is not possible but simulations show that, PO 1.8 n ( +1) At any rate, the pull-out range for most systems is between the pull-in range and the lockrange, L < PO < P

14 Lecture 03 (8/9/18) Page 3-14 Steady-State Error of the PLL The steady-state error is the deviation of the controlled variable from the set point after the transient response has died out. We have called this error, e ( ). s e ( ) = lim s s 0 e (s) = lim s s 0 1 (s) s + K o K d F(s) Let us consider a generalized filter given as, F(s) = P(s) Q(s)s N where P(s) and Q(s) can be any polynomials in s, and N is the number of poles at s = 0. s 2 s N Q(s) 1 (s) e ( ) = lim s 0 s s N Q(s) + K o K d P(s) Comments: Note that for the active PI filter, N = 1. For N >1, it becomes difficult to maintain stability. In most cases, P(s) is a first-order polynomial and Q(s) is a polynomial of order 0 or 1. To find the steady-state error, the input, (s) must be known. We will consider several inputs on the following slide.

15 Lecture 03 (8/9/18) Page 3-15 Steady-State Error for Various Inputs 1.) A phase step,. 1 (s) = s e ( ) = lim s 0 s 2 s N Q(s) s[s s N Q(s) + K o K d P(s)] = 0 for any value of N. 2.) A frequency step,. 1 (s) = s 2 s e ( ) = lim 2 s N Q(s) s 0 s 2 [s s N = 0 if N 1 Q(s) + K o K d P(s)] (The LPLL must have one pole at s = 0 for the steady-state error to be zero.) 3.) A frequency ramp,. 1 (s) = s 3 s 2 s N Q(s) e ( ) = lim s 0 s 3 [s s N Q(s) + K o K d P(s)] = 0 if N 2 For N = 2 and Q(s) =1, the order of the LPLL becomes 3 permitting a phase shift of nearly 270 which must be compensated for by zeros to maintain stability.

16 Lecture 03 (8/9/18) Page 3-16 Phase Noise Illustration: v 1 (t) NOISE IN LINEAR PLL SYSTEMS t q n1 (t) t v 1 (t)+q n1 (t) t Phase error

17 Lecture 03 (8/9/18) Page 3-17 PLL for Noise Analysis Assume that the input is band limited as shown below. Prefilter Input Signal Attenuation (db) B i f o f Phase Detector Filter Output VCO B i = Bandwidth of the prefilter (or system) Some terminology: Power spectral density is the measure of power in a given frequency range (Watts/Hz) or (V 2 /Hz). It is found by dividing the rms power by the bandwidth. Consider all noise signals as white noise which means the power spectrum is flat. P s = input signal rms power (V 1 (rms) 2 /R in ) P n = rms power of the input noise

18 Spectral Power Density Lecture 03 (8/9/18) Page 3-18 Power Spectra of a PLL Illustration of how input noise becomes phase noise in the frequency spectrum: Area = P s Power spectra of the reference signal, v 1 (t), and the superimposed noise signal, v n (t). q n1 (jw)2 Area = P n = W i B i Area = v n1 2 f o B i W i Frequency Spectrum of the phase noise at the input of the PLL. H(jw) B i /2 F Frequency Frequency response of the phasetransfer function, H(j ). Spectrum of the phase noise at the output of the PLL. q n2 (jw)2 B L Function of z Area = v n2 2 Frequency B L Frequency

19 Lecture 03 (8/9/18) Page 3-19 Noise Relationships for a PLL Spectral density of the input noise signal: W i = P n B i (W/Hz) Input rms phase noise jitter (or the square of the rms phase noise): n1 (t) 2 n1 = P n 2P s Signal-to-Noise Ratio (SNR): SNR at the input = (SNR) i P s P n Input phase jitter (noise) spectrum: 2 n1 2 (j ) = = B i /2 (radians2 /Hz) n1 Output phase jitter (noise) spectrum: 2 n2 (j ) = H(j ) 2 2 n1 (j ) = H(j ) 2 (Comes from the assumption of white noise) 2 n1 = P n 2P = s 1 2(SNR) i (radians 2 )

20 Lecture 03 (8/9/18) Page 3-20 RMS Value of the Output Phase Noise The output phase noise is found by integrating n2 (j ) over the bandwidth of the PLL. 2 n2 = 0 2 n2 (j2 f) df where 2 n2 is the area under the output phase noise plot in a previous slide. The integral 2 n2 = H(j ) 2 df = H(j ) 2 d H(j2 f) 2 df = B L is called the noise bandwidth. The solution of this integral is, B L = n n2 db L d 2 n1 2 = B L = B i /2 B L = P n 2B L 2P s = n = 0 = 0.5 B L(min) = 0.5 n B i = P n P s BL B i = B L (SNR) i B i

21 Lecture 03 (8/9/18) Page 3-21 RMS Value of the Output Phase Noise Continued We noted previously that, 2 n1 = 1 2(SNR) i = P n 2P s (SNR) i = P s P n A dual relationship holds for the output, 2 n2 = 1 2(SNR) L = P n P s BL B i (SNR) L = P s P n where (SNR) L is the signal-to-noise ratio at the output. (SNR) L = (SNR) B i i 2B L This equation suggests that the PLL improves the SNR of the input signal by a factor of B i /2B L. Thus, the narrower the noise PLL bandwidth, B L, the greater the improvement. Some experimental observations: For (SNR) L = 1, a lock-in process will not occur because the output phase noise is excessive (0.707 radians or 40.4 ). At an (SNR) L = 2, lock-in is eventually possible (0.5 radians or 28.6 ). For (SNR) L = 4, stable operation is generally possible. Note: (SNR) L = 4, 2 n2 becomes radians 2. 2 n2 = radians 20 and the limit of dynamic stability (180 ) is rarely exceeded. B i 2B L

22 Lecture 03 (8/9/18) Page 3-22 Summary of Noise Analysis of the LPLL Stable operation of the LPLL is possible if (SNR) L 4 (SNR) L is calculated from (SNR) L = P s P n B i 2B L where P s = signal power at the reference input P n = noise power at the reference point B i = bandwidth of the system at the input B L = noise bandwidth of the PLL The noise bandwidth, B L, is a function of n and. For = 0.7, B L = 0.53 n The average time interval between two unlocking events gets longer as the (SNR) L increases.

23 Lecture 03 (8/9/18) Page 3-23 Pull-In Techniques for Noisy Signals 1.) The sweep technique. When the noise bandwidth is made small, the SNR of the loop is sufficiently large to provide stable operation. However, the lock range can become smaller than the frequency interval within which the input signal is expected to be. The following circuit solves this problem by providing a direct VCO sweep. (1.) LPLL not locked. (2.) RUN mode starts a positive sweep. (3.) When the VCO frequency approaches the input frequency the loop locks. (4.) The In-Lock detector switches the sweep switch to the HOLD position.

24 Lecture 03 (8/9/18) Page 3-24 Pull-In Techniques for Noisy Signals 2.) Switched filter technique. "In-Lock" Detector v 1 (t) Phase Detector v 2 (t) R small (not locked) R large (locked) Switched Loop Filter v f (t) VCO In the unlocked state, the filter bandwidth is large so that lock range exceeds the frequency range within which the input is expected. In the locked state, the filter bandwidth is reduced in order to reduce the noise.

25 Lecture 03 (8/9/18) Page 3-25 SUMMARY Acquisition process the PLL in the unlocked state Influence of noise on the linear PLL Pull-in techniques for noisy signals