Maximum C/ C over temp. range without voltage Temperature coefficient Ageing Operating temperature Rated voltage (U RC )

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1 Taping TEF Serie : dimensions Radial Leaded Conformal Coated Capacitors DIMENSIONS in inches (mm) L T >.7 (> ) W Ø FEATURES ELECTRICAL SPECIFICATIONS X Multilayer chips ceramic capacitors NPO dielectric Capacitance range: nf to 68nF Voltage range : V DC to V DC PHYSICAL CHARACTERISTICS CONSTRUCTION Radial leaded conformal coating for throught hole circuits. MARKING Series, Capacitance value, tolerance, rated voltage, date code. DIELECTRIC Maximum C/ C over temp. range without voltage Temperature coefficient Ageing Operating temperature Rated voltage (U RC ) Dielectric withstanding voltage Capacitance Dissipation factor NPO NA (±3)ppm/ C None C to + C 63 V DC to V DC. U RC for U RC < V DC U RC for U RC = V DC at khz.% at khz Insulation resistance at C under U RC, MΩ.µF STANDARD RATINGS Size Size code Dimensions inches (mm) Rated voltage (U RC ) L max. W max. T min. X Ø ± %. (.6).6 (.7).97 (). ±. (.8 ±.). (.6). (.7).6 (.).97 (). ±. (.6 ±.). (.6).689 (7.).6 (6.).97 (). ±. (.7 ±.).3 (.8).76 (9.3).9 ().97 ().6 ±. (. ±.).3 (.8).98 ().79 (9).97 ().83 ±. (. ±.).3 (.8) Min. Capacitance value nf 8nF 33nF 68nF 68nF 63 V nf 8nF 33nF 68nF 68nF V 8nF nf nf 7nF 7nF V 6nF 8nF 8nF 33nF 33nF V 8nF 7nF 6nF nf nf Available capacitance values: NPO dielectric: E6, E, E (see page ). Specific values upon request.the above table defines the standard products, other components may be built upon request. HOW TO ORDER T EF 6 W F 68nF ±% V - Series Dielectric code Exxelia size code RoHS compliant Quality level Capacitance Tolerance Rated voltage Reliability level T = Radial leads, conformal coating EF = NPO = No RoHS W = RoHS compliant - = standard quality level F = Hi-Rel quality: screening in accordance with Exxelia specification Capacitance value in clear NPO: ±% ±% ±% ±% ±% 63 V V V V For F parts only. Acc. to Exxelia spec. - T T6 See page 8 info@exxelia.com Page revised 9/7

2 Taping General : dimensions Information These capacitors have been developed in response to demand from switched mode power supply (S.M.P.S.) and DC-DC converters manufacturers. They are particularly suitable for filtering, smoothing and decoupling purpose in Hi-Rel equipments. The capacitors utilize advanced ceramic technology to achieve Hi- Rel long operating life and small size. They are designed for hybrid assemblies and low profile printed circuit applications. Customized assemblies may be achieved with standard bare chip sizes mentioned in the following chapters. TYPICAL CURVES: R Series, SC/SV Series X DIELECTRIC: TYPICAL VOLTAGE COEFFICIENT AT C (FOR ALL SIZES) C/C (%) T DIELECTRIC: TYPICAL VOLTAGE COEFFICIENT AT C (for all sizes) C/C (%) 3 3 U R = V U R = V 6 6 U R = V Applied voltage (V DC ) 7 U U R = V R = V U R = V Applied voltage (V DC ) X DIELECTRIC: TYPICAL TEMPERATURE COEFFICIENT WITHOUT VOLTAGE (for all sizes) T DIELECTRIC: TYPICAL TEMPERATURE COEFFICIENT WITHOUT VOLTAGE (for all sizes) C/C (%) C/C (%) U R = V U R = V U R = V Temperature ( C) U R = V U R = V U R = V Temperature ( C) 68 info@exxelia.com Page revised 9/7

3 General General characteristics Information TYPICAL CURVES: R Series, SC/SV Series TYPICAL ESR VS FREQUENCY ESR (ohm).µf.33µf µf. 3.3µF µf.... Frequency (MHz) The ESR (Equivalent Serial Resistance) curves are given here for SMD (chips all case sizes) capacitors. Regarding the curves for the leaded capacitors, they are rather the same. ndeed, due to the resistivity of the raw material used and the wire diameters, the resistance of the wires is much lower than the ESR of the chips. So, in a first approach, their influence can be considered as negligible. TYPICAL ESR VS FREQUENCY F (MHz) SMD HIGH CAPACITANCE Radial leaded caps.. Capacitance (µf) TYPICAL MAXIMUM ADMISSIBLE CURRENT VS FREQUENCY I (A RMS ) µf 3.3µF µf.33µf.µf.. Frequency (MHz) These typical curves are an example of admissible currents for one family of chip capacitors: R37X chip series. For other curves and products or for further information, please contact us. Note: for the calculations, we have considered that the terminations are directly connected to an infinite heat sink. In other words, the thermal resistance of the circuit itself which depends of its type and design has not been taken into account. Moreover, the ambient temperature taken is C info@exxelia.com Page revised 9/7

4 Taping General : dimensions Information TYPICAL CURVES: CNC3X Series TYPICAL TEMPERATURE COEFFICIENT MAXIMUM CURRENT VS FREQUENCY C/C (%) CNC 3, µf CNC 3,6 µf CNC 3 µf CNC 3 µf CNC µf CNC 3 39 µf CNC 3 68 µf Temperature ( C) 3 U RC = 6V DC (Typical curves for θ = C). TYPICAL VOLTAGE COEFFICIENT C/C (%) CNC 3, µf CNC 3 3,3 µf CNC 3,7 µf CNC 3 µf CNC 33 µf CNC 3 µf CNC 3 33 µf 3 U RC = V U RC = V Applied voltage (V DC ) 3 U RC = V DC (Typical curves for θ = C). 7 info@exxelia.com Page revised 9/7

5 General General characteristics Information TYPICAL CURVES: CECX Series NPO: CURRENT VS FREQUENCY I rms (A) I rms (A) I rms (A), CEC 3 68 nf nf 7 nf CEC 8 nf 6 nf, µf CEC 7 7 nf, µf 3,3 µf 3, CEC nf 33 nf 68 nf CEC 6 39 nf, µf,7 µf CEC 8 µf 3,3 µf 6,8 µf 3, CEC 3 7 nf nf 33 nf CEC nf 7 nf F CEC 7 33 nf µf, µf 3 U RC = 63 V DC (Typical curve for θ = C). U RC = 63 V DC (Typical curve for θ = C). U RC = V DC (Typical curve for θ = C). I rms (A) I rms (A) I rms (A) HIGH CAPACITANCE CEC 68 nf nf 7 nf CEC 6 7 nf 8 nf,8 µf CEC 8,68 µf, µf,7 µf 3 CEC 3 33 nf nf nf CEC nf 33 nf 68 nf CEC 7 nf 8 nf, µf 3 CEC 7 nf 8 nf 33 nf CEC 6 8 nf 68 nf, µf CEC 8 7 nf, µf 3,3 µf 3 U RC = V DC (Typical curve for θ = C). U RC = V DC (Typical curve for θ = C). U RC = V DC (Typical curve for θ = C). I rms (A) I rms (A), CEC 3 nf 33 nf 68 nf CEC 33 nf nf nf CEC 7 nf 7 nf 7 nf 3, CEC 8 nf 33 nf nf CEC 6 68 nf nf 39 nf CEC 8 8 nf 6 nf, µf 3 U RC = V DC (Typical curve for θ = C). U RC = V DC (Typical curve for θ = C). 7 info@exxelia.com Page revised 9/7

6 ,7 µ F µf 7 µf µf TCN 83, 7 µ F µf 7 µf µf, 3, 3 6 TYPICAL CURVES:vsTCN8X Series 6 ESR (m 6, 3, 3 TCN 83, 7 µ F µf 7 µf µf (A) TCN 86,7 µf µf 7 µf µf 6 ESR (m ) , CNC 87 P CNC 87 N, µf µf 33 µf 8 µf 3 3, 7 TCN 86 V - µf V - 7 µf V - µf V -,7 µf TCN 863 V - µf V - 7 µf V - µf V -,7 µf TCN87: CURRENT (IRMS) VS FREQUENCY (N) TYPICAL CURVES FOR V C (A) 6 3 V - 8 µ F V - 33 µf V - µf (A)V -, µ V - 8 µ F V - 33 µf V - µf V -, µ 3 TCN 86 V - µf V - 7 µf V - µf V -,7 µf, TCN 86 V - µf V - 7 µf V - µf V - 3,7 µf 3 (khz) N N(kHz) 3 3 (A) V - 8 µ F V - 33 µf V - µf V -, µ TCN 86 V - µf V - 7 µf V - µf V -,7 µf ) 6 6 VN-(kHz) µf CNC 87 P CNC 87 N, µf µf 33 87µFP CNC CNC 8 87µFN, µf µf 33 µf 8 µf, CNC 87 P CNC 87 N, µf µf 33 µf CNC 8 87µFP CNC 87 N, µf µf 33 µf 8 µf 3 TCN 83 ESR (m (A) ) 7 ESR (m ), EXXELIA 7 V - 7 µf V - µf V -,7 µf (A) ) ESR (m 3 3 7,, 6 3 TCN 83 V - µf V - 7 µf V - µf V -,7 µf, ESR (m ) (A) 6 TCN 83 V - µf V - 7 µf V - µf V -,7 µf TCN 86,7 µf µf 7 µf µf TCN86: CURRENT 7 (IRMS) VS FREQUENCY (N) TYPICAL CURVES FOR V C ) 3, TCN83: CURRENT (IRMS) VS FREQUENCY (N) TYPICAL CURVES FOR V C ESR (m 3 8 TCN 83,7 µ F µf 7 µf µf 8 ESR(A)(m EXXELIA ) (A) EXXELIA RESISTANCE (ESR) VS FREQUENCY (N),7 µf µf 7 µf µf TCN 86,7 µf µf 7 µf µf 8X SERIES TCN87: TYPICAL EQUIVALENT SERIAL RESISTANCE (ESR) VS FREQUENCY TCN 86 (N) 8 (A) ESR (m (A)) TCN86: TYPICAL EQUIVALENT SERIAL ESR (m ) 3 7 ESR (m ) vs TCN83: TYPICAL EQUIVALENT SERIAL RESISTANCE (ESR) VS FREQUENCY (N) frequency frequency, EXXELIA Taping : dimensions General Information TCN 83 V - µf V - 7 µf V - µf V -,7 µf TCN 83 V - µf V - 7 µf V - µf V -,7 µf 8 (A) 6 V - 8 µ F V - 33 µf V - µf V -, µ info@exxelia.com 3 Page revised 9/7 EXXELIA 6 8X 8X SERIES SERIES

Taping Ceramic : dimensions Capacitors Technology MLCC STRUCTURE Tin Tin / Lead Gold (Solderable layer) Terminations EQUIVALENT CIRCUIT Ceramic Electrodes Margins Silver or Silver / Palladium

7 Taping Ceramic : dimensions Capacitors Technology MLCC STRUCTURE Tin Tin / Lead Gold (Solderable layer) Terminations EQUIVALENT CIRCUIT Ceramic Electrodes Margins Silver or Silver / Palladium (electrodes contact layer) Polymer (crack protection layer) Nickel or Copper barrier (leaching protection layer) Capacitor is a complex component combining resistive, inductive and capacitive phenomena. A simplified schematic for the equivalent circuit is: IR Ls Rs C DIELECTRIC CHARACTERISTICS Insulation Resistance (IR) is the resistance measured under DC voltage across the terminals of the capacitor and consists principally of the parallel resistance shown in the equivalent circuit. As capacitance values and hence the area of dielectric increases, the IR decreases and hence the product (C x IR) is often specified in Ω.F or MΩ.µF. The Equivalent Series Resistance (ESR) is the sum of the resistive terms which generate heating when capacitor is used under AC voltage at a given frequency (f). Dissipation factor (DF) is the ration of the apparent power input will turn to heat in the capacitor: DF = π f C ESR When a capacitor works under AC voltage, heat power loss (P), expressed in Watt, is equal to: P = π f C Vrms DF The series inductance (Ls) is due to the currents running through the electrodes. It can distort the operation of the capacitor at high frequency where the impedance (Z) is given as: Z = Rs + j (Ls.q - (C.q)) with q = πf When frequency rises, the capacitive component of capacitors is gradually canceled up to the resonance frequency, where : Z = Rs and LsC.q = Above this frequency the capacitor behaves like an inductor. Dielectric material P NPO N (Cxx) BX C X7R Porcelain Magnesium titanate or Neodynium baryum titanate Barium zirconate titanate Baryum titanate (BaTiO 3 ) Dielectric constant 8 8,, Electrode technology PME (Precious Metal Electrodes): Ag/Pd Capacitance variation between C and +/ C without DC voltage Capacitance variation between C and +/ C with DC rated voltage (±3)ppm/ C (±3)ppm/ C (,±) ppm/ C ±% ±% ±% -% % % % 3% Piezo-electric effect None None Yes Dielectric absorption None Few % Few % Thermal shock sensitive Not applicable 8 info@exxelia.com Page revised 9/7

MANUFACTURING STEPS Ceramic General Capacitors characteristics Technology GENERAL INFORMATION SLIP CASTING ELECTRODE SCREEN PRINTING STACKING A slurry, a mix of ceramic powder, binder and solvents,

The electrode ink, made from a metal powder mixed with solvents, is printed onto the ceramic sheets using a screen printing process.

8 MANUFACTURING STEPS Ceramic General Capacitors characteristics Technology GENERAL INFORMATION SLIP CASTING ELECTRODE SCREEN PRINTING STACKING A slurry, a mix of ceramic powder, binder and solvents, is poured onto conveyor belt inside a drying oven, resulting in a dry ceramic sheet. The electrode ink, made from a metal powder mixed with solvents, is printed onto the ceramic sheets using a screen printing process. The sheets with electrode printed are stacked to create a multilayer structure. TERMINATIONS SINTERING PRESSING Each terminal of the capacitor is dipped in the termination ink, mix of metal powder, solvents and glass frit and the parts are fired in an oven. The parts are sintered in an oven with a precise temperature profile which is very important to the characteristics of the capacitors. Pressure is applied to the stack to fuse all the separate layers, this created a monolithic structure. TERMINATIONS PLATING FINAL TESTING PACKAGING Stacking + leads soldering + encapsulation (see pages -) 9 info@exxelia.com Page revised 9/7

9 Taping User Guide : dimensions SMD TERMINATIONS NON RoHS COMPLIANT Code RoHS COMPLIANT Code Magnetic Epoxy bonding Iron soldering Recommended mounting process Wave soldering Vapor phase soldering Infrared soldering Wire bonding Ag Q Ag QW / P No 8 Ag/Pd/Pt - Ag/Pd/Pt W / A No Ag + Ni + dipped Sn/Pb 6/ Ag/Pd/Pt + dipped Sn/Pb 6/ Ag + Ni + electrolytic Sn/Pb 9/ Ag + Ni + electrolytic Sn/Pb 6/ T** - - No H C - - Ag + Ni + dipped Sn/Pb 6/ Ag/Pd/Pt + dipped Sn Ag + Ni + electrolytic Sn Storage (months)* HW No CW / S Yes 8 D - - Yes 8 E Ag + Cu + electrolytic Sn Ag + Ni + electrolytic Sn C*** No 8 EW Yes Ag + Ni + Au G Ag + Ni + Au GW Yes 36 Ag + Polymer + Ni + Sn/Pb 9/ Ag + Polymer + Ni + Sn/Pb 6/ Ag + Polymer + Ni + Au YC Ag + Polymer + Ni + Sn YCW Yes 8 YD - - Yes 8 YG Ag + Polymer + Ni + Au YGW Yes 36 Nickel (Ni) or Copper (Cu) barriers amplify thermal shock and are not recommended for chip sizes larger than 33. * Storage must be in a dry environment at a temperature of C with a relative humidity below %, or preferably in a package enclosing a desiccant. ** Maintenance only. *** Non magnetic chips series only. SMD ENVIRONMENTAL TESTS Ceramic chip capacitors for SMD are designed to meet test requirements of CECC 3 and NF C 9333 standards as specified below in compliance with NF C 7 and IEC 68 standards: Solderability: NF C 78, 6 C, bath 6/36/. Adherence: N force. Vibration fatigue test: NF C 76, g, Hz to, Hz, cycles of minutes each. Rapid temperature change: NF C 7, C to + C, cycles. Combined climatic test: IEC Damp heat: NF C 73, 93 %, H.R., C. Endurance test:, hours,. U RC, C. STORAGE OF CHIP CAPACITORS TINNED OR NON TINNED CHIP CAPACITORS Storage must be in a dry environment at a temperature of C with a relative humidity below %, or preferably in a packaging enclosing a desiccant. STORAGE IN INDUSTRIAL ENVIRONMENT: years for tin dipped chip capacitors, 8 months for tin electroplated chip capacitors, years for non tinned chip capacitors, 3 years for gold plated chip capacitors. STORAGE IN CONTROLLED NEUTRAL NITROGEN ENVIRONMENT: years for tin dipped or electroplated chip capacitors, years for non tinned chip capacitors, years for gold plated chip capacitors. Storage duration should be considered from delivery date and not from batch manufacture date. The tests carried out at final acceptance stage (solderability, susceptibility to solder heat) enable to assess the compatibility to surface mounting of the chips. info@exxelia.com Page revised 9/7

10 LEAD STYLES General characteristics User Guide GENERAL INFORMATION SURFACE MOUNTING TROUGH-HOLE MOUNTING DIL LEADS AXIAL AND RADIAL P style PL style Radial leads (Type 6) Radial leads ( leads) L style J style Axial leads (Type 7) DIL leads: N style RIBBON LEADS Micro-strip (type ) Short Micro-strip (type S) Axial (Type ) ENCAPSULATION STYLES Radial (Type 3) R style Ceramic encapsulation (selfprotected) Varnish RX style RJ style Conformal coating Molding Please contact Exxelia sales for any lead configuration not shown. info@exxelia.com Page revised 9/7

11 Taping User Guide : dimensions SOLDERING ADVICES FOR REFLOW SOLDERING l 3 l l Large chips above size are not recommended to be mounted on epoxy board due to thermal expansion coefficient mismatch between ceramic capacitor and epoxy. Where larger sizes are required, it is recommended to use components with ribbon or other adapted leads so as to absorb thermo-mechanical strains. Dimensions in inches (in mm) Reflow soldering Wave soldering I I I 3 I I I 3.3 (.).3 (.9). (.3).3 (.).7 (.). (.3) 3. (.).3 (.9). (.3). (.).7 (.). (.3).63 (.6). (.3).6 (.).63 (.6).63 (.6).6 (.) 63. (.).9 (.). (.). (.).7 (.8). (.) 8.73 (.8).6 (.6). (.6).73 (.8).77 (.9). (.6) 97.9 (.).6 (.6).3 (.9).9 (.).77 (.9).3 (.9).73 (.8).67 (.7).39 ().73 (.8).79 ().39 () 6.83 (.).67 (.7).9 (.).83 (.).79 ().9 (.).8 (3).69 (.7).9 (.).8 (3).8 (.).9 (.) 6.73 (.8).7 (.8).87 (.).73 (.8).83 (.).87 (.) (.).73 (.8). (.6).87 (.).8 (.). (.6) 8. (3.8).73 (.8). (.6). (3.8).8 (.). (.6) 8.8 (7.).73 (.8). (.6).8 (7.).8 (.). (.6).3 (3.3).79 ().6 (3.7).3 (3.3).9 (.3).6 (3.7).8 (.8).79 ().6 (3.7).8 (.8).9 (.3).6 (3.7).8 (7.).79 ().6 (3.7).8 (7.).9 (.3).6 (3.7) RECOMMENDED FOOTPRINT FOR SMD CAPACITORS Ceramic is by nature a material which is sensitive both thermally and mechanically. Stresses caused by the physical and thermal properties of the capacitors, substrates and solders are attenuated by the leads. Wave soldering is unsuitable for sizes larger than and for the higher ends of capacitance ranges due to possible thermal shock (capacitance values given upon request). Infrared and vapor phase reflow, are preferred for high reliability applications as inherent thermo-mechanical strains are lower than those inherent to wave soldering. Whatever the soldering process is, it is highly recommended to apply a thermal cycle, see hereafter our recommended soldering profile: RECOMMENDED VAPOR PHASE REFLOW PROFILE RECOMMENDED IR REFLOW PROFIL RECOMMENDED WAVE SOLDERING PROFILE Temperature ( C) > C/s C C C Preheat zone Natural cool down RoHS No RoHS 3 Time (min) Temperature ( C) C C- C C- C Natural cool down RoHS No RoHS 3 Time (min) Temperature ( C) 3 C C 8 C Natural cool down RoHS No RoHS 3 Time (min) info@exxelia.com Page revised 9/7

12 SOLDERING ADVICES FOR IRON SOLDERING Attachment with a soldering iron is discouraged due to ceramic brittleness and the process control limitations. In the event that a soldering iron must be used, the following precautions should be observed: Use a substrate with chip footprints big enough to allow putting side by side one end of the capacitor and the iron tip without any contact between this tip and the component, place the capacitor on this footprint, heat the substrate until the capacitor s temperature reaches C minimum (preheating step, maximum C per second), place the hot iron tip (a flat tip is preferred) on the footprint without touching the capacitor. Use a regulated iron with a 3 watts maximum power. The recommended temperature of the iron is 7 ± C. The temperature gap between the capacitor and the iron tip must not exceed C, General characteristics User Guide leave the tip on the footprint for a few seconds in order to increase locally the footprint s temperature, use a cored wire solder and put it down on the iron tip. In a preferred way use Sn/Pb/Ag 6/36/ alloy, wait until the solder fillet is formed on the capacitor s termination, take away iron and wire solder, wait a few minutes so that the substrate and capacitor come back down to the preheating temperature, solder the second termination using the same procedure as the first, let the soldered component cool down slowly to avoid any thermal shock. GENERAL INFORMATION PACKAGING TAPE AND REEL The films used on the reels correspond to standard IEC Films are delivered on reels in compliance with document IEC 86-3 dated 99. Minimum quantity is chips. Maximum quantities per reel are as follows: Super 8 reel - Ø 8:, chips. Super 8 reel - Ø 33:, chips. Super reel - Ø 8:, chips. Reel marking complies with CECC 3 standard: Model. Rated capacitance. Capacitance tolerance. Rated voltage. Batch number. TRAY PACKAGES E A D Chips tray depth: C D B E DIMENSIONAL CHARACTERISTICS OF CHIPS TRAY PACKAGES Sizes Nr. of chips/ package Oriented chips No 3 No Yes 63 3 Yes 8 Yes 6 No Yes 8 No Yes Yes Yes Dimensions in inches (in mm) A B C D E Ø. (Ø 3.).6 (.6).67 (.) (.8) Ø. (Ø 3.).6 (.6).67 (.) (.8).9 (.). (.).3 (.89).67 (.) (.8). (.).6 (.). (.).67 (.) (.8). (.).6 (.). (.).67 (.) (.8). (3.6). (3.6).6 (.).67 (.) (.8). (3.6). (3.6).6 (.).67 (.) (.8). (6.3). (6.3).3 (3.3).3 (8.76) (.6). (6.).6 (6.73).7 (.78).3 (8.76) (.8). (6.3). (6.3).3 (3.3).3 (8.76) (.6). (6.).6 (6.73).7 (.78).3 (8.76) (.8) 3 info@exxelia.com Page revised 9/7

13 Taping User Guide : dimensions EIA STANDARD CAPACITANCE VALUES Following EIA standard, the values and multiples that are indicated in the chart below can be ordered. E8, E96 series and intermediary values are available upon request. PART MARKING VOLTAGE CODES Use the following voltage code chart for part markings: E6 (± %) E (± %) E (± %) Voltage (V) Code Letter code A B C D E G H K L, M, P 3, 3 R, S, T 7, 7 U, 3 W EIA CAPACITANCE CODE The capacitance is expressed in three digit codes and in units of pico Farads (pf). The first and second digits are significant figures of the capacitance value and the third digit identifies the multiplier. For capacitance value < pf, R designates a decimal point. See examples below: EIA code Capacitance value in pf in nf in µf R... 6R ,. 7, , , 68.68,. 6 6, ,3, 3, ,, 8, 8. 6,,, ,, 68, 68 7,,, 7,,, PART MARKING TOLERANCE CODES Use the following tolerance code chart for part markings: Tolerance Letter code ±.pf CU ±.pf DU ±pf FU ±% F ±% G ±% J ±% K ±% M info@exxelia.com Page revised 9/7

14 RELIABILITY LEVELS Exxelia proposes different reliability levels for the ceramic capacitors for both NPO and X7R ceramics. General characteristics User Guide GENERAL INFORMATION CECC EXXELIA TECHNOLOGIES chips capacitors are qualified according to CECC3-8 ESA ESCC EXXELIA TECHNOLOGIES chips capacitors are qualified (QPL) according to ESCC n 39 (chips) and ESCC n 3 (leaded) Æ Æ Æ Standard CoC Standard Æ Æ Æ F Æ Æ Æ Æ Æ T % electrical and visual control Voltage proof Insulation Resistance Capacitance value Dissipation factor Æ Æ Æ Æ Æ Æ Æ T6 Only for rated voltage <V Rapid Change of Temperature cycles C + C CoC F Burn-in (% control) 68 h, C,. Un CoC T Solderability Test On parts Rapid Change of Temperature cycles C + C Damp Heat 8 C 8 % RH h. V On parts CoC T6 Æ Æ Æ Æ Level FM IN PROCESS control According ESCC n 39/3 Chart F According ESCC n 39/3 Chart F3 According ESCC n 39/3 Æ Documentation: according ESCC n 39/3 info@exxelia.com Page revised 9/7

Operating temperature Maximum C/C over temperature range without DC voltage applied

Operating temperature Maximum C/C over temperature range without DC voltage applied Planar Arrays General characteristics BPM Series FEATURES Planar capacitor arrays X7R dielectrics (NPO available on request) Capacitance range: 330pF - 68nF Voltage range: 5V DC to 00V DC Specific configurations