Technische Universität Graz. Institute of Solid State Physics. 11. MOSFETs
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1 Technische Universität Graz Institute of Solid State Physics 11. MOSFETs Dec. 12, 2018
2 Gradual channel approximation accumulation depletion inversion
3 Gradual channel approximation Ohm's law j nev ne E d n y I Ztj Ztne E Ze n E n y n s y n s = nt is the sheet charge at the interface. n s ( y) Q e C V V ( y) V ox G ch T e
4 Gradual channel approximation I Ztj Ztnev Zen E d s n y differential equation for V ch
5 Gradual channel approximation
6 MOSFET Gradual Channel Approximation
7 Gradual channel approximation Valid in the linear regime (until pinch-off occurs at the drain).
8 MOSFET-saturation voltage 2 Z VD n ox G T D L I C V V V 2 At pinch-off, di ds /dv ds = 0 di dv D Z ncox VG VT VD L 0 V V V sat G T A MOSFET in saturation is a voltage controlled current source.
9 MOSFET - saturation current Use the saturation voltage at pinch-off to determine the saturation current 2 Z VD n ox G T D L I C V V V V V V sat G T Z I C V V 2L 2 2 sat n ox G T
10 MOSFET (saturation regime) Z I C V V 2L 2 sat n ox GS T I D cut-off
11 MOSFET (linear regime) Channel conductance in the linear regime. For small V D Z I C V V V L n ox G T D di Z g C V V L D D n ox G T dvd Transconductance g di Z C V L D m n ox D dvg
12 MOSFET (saturation regime) Z I C V V 2L Transconductance 2 sat n ox G T di Z g C V V L D m n ox G T dvg A MOSFET in the saturation regime acts like a voltage controlled current source.
13 Saturation G G S D D Potential Electric field strength Alexander Schiffmann, Master Thesis (2016)
14 MOSFET (saturation regime) Z I C V V V V 2L 2 1 sat n ox G T D sat Experimentally: channel length modulation 1 L
15 High frequencies i 2 fc v i out gmv G in G G i in i out f gm 1 2 2C s G f T For large E, Ohm's law (j = nee) is not valid. The electron velocity saturates. For velocity saturation: f T vs L
16 Constant E-field Scaling Gate length L, transistor width Z, oxide thickness t ox are scaled down. V ds, V gs, and V T are reduced to keep the electric field constant. Power density remains constant. L ~ 45 t ox : "Days of happy scaling"
17 Constant E-field scaling Z ox I V V 2L t 2 sat n G T ox LsL, Z sz, t st, V sv ox ox th th I sat si sat I sat gets smaller di Z g V V D ox m n G T dvg L tox Transconductance stays the same. Power per transistor decreases like L 2. Power per unit area remains constant.
18 The heat dissipation problem Microprocessors are hot ~ 100 C Hotter operation will cause dopants to diffuse When more transistors are put on a chip they must dissipate less power. Power per transistor decreases like L 2.
19 Jan Transistor count doubles about every 2 years
20 Dual stress liners Tensile silicon nitride film over the NMOS and a compressive silicon nitride film over the PMOS improves the mobility.
21 Gate dielectric Thinner than 1 nm: electrons tunnel Large dielectric constant desirable r (SiO 2 ) ~ 4 r (Si 3 N 4 ) ~ 7
22
23 High-k dielectrics
24 Short channel effects SOI: silicon on insulator
25 CMOS SOI Fransila
26 Intel Pentium 4 90 nm Intel Pentium D 65 nm Intel Core 2 Duo 45 nm Intel Atom Z6xx Series 45 nm Intel Core 2 Celeron 45 nm Intel Core i nm Intel Xeon 5600 Series 32 nm Intel Ivy bridge tri-gate 22 nm Intel Haswell FinFET 16 nm
27 Intel 22nm 3D tri-gate transistor
28 FinFET
29 FinFET, Tri-gate Drain induced barrier lowering Robert Chau, Intel
30 Subthreshold current For V G <V T the transistor should switch off but there is a diffusion current. The current is not really off until ~ 0.5 V below the threshold voltage. Weak inversion I D evg VT exp kt B Subthreshold swing: mv/decade
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