EE539: Analog Integrated Circuit Design;

Transcription

1 EE539: Analog Integrated Circuit Design; Nagendra Krishnapura 4 Feb DIFFERENTIA AMPIFIER Simple differential amplifier circuit is shown in the below figure In this circuit V bias, V dd, and I o such that Vdd + +Vo,bias + Vo,bias V bias + / V bias / to make MOS transistors in saturation. Figure 1: DIFFERENTIA PAIR SMA SIGNA DC GAIN Small signal current flowing in the two transistors are equivalent but in opposite directions,so = = The value of can be calculated by applying KC at node ( ) + ( ) + (v o ) ( ) = 0 1

2 / / / / v gs Figure : SMA SIGNA EQUIVAENT CIRCUIT FOR THE DIFFERENTIA PAIR ( + ) = 0 = 0 That implies acts as virtual ground. This is true iff the circuit is fully symmetrical and with fully symmetrical drives. Apply KC at, then The differential output voltage is given by, = + 1 = Dc gain, v o = = v o = This DC gain value is equivalent to that of the CS Amplifier.But DC gain of the CS Amplifier is negative.here for the differential pair the DC gain value we got is positive.this is because we have changed the reference. The small signal equivalent circuit for the CS Amplifier amplifier is shown in the below figure If = 0,then we can analyze only the half circuit,the other is negative of this. 3 SMA SIGNA EQUIVAENT CIRCUIT AT HIGH FREQUENCIES If we consider C db, then v o (s) (s) = + sc db 1

3 3 Vdd + + Figure 3: DIFFERENTIA PAIR If we have connected a capacitor C between two output nodes,then e can devide C in to C and C.Due to the circuit is symmetrical the mid point between C and C is grounded. Now, v o (s) (s) = + sc db s(c ) If we cosider C gs,then there is no effect in the Gain equation. If we cosider C gd only, v o (s) (s) = (1 sc gd ) + sc db s(c ) + sc gd 4 ARGE SIGNA ANAYSIS OF DIFFERENTIA PAIR If 0, then, V op = V dd I o + v o. e can also write these equation as, V on = V dd I o v o

4 4 / v o / v gs Figure 4: SMA SIGNA EQUIVAENT CIRCUIT FOR THE CS Amplifier, V op = V dd I o +. V on = V dd I o The sum of the currents flowing through these transistors is I o V dd (V dd Io + ) + Vdd (V dd IoR + ) = I o To calculate individually, Assuming MOSFET as a square law device, µc ox + = 0 (V bias + V T ) + µc ox (V bias V T ) = I o = V bias V T Io µc ox ( )

5 5 / C db C db / / / v gs Figure 5: SMA SIGNA EQUIVAENT CIRCUIT FOR THE DIFFERENTIA PAIR / / C / / v gs Figure 6: SMA SIGNA EQUIVAENT CIRCUIT FOR THE DIFFERENTIA PAIR Variation in wrt is shown in the below figure, This plot is even function in.in small signal analysis we got = 0.In the above figure slope of the curve at = 0is zero. d d = 0, for large signal analysis. That implies the first coefficient in the Taylor s sereis is zero. To find the output voltage V o = V op V on in the large signal analysis, V o = V op V on = (i 1 i ) V o = µc ox (V bias + V T ) µc ox (V bias V T ) V o = µc ox V o = µc ox The plot for V op V on VS is shown in the below figure. This plot is odd function in. Slope reduces as we go away from origin. (V bias V T ) Io µc ox ( )

6 6 / / C C / / v gs Figure 7: SMA SIGNA EQUIVAENT CIRCUIT FOR THE DIFFERENTIA PAIR / / / / v gs C gs C gs Figure 8: SMA SIGNA EQUIVAENT CIRCUIT FOR THE DIFFERENTIA PAIR Arguement under the root becomes negative at v 1 i = Io µc ox If increases I 1 increases and and I decreases until carries I 1 all the current. I 1 = I o Io = µc ox This implies it never reaches v 1 i, this condition.so after this, i saturates. Small signal gain : dv o d vi =0 = µc ox I o = For an odd function even ordr derivatives are zero,so for this also. I o, V µc x increaes lin ox early,because all current flows in one transistor,is shown in the below figure. After

7 7 / / C gd C gd / / v gs Figure 9: SMA SIGNA EQUIVAENT CIRCUIT FOR THE DIFFERENTIA PAIR if = 0, Vdd + V dd I o V dd I o V bias V bias I o Figure 10: DIFFERENTIA PAIR Figure 11: VS

8 8 I o I o Figure 1: V op V on VS Figure 13: V x VS