EE141. EE141-Spring 2006 Digital Integrated Circuits. Administrative Stuff. Class Material. Flash Memory. Read-Only Memory Cells MOS OR ROM
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1 EE141-pring 2006 igital Integrated Circuits Lecture 29 Flash memory Administrative tuff reat job on projects and posters! Homework #10 due today Lab reports due this week Friday lab in 353 Final exam May 19, 12:30-3:30pm 277 Cory 1 2 Class Material Last lecture Finish adders ROM Today s lecture Flash memory RAM Reading Chapter 12 (pp , ) Flash Memory 3 4 Read-Only Memory Cells MO OR ROM [0] [1] [2] [3] 1 [0] [1] [2] 0 [3] N iode ROM MO ROM 1 MO ROM 2 V bias Pull-down loads 5 6 1
2 MO NOR ROM [0] [1] Pull-up devices N MO NOR ROM Layout Cell (9.5λ x 7λ) Programmming using the Active Layer Only [2] [3] N Metal1 iffusion Metal1 on iffusion [0] [1] [2] [3] 7 8 MO NOR ROM Layout Cell (11λ x 7λ) MO NAN ROM Pull-up devices Programmming using the Contact Layer Only [0] [0] [1] [2] [3] [1] [2] Metal1 iffusion [3] Metal1 on iffusion 9 All word lines high by default with exception of selected row 10 MO NAN ROM Layout Cell (8λ x 7λ) Programmming using the Metal-1 Layer Only NAN ROM Layout Cell (5λ x 6λ) Programmming using Implants Only No contact to V or N necessary; drastically reduced cell size Loss in performance compared to NOR ROM iffusion Metal1 on iffusion Threshold-altering implant Metal1 on iffusion
3 Equivalent Transient Model for MO NOR ROM Equivalent Transient Model for MO NAN ROM Model for NOR ROM Model for NAN ROM r word C bit r bit C L c bit c word r word c word Word line parasitics Wire capacitance and gate capacitance Wire resistance (polysilicon) Bit line parasitics Resistance not dominant (metal) rain and ate-rain capacitance Word line parasitics imilar to NOR ROM Bit line parasitics Resistance of cascaded transistors dominates rain/ource and complete gate capacitance Non-Volatile Memories The Floating-gate gate transistor (FAMO) Floating-ate Transistor Programming 2 Floating gate ource ate rain t ox n + p ubstrate t ox n +_ Avalanche injection Removing programming voltage leaves charge trapped Programming results in higher V T. evice cross-section chematic symbol A Programmable-Threshold Transistor Flash EEPROM I 0 -state 1 -state Control gate ON Floating gate V T erasure Thin tunneling oxide n source programming p-substrate n drain OFF V V Many other options
4 Cross-sections sections of NVM cells Basic Operations in a NOR Flash Memory Erase cell array Flash Courtesy Intel EPROM 19 open open 20 Basic Operations in a NOR Flash Memory Write Basic Operations in a NOR Flash Memory Read 6 V V V 1 V NAN Flash Memory NAN Flash Memory Word line(poly) elect transistor Word lines Unit Cell ate Oxide ate ONO F Active area TI ource line (iff. Layer) Bit line contact ource line contact Courtesy Toshiba 23 Courtesy Toshiba 24 4
5 1-Transistor RAM Cell Write 1 Read 1 M 1 X N V T C RAM C /2 V sensing /2 Write: C is charged or discharged by asserting and. Read: Charge redistribution takes places between bit line and storage capacitance C ΔV = V V PRE = V BIT V PRE C + C Voltage swing is small; typically < 200 mv RAM Cell Observations 1T RAM requires a sense amplifier for each bit line, due to charge redistribution read-out. RAM memory cells are single ended in contrast to RAM cells. The read-out of the 1T RAM cell is destructive; read and refresh operations are necessary for correct operation. When writing a 1 into a RAM cell, a threshold voltage is lost. This charge loss can be circumvented by bootstrapping the word lines to a higher value than ense Amp Operation V V PRE V(1) ense amp activated Word line activated V(1) V(0) t T T RAM Cell Modern 1T RAM Cells Capacitor Word line Insulating Layer Cell plate Capacitor dielectric layer Metal word line M 1 word line Cell Plate i Poly n + n + Inversion layer Poly induced by plate bias Cross-section io 2 Field Oxide iffused bit line gate Layout plate Capacitor Insulator torage Node Poly 2nd Field Oxide Refilling Poly i ubstrate Transfer gate Isolation torage electrode Uses -iffusion Capacitance Expensive in Area 29 Trench Cell tacked-capacitor Cell 30 5
6 THE EN But this is just the beginning 31 6
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