Features / Advantages: Applications: Package: Y4

Transcription

1 hyristor Module RRM = 2x 4 A = 26A =. Phase leg Part number MCC2-4io Backside: isolated Features / Advantages: Applications: Package: Y4 hyristor for line frequency Planar passivated chip Long-term stability Direct Copper Bonded Al2O3-ceramic Line rectifying /6 Hz Softstart AC motor control Motor control Power converter AC power control Lighting and temperature control solation oltage: 36 ~ ndustry standard outline RoHS compliant Soldering pins for PCB mounting Base plate: B ceramic Reduced weight Advanced power cycling

2 hyristor Symbol Definition = 4 = 2 C J = 2 C Ratings min. typ. max. forward voltage drop = 2 A = 2 C.2 A (RMS) = = = Conditions 4 A 2 A 4 A C = 8 C 8 sine = 2 C J = 2 C J threshold voltage J = 2 C.8 for power loss calculation only r slope resistance.4 mω R thermal resistance junction to case.3 K/W thjc P tot total power dissipation C = 2 C 77 W SM max. forward surge current t = ms; ( Hz), sine J = 4 C 8. ka t = 8,3 ms; (6 Hz), sine R = 8.64 ka t = ms; ( Hz), sine J = 2 C 6.8 ka t = 8,3 ms; (6 Hz), sine R = 7.3 ka ²t value for fusing t = ms; ( Hz), sine J = 4 C 32. ka²s t = 8,3 ms; (6 Hz), sine R = 3. ka²s t = ms; ( Hz), sine J = 2 C 23.2 ka²s t = 8,3 ms; (6 Hz), sine = ka²s P GM RSM/DSM RRM/DRM R/D P GA average forward current RMS forward current J J = 2 C C J junction capacitance = 4 f = MHz = 2 C 366 max. gate power dissipation t P = 3 µs C = 2 C 2 t = µs 6 average gate power dissipation P J J = 2 C R Unit R J pf (di/dt) cr critical rate of rise of current J = 2 C; f = Hz repetitive, = 6 A t P = 2 µs; di G /dt =.A/µs; G =.A; D = ⅔ DRM non-repet., = 2 A (dv/dt) critical rate of rise of voltage = ⅔ =2 C cr max. non-repetitive reverse/forward blocking voltage max. repetitive reverse/forward blocking voltage reverse current, drain current = 4 R R/D R/D R thch thermal resistance case to heatsink. D GK = ; method (linear voltage rise) G gate trigger voltage D = 6 J = 2 C J = -4 C DRM J µa ma A A W W W A/µs A/µs /µs 2 3 G gate trigger current D = 6 J = 2 C ma J = -4 C 22 ma GD gate non-trigger voltage D = ⅔ DRM J = 2 C.2 GD gate non-trigger current ma L latching current t p = 3µs J = 2 C 2 ma G =.A; di G /dt =.A/µs H holding current D = 6 R GK = J = 2 C ma t gd gate controlled delay time D = ½ DRM J = 2 C 2 µs G =.A; di G /dt =.A/µs t q turn-off time R = ; = 3 A; D = ⅔ DRM J = 2 C 2 µs di/dt = A/µs; dv/dt = /µs; t p = 2 µs K/W

3 Package Y4 Ratings Symbol Definition Conditions min. typ. max. Unit RMS RMS current per terminal 3 A J virtual junction temperature -4 2 C op operation temperature -4 C stg storage temperature -4 2 C Weight M D M d Spp/App d Spb/Apb SOL mounting torque 2.2 terminal torque 4. creepage distance on surface striking distance through air isolation voltage t = second t = minute terminal to terminal terminal to backside /6 Hz, RMS; SOL ma g Nm Nm mm mm Assembly Line Date Code Part No. Circuit Diagram yywwa YYYYYYYYYYY 2D Matrix Ordering Standard Part Number Marking on Product Delivery Mode Quantity Code No. MCC2-4io MCC2-4io Box Equivalent Circuits for Simulation * on die level J = 2 C hyristor R max threshold voltage.8 R max slope resistance *.7 mω

4 Outlines Y4 M6 x / Ø Optional accessories for modules Keyed gate/cathode twin plugs with wire length = 3 mm, gate = white, cathode = red ype ZY 8L (L = Left for pin pair 4/) UL 78, style 37 ype ZY 8R (R = Right for pin pair 6/7)

5 hyristor SM 4 Hz 8% RRM J = 4 C J =2 C 2 dt [A 2 s] J =4 C J =2 C 3 AM 2 8 sin t [s] Fig. Surge overload current SM, FSM : Crest value, t: duration 4 t [ms] Fig. 2 2 t versus time (- ms) C [ C] Fig. 3 Max. forward current at case temperature P tot [W] sin R thka K/W G [] : G, J =2 C 2: G, J = 2 C 3: G, J = -4 C AM a [ C] 4: P GM =2W GD, J =3 C : P GM =6W. 6: P GM =2W G Fig. 4 Power dissipation vs. on-state current & ambient temperature (per thyristor or diode) Fig. Gate trigger characteristics P tot R thka K/W t gd J =2 C 8 [W] [ s] 4 limit typ dam a [ C] Fig. 6 hree phase rectifier bridge: Power dissipation versus direct output current and ambient temperature.. G Fig. 7 Gate trigger delay time

6 hyristor 4 /F /F [] Fig. 8 Forward current versus voltage drop.3.2 Z thjc [K/W] Constants for Z thjc calculation: i R thi [K/W] t i [s] t [s] Fig. 9 ransient thermal impedance junction to case at various conduction angles.4.3 Z thjk.2 [K/W] t [s] Fig. ransient thermal impedance junction to heatsink (per thyristor/diode)