Chapter 2 Combinational logic

Transcription

1 Chapter 2 Combinational logic Chapter 2 is very easy. I presume you already took discrete mathemtics. The major part of chapter 2 is boolean algebra. II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz

2 Combinational logic Basic logic Boolean algebra, proofs by re-writing, proofs by perfect induction logic functions, truth tables, and switches NOT, AND, OR, NAND, NOR, XOR,..., minimal set Logic realization two-level logic and canonical forms incompletely specified functions Simplification uniting theorem grouping of terms in Boolean functions Alternate representations of Boolean functions cubes Karnaugh maps Before beginning the main part of combinational logic, let s see boolean algebra first Mastering boolean algebra will make it easy for you to handle digital logic e.g. just like Boolean logic expressions, we can simplify digital logic circuits The final part of this chapter is the way to represent boolean functions, which facilitates the logic simplification II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 2

3 Possible logic functions of two variables There are 6 possible functions of 2 input variables: in general, there are 2**(2**n) functions of n inputs X Y F X Y F F F3 F6 F9 F2 F5 X and Y X Y X xor Y X or Y X = Y X nor Y not (X or Y) not Y not X X nand Y not (X and Y) Suppose there are two inputs and one output in a digital system How many different functions can be defined? Different functions mean that at least one output is different for all cases of input values First of all, there are 4 cases of inputs (2**n for n inputs). For each case, the output can be either or. So total 2**4 kinds of output functions can be defined. II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 3

4 Cost of different logic functions Different functions are easier or harder to implement each has a cost associated with the number of switches needed (F) and (F5): require switches, directly connect output to low/high X (F3) and Y (F5): require switches, output is one of inputs X (F2) and Y (F): require 2 switches for "inverter" or NOT-gate X nor Y (F4) and X nand Y (F4): require 4 switches X or Y (F7) and X and Y (F): require 6 switches X = Y (F9) and X Y (F6): require 6 switches thus, because NOT, NOR, and NAND are the cheapest they are the functions we implement the most in practice Depending on the output values of a function, the cost to implement the logic function is different. At the simplest end of spectrum, we don t need a switch in F and F5. Recall that two input NAND and NOR function requires two pair of CMOS TRs, 4 switches. So AND and OR gates can be implemented by adding an inverter to NAND and NOR, respectively. II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 4

5 Minimal set of functions Can we implement all logic functions from NOT, NOR, and NAND? For example, implementing X and Y is the same as implementing not (X nand Y) In fact, we can do it with only NOR or only NAND NOT is just a NAND or a NOR with both inputs tied together X Y X nor Y X Y X nand Y and NAND and NOR are "duals", that is, its easy to implement one using the other X nand Y not ( (not X) nor (not Y) ) X nor Y not ( (not X) nand (not Y) ) All kinds of logic functions (6 functions in the previous slide) can be implemented only by using NOR, NAND, and NOT Actually, NOT can also be implemented by NOR or NAND if we tie both inputs. NOR and NAND has somewhat contrastive properties, dubbed dual, which means one can be transformed to another in a simple and symmetric fashion. Put simply, just add inverters on all inputs and outputs. II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 5

6 An algebraic structure An algebraic structure consists of a set of elements B binary operations { +, } and a unary operation { } such that the following axioms hold: Identity (element) 항등원 Inverse (element) 역원. the set B contains at least two elements: a, b 2. closure: a + b is in B a b is in B 3. commutativity: a + b = b + a a b = b a 4. associativity: a + (b + c) = (a + b) + c a (b c) = (a b) c 5. identity: a + = a a = a 6. distributivity: a + (b c) = (a + b) (a + c) a (b + c) = (a b) + (a c) 7. complementarity: a + a = a a = Before moving on to Boolean algebra, let s see how a general algebraic structure can be defined in mathematical perspective. When we refer to algebra, it deals with the relations or properties of entities or elements. Do you remember linear algebra? What are the key axioms for linear algebra? For all a,b that belong to a set S, a+b and k*a also belong to S and a+b = b+a, a*b = b*a II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 6

7 Boolean algebra Boolean algebra B = {, } variables + is logical OR, is logical AND is logical NOT All algebraic axioms hold Then, Boolean algebra is one special branch of algebra Any boolean variable takes either or. and the previous axioms hold for boolean variables as an algebraic structure. II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 7

8 Logic functions and Boolean algebra Any logic function that can be expressed as a truth table can be written as an expression in Boolean algebra using the operators:, +, and X Y X Y X Y X X Y X Y X Y X Y X Y ( X Y ) + ( X Y ) ( X Y ) + ( X Y ) X = Y X, Y are Boolean algebra variables Boolean expression that is true when the variables X and Y have the same value and false, otherwise We already know that any boolean function (say, one of 6 functions of two inputs) can be described by a truth table. And any boolean function can be expressed by a boolean algebra using the variables and operators in the last slide. II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 8

9 Axioms and theorems of Boolean algebra identity. X + = X D. X = X null 2. X + = 2D. X = idempotency: 3. X + X = X 3D. X X = X involution: 4. (X ) = X Idempotency: one may derive the same consequences from many instances of a hypothesis as from just one complementarity: 5. X + X = 5D. X X = commutativity: 6. X + Y = Y + X 6D. X Y = Y X associativity: 7. (X + Y) + Z = X + (Y + Z) 7D. (X Y) Z = X (Y Z) Here is the list of properties of Boolean algebra. Note that suffix D means the dual of the original expression. Dual is the other symmetric part of a pair, which will be discussed later. (at this moment, use two rules: AND<-> OR, <->) II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 9

10 Axioms and theorems of Boolean algebra (cont d) distributivity: 8. X (Y + Z) = (X Y) + (X Z) 8D. X + (Y Z) = (X + Y) (X + Z) uniting: 9. X Y + X Y = X 9D. (X + Y) (X + Y ) = X absorption:. X + X Y = X D. X (X + Y) = X. (X + Y ) Y = X Y D. (X Y ) + Y = X + Y factoring: 2. (X + Y) (X + Z) = 2D. X Y + X Z = X Z + X Y (X + Z) (X + Y) concensus: 3. (X Y) + (Y Z) + (X Z) = 3D. (X + Y) (Y + Z) (X + Z) = X Y + X Z (X + Y) (X + Z) Uniting theorem is very useful for minimizing logic systems. Actually, absorption is also useful in logic simplification. What is a hint here? Focus on the complements Let s look at theorem 2. (X+Y)(X +Z) = XX +XZ+X Y+YZ =XZ+X Y+YZ(X+X ) =XZ(+Y)+X Y(+Z) =XZ+X Y II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz

11 Axioms and theorems of Boolean algebra (cont d) de Morgan s: 4. (X + Y +...) = X Y... 4D. (X Y...) = X + Y +... generalized de Morgan s: 5. f (X,X 2,...,X n,,,+, ) = f(x,x 2,...,X n,,,,+) establishes relationship between and + When a complement operator goes into the parenthesis, an AND or OR operator is switched to the other, not to mention literals are inverted. II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz

12 Axioms and theorems of Boolean algebra (cont d) Duality a dual of a Boolean expression is derived by replacing by +, + by, by, and by, and leaving variables unchanged any theorem that can be proven is thus also proven for its dual! a meta-theorem (a theorem about theorems) duality: 6. X + Y +... X Y... generalized duality: 7. f (X,X 2,...,X n,,,+, ) f(x,x 2,...,X n,,,,+) Different than demorgan s Law this is a statement about theorems this is not a way to manipulate (re-write) expressions If some theorem is true, its dual is also true. Most theorems have their duals Note that de Morgan s law just presents a way of conversion. Meanwhile duality states that there is another theorem for each theorem. II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 2

13 Proving theorems (rewriting) Using the axioms of Boolean algebra: e.g., prove the theorem: X Y + X Y = X distributivity (8) X Y + X Y = X (Y + Y ) complementarity (5) X (Y + Y ) = X () identity (D) X () = X e.g., prove the theorem: X + X Y = X identity (D) X + X Y = X + X Y distributivity (8) X + X Y = X ( + Y) null (2) X ( + Y) = X () identity (D) X () = X There are a few ways to prove theorems. The first one is using other theorems and axioms in the previous slides. When you see XY + XY, there is a common factor X. By applying distributivity theorem, we can factor out X. so we can rewrite as X(Y+Y ) II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 3

14 Proving theorems (perfect induction) Using perfect induction (complete truth table): e.g., de Morgan s: (X + Y) = X Y NOR is equivalent to AND with inputs complemented X Y X Y (X + Y) X Y (X Y) = X + Y NAND is equivalent to OR with inputs complemented X Y X Y (X Y) X + Y The second method to prove theorems is to use truth-tables. These tables prove de morgan s theorem by using truth tables. II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 4

15 A simple example: -bit binary adder Cout Cin Inputs: A, B, Carry-in Outputs: Sum, Carry-out A A A A A B B B B B S S S S S A B Cin Cout S A B Cin S Cout S = A B Cin + A B Cin + A B Cin + A B Cin Cout = A B Cin + A B Cin + A B Cin + A B Cin Let s design a one bit adder which calculates the sum of two bits (one bit for each number) Note that there can be a carry-in value from the lower position bits, denoted by Cin When there are an even number of s among three inputs, S will be. When two or more s among three inputs, Cout will be. Cout becomes true in 4 cases. II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 5

16 Apply the theorems to simplify expressions The theorems of Boolean algebra can simplify Boolean expressions e.g., full adder s carry-out function (same rules apply to any function) Cout = A B Cin + A B Cin + A B Cin + A B Cin = A B Cin + A B Cin + A B Cin + A B Cin + A B Cin = A B Cin + A B Cin + A B Cin + A B Cin + A B Cin = (A + A) B Cin + A B Cin + A B Cin + A B Cin = () B Cin + A B Cin + A B Cin + A B Cin = B Cin + A B Cin + A B Cin + A B Cin + A B Cin = B Cin + A B Cin + A B Cin + A B Cin + A B Cin = B Cin + A (B + B) Cin + A B Cin + A B Cin = B Cin + A () Cin + A B Cin + A B Cin = B Cin + A Cin + A B (Cin + Cin) = B Cin + A Cin + A B () = B Cin + A Cin + A B adding extra terms creates new factoring opportunities Now we will show how Cout can be reduced by using theorems in Boolean algebra. The question that comes up in your mind will be how we can find such a clue to simplification? Always focus on complements. II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 6

17 From Boolean expressions to logic gates NOT X X ~X X Y X Y AND X Y XY X Y X Y Z X Y Z OR X + Y X Y X Y Z X Y Z Let s see how Boolean expressions can be represented by logic gates II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 7

18 From Boolean expressions to logic gates (cont d) NAND X Y Z X Y Z NOR X Y Z X Y Z XOR X Y X Y Z X Y Z X xor Y = X Y + X Y X or Y but not both ("inequality", "difference") XNOR X = Y X Y Z X Y Z X xnor Y = X Y + X Y X and Y are the same ("equality", "coincidence") The bubble at the tip indicates an inverter. XNOR is the negation of XOR, which is true when both X and Y have the same value II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 8

19 From Boolean expressions to logic gates (cont d) More than one way to map expressions to gates e.g., Z = A B (C + D) = (A (B (C + D))) T2 T use of 3-input gate A Z A B T B Z C D T2 C D There can be multiple choices in implementing the same boolean expression by logic gates. Then we should compare these choices. The logic circuit on the left is for the 2nd expression and the one on the right is for the st expression. Is there any difference in these two realizations? II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 9

20 Waveform view of logic functions Just a sideways truth table but note how edges don t line up exactly it takes time for a gate to switch its output! time change in Y takes time to "propagate" through gates There IS difference; it takes time for a signal to pass through each gate. Waveform describes how a signal at each point changes over time Suppose X and Y change at precise timing. Depending on the gate type, the gate passing delay can be slightly different. e.g. an XOR gate is complicated, which incurs a longer delay than other simple gates II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 2

21 Choosing different realizations of a function A B C Z Z = A B C + A BC + AB C + ABC Z = ABC + A C + B C Z2 = ABC + (AB) C Z3 = AB C two-level realization (we don t count NOT gates) p.53 multi-level realization (gates with fewer inputs) XOR gate (easier to draw but costlier to build) We will see three variations of the same logic expression here. Z=Z2=Z3=Z Let s consider Z first. 3 AND gates and OR gate. Also we need to check the # of wires or inputs. In Z3, XOR is called a complex gate, which requires several NAND or NOR gates. So Z3 is likely to have the worst delay. II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 2

22 XOR implementations Three levels of logic inside a XOR gate X Y = X Y + XY X X Y Y X X Y Y II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 22

23 Which realization is best? Reduce number of inputs literal: input variable (complemented or not) can approximate cost of logic gate as 2 transistors per literal why not count inverters? fewer literals means less transistors smaller circuits fewer inputs implies faster gates gates are smaller and thus also faster fan-ins (# of gate inputs) are limited in some technologies Reduce number of gates fewer gates (and the packages they come in) means smaller circuits directly influences manufacturing costs One literal can be approximated by two transistors. We already looked at two-input and three-input NAND gates and the numbers of TRs. In many cases, an inverter function is already included for each literal. II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 23

24 Which is the best realization? (cont d) Reduce number of levels of gates fewer level of gates implies reduced signal propagation delays minimum delay configuration typically requires more gates wider, less deep circuits How do we explore tradeoffs between increased circuit delay and size? automated tools to generate different solutions logic minimization: reduce number of gates and complexity logic optimization: reduction while trading off against delay As more gates are cascaded, the overall delay will be increased e.g. AB+(AB) In general, there is a tradeoff between the delay and the number of gates. Let s compare Z and Z3 Depending on the criteria (e.g. minimize delay, minimize the # of gates), the CAD tools can yield different solutions. II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 24

25 Are all realizations equivalent? Under the same input stimuli, the three alternative implementations have almost the same waveform behavior delays are different glitches (hazards) may arise these could be bad, it depends variations due to differences in number of gate levels and structure The three implementations are functionally equivalent For the same function, we looked at the three implementations. Even though they are equivalent with a steady state viewpoint, the transient behavior may be a little bit different Typically, a transient behavior takes place right after there is some change in input values. In the next slide, we will see why there is a hole in the waveform. II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 25

26 Choosing different realizations of a function A B C Z A = B = C = two-level realization (we don t count NOT gates) Assume the same delay for all gates A B C multi-level realization (gates with fewer inputs) C XOR gate (easier to draw but costlier to build) Let s see Z2. First, input variables are changing. B goes from to while C goes from to, and these changes are propagated through gates. The delays are accumulated as the signal goes through more gates. II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 26

27 Implementing Boolean functions Technology independent canonical forms two-level forms multi-level forms Technology choices packages of a few gates regular logic two-level programmable logic multi-level programmable logic Ok. We can understand that there can be various implementations for the same boolean expression. A Boolean function can take one of various expressions. So, there is some taxonomy about how we can express a logic function. One category includes technology-independent forms. The other approach highly depends on the implementation technologies. II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 27

28 Canonical forms Truth table is the unique signature of a Boolean function The same truth table can have many gate realizations Canonical forms standard forms for a Boolean expression provides a unique algebraic signature The unique identifier of a logic function is the truth table, no matter what. Again, the same truth table has many variations in gate design. So we want to standardize how to map a truth table to a boolean expression in designing logic systems. One of the simple and intuitive expression of the output function is to use canonical forms, which have two alternatives. II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 28

29 Sum-of-products (S-o-P) canonical forms Also known as (aka) disjunctive normal form Also known as minterm expansion F = A B C + A BC + AB C + ABC + ABC A B C F F F = F = A B C + A BC + AB C This sum of products (SOP) canonical form may be easiest. Just check all the cases when F becomes true and each case forms the product of input variables. And finally, ORing these products will yield the final expression. This is also called minterm expansion; here, a minterm is a product of all the input literals. Each literal should appear once in each minterm: asserted or complemented II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 29

30 Sum-of-products canonical form (cont d) Product term (or minterm) ANDed product of literals input combination for which output is true each variable appears exactly once, true or inverted (but not both) A B C minterms A B C m A B C m A BC m2 A BC m3 AB C m4 AB C m5 ABC m6 ABC m7 short-hand notation for minterms of 3 variables F in canonical form: F(A, B, C) = Σm(,3,5,6,7) = m + m3 + m5 + m6 + m7 = A B C + A BC + AB C + ABC + ABC canonical form minimal form F(A, B, C) = A B C + A BC + AB C + ABC + ABC = (A B + A B + AB + AB)C + ABC = ((A + A)(B + B))C + ABC = C + ABC = ABC + C = AB + C Each product is called a minterm, and denoted by small m and a decimal number for the binary input values Note that there is no reduction or minimization in canonical forms; each variable must appear once for each product II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 3

31 Product-of-sums (P-o-S) canonical form Also known as conjunctive normal form Also known as maxterm expansion F = F = (A + B + C) (A + B + C) (A + B + C) A B C F F F = (A + B + C ) (A + B + C ) (A + B + C ) (A + B + C) (A + B + C ) The other canonical form is P-o-S. This one focuses on when F will be. P-o-S is like the dual of S-o-P. First of all, we check all the cases that make F false or The variables for each case or term are first complemented and then connected by the OR operation. This ORed term is called maxterm. Eventually, these terms are connected by AND. What does the final expression mean? II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 3

32 Product-of-sums canonical form (cont d) Sum term (or maxterm) ORed sum of literals input combination for which output is false each variable appears exactly once, true or inverted (but not both) A B C maxterms A+B+C M A+B+C M A+B +C M2 A+B +C M3 A +B+C M4 A +B+C M5 A +B +C M6 A +B +C M7 short-hand notation for maxterms of 3 variables F in canonical form: F(A, B, C) = ΠM(,2,4) = M M2 M4 = (A + B + C) (A + B + C) (A + B + C) canonical form minimal form F(A, B, C) = (A + B + C) (A + B + C) (A + B + C) = (A + B + C) (A + B + C) (A + B + C) (A + B + C) = (A + C) (B + C) Each term is called a maxterm, denoted by the capital M and the decimal value of input variables. II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 32

33 S-o-P, P-o-S, and de Morgan s theorem Sum-of-products F = A B C + A BC + AB C Apply de Morgan s (F ) = (A B C + A BC + AB C ) F = (A + B + C) (A + B + C) (A + B + C) Product-of-sums F = (A + B + C ) (A + B + C ) (A + B + C ) (A + B + C) (A + B + C ) Apply de Morgan s (F ) = ( (A + B + C )(A + B + C )(A + B + C )(A + B + C)(A + B + C ) ) F = A B C + A BC + AB C + ABC + ABC And we can verify the equivalence of SoP and PoS here by de Morgan s theorem As we know F and F are complementary to each other; so F = (F ). Let s check this out. If we express F in the SOP form, there are three cases that make F true. The sum of three minterms are complemented, which is F. II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 33

34 Four alternative two-level implementations of F = AB + C A B C F F2 canonical sum-of-products minimized sum-of-products F3 canonical product-of-sums F4 minimized product-of-sums Recall that F = AB+C which has 5 terms in the S-o-P canonical form in the previous example. It has 3 terms in the P-o-S canonical terms II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 34

35 Waveforms for the four alternatives Waveforms are essentially identical except for timing hazards (glitches) delays almost identical (modeled as a delay per level, not type of gate or number of inputs to gate) Even though F, F2, F3 and F4 are equivalent, their transient behaviors may be different II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 35

36 Mapping between canonical forms Minterm to maxterm conversion use maxterms whose indices do not appear in minterm expansion e.g., F(A,B,C) = Σm(,3,5,6,7) = ΠM(,2,4) Maxterm to minterm conversion use minterms whose indices do not appear in maxterm expansion e.g., F(A,B,C) = ΠM(,2,4) = Σm(,3,5,6,7) Minterm expansion of F to minterm expansion of F use minterms whose indices do not appear e.g., F(A,B,C) = Σm(,3,5,6,7) F (A,B,C) = Σm(,2,4) Maxterm expansion of F to maxterm expansion of F use maxterms whose indices do not appear e.g., F(A,B,C) = ΠM(,2,4) F (A,B,C) = ΠM(,3,5,6,7) Using complementarity, minterm can be converted to maxterm and vice versa. II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 36

37 Incompletely specified functions Example: binary coded decimal (BCD) increment by BCD digits encode the decimal digits 9 in the bit patterns A B C D W X Y Z X X X X X X X X X X X X X X X X X X X X X X X X off-set of W on-set of W don t care (DC) set of W On-set: the set of cases whose output is these inputs patterns should never be encountered in practice "don t care" about associated output values, can be exploited in minimization In some logic functions, there can be input values which does not matter; we can map any output to those input values. BCD coding uses only ten values from to 9. With 4 input lines, we have 6 don t care cases of input values. For these don t care values, the function can have any arbitrary output values II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 37

38 Notation for incompletely specified functions Don t cares and canonical forms so far, we focus on either on-set or off-set There can be don t-care-set need two of the three sets (on-set, off-set, dc-set) Canonical representations of the BCD increment by function: Z = m + m2 + m4 + m6 + m8 + d + d + d2 + d3 + d4 + d5 Z = Σ [ m(,2,4,6,8) + d(,,2,3,4,5) ] Z = M M3 M5 M7 M9 D D D2 D3 D4 D5 Z = Π [ M(,3,5,7,9) D(,,2,3,4,5) ] In two standard canonical forms, SOP and PoS, we consider only either on-set or off-set And now we have a don t care (DC) set, which can be utilized for logic minimization. We can map either or arbitrarily for the case in the DC set So we have to extend the definition of canonical forms by incorporating don t care terms In SoP forms, a don t care term is denoted by d and the decimal number for the binary value. Whereas, in PoS forms, a DC term is denoted by D and the decimal number for the input II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 38

39 Simplification of two-level combinational logic Finding a minimal sum of products or product of sums realization exploit don t care information in the process Algebraic simplification not an algorithmic/systematic procedure how do you know when the minimum realization has been found? Computer-aided design tools precise solutions require very long computation times, especially for functions with many inputs (> ) heuristic methods employed "educated guesses" to reduce amount of computation and yield good if not best solutions Hand methods still relevant to understand automatic tools and their strengths and weaknesses ability to check results (on small examples) We can use theorems or rules of Boolean algebra in logic minimizations. Also, we can utilize don t care terms by treating them as s or s arbitrarily for our advantage. The manual solution may not yield a good minimization. Then CAD tools may come into play. They perform the logic minimizations systematically. However, if there are many input variables, the boolean function will be extremely complicated even for CAD tools. II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 39

40 Two minimization techniques Boolean cubes Karnaugh-maps (K-maps) Both of them are based on the uniting theorem So we will see two systematic procedures to minimize logic functions. Boolean cubes and K-maps. As both of them are based on the uniting theorem of boolean algebra, we will look at it first. II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 4

41 The uniting theorem Key tool to simplification: A (B + B) = A Essence of simplification of two-level logic find two element subsets of the ON-set where only one variable changes its value this single varying variable can be eliminated and a single product term used to represent both elements A B F F = A B +AB = (A +A)B = B B has the same value in both on-set rows B remains (in complemented form) A has a different value in the two rows A is eliminated One of the most useful theorem for simplifying logic systems is the uniting theorem in boolean algebra. Let s see how the uniting theorem is represented in the truth table. There are two cases or elements that make F true. One variable is not changed while the other literal is toggled. Ultimately, we want to apply the uniting theorem to the truth table directly without resorting to boolean expressions. And there are two well-known techniques. II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 4

42 Boolean cubes Visual technique for identifying when the uniting theorem can be applied n input variables = n-dimensional "cube" -cube X Y X 2-cube 3-cube Y Z X Y Z 4-cube The first technique to exploit the uniting theorem is to use boolean cubes. The dimension of a cube is the number of input variables. In 2-cube, the first bit is X and the second is Y. Boolean cubes are used to check whether there is a reducible variable by applying the uniting theorem. Let s see how we can put indices to each node. II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 42 X W

43 Mapping truth tables onto Boolean cubes Uniting theorem combines two "faces" of a cube into a larger "face" Example: A B F B F two faces of size (nodes) combine into a face of size (line) A ON-set = solid nodes OFF-set = empty nodes DC-set = 'd nodes A varies within face, B does not this face represents the literal B' Let s look at the details of the boolean cube technique. First of all, we fill in the nodes that correspond to the elements of the ON-set. If there are two adjacent solid nodes, we can use the uniting theorem. II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 43

44 Three variable example Binary full-adder carry-out logic (A'+A)BCin A B Cin Cout Cout = BCin+AB+ACin B C A AB(Cin'+Cin) A(B+B')Cin the on-set is completely covered by the combination (OR) of the subcubes of lower dimensionality - note that is covered three times This slide shows how Boolean cubes can reduce the logic expression of a full-adder. There are three instances that we can use the uniting theorem in this example. You can see that adjacent nodes are different only in a single bit. Let s examine three cases. II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 44

45 Higher dimensional cubes Sub-cubes of higher dimension than 2 F(A,B,C) = Σm(4,5,6,7) B C A on-set forms a square i.e., a cube of dimension 2 represents an expression in one variable i.e., 3 dimensions 2 dimensions A is asserted (true) and unchanged B and C vary This subcube represents the literal A Suppose the output boolean variable is Σm(4,5,6,7) in S-O-P form. In this case, the on-set nodes form a square. Here, we use the uniting theorem at a greater scale. A(BC+BC +B C+B C ) = A II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 45

46 m-dimensional cubes in a n-dimensional Boolean space In a 3-cube (three variables): a -cube, i.e., a single node, yields a term in 3 literals a -cube, i.e., a line of two nodes, yields a term in 2 literals a 2-cube, i.e., a plane of four nodes, yields a term in literal a 3-cube, i.e., a cube of eight nodes, yields a constant term "" In general, an m-subcube within an n-cube (m < n) yields a term with n m literals In general, in n-dim. boolean cubes, an m-dim. subcube (made from the elements of the on-set) can yield a term with n-m literals. That is, 2**m minterms can be reduced to a single term! II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 46

47 Karnaugh maps Flat map of Boolean cube wrap around at edges hard to draw and visualize for more than 4 dimensions virtually impossible for more than 6 dimensions Alternative to truth-tables to help visualize adjacencies guide to applying the uniting theorem on-set elements with only one variable changing value are adjacent unlike the situation in a linear truth-table B A 2 3 A B F Another technique is using a Karnaugh map, which is kind of a flat version of the Boolean cube technique. A K-map of two inputs are shown on the left. In each cell of the table, the numbers in black indicates the truth value while the numbers in blue indicate the decimal number of binary input values II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 47

48 Karnaugh maps (cont d) Numbering scheme based on Gray code e.g.,,,, only a single bit changes in code for adjacent map cells C C AB C B A A B C D II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 48 A 5 4 B 3 = = ABC D This slide shows a Karnaugh map of 3 and 4 inputs. The thick line segment represents the domain (in the perpendicular direction) where each variable is always TRUE. The other thin line segment(s) represents the domain where each variable is always FALSE. Adjacent cells are different only in one bit; that is the key property to use the uniting theorem.

49 Adjacencies in Karnaugh maps Wrap from first to last column Wrap top row to bottom row A C B C B A Let s focus on cell, there are three adjacent cells as also illustrated in the boolean cube. Note that the number of adjacent cells is the same as the number of input variables since it is equal to the number of bits. Let s go back to the previous slide and check the adjacent cells in a 4 input Karnaugh map. II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 49

50 Karnaugh map examples F = A Cout = B B f(a,b,c) = Σm(,4,5,7) A AB+ ACin + BCin Cin A B C B AC + B C + AB The on-set included in the red oval is already covered by two other adjacencies Let s look at three examples and how a Karnaugh map is used for simplification by using the uniting theorem. In the last example, we don t need to express the terms in the red circle, why? II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 5

51 More Karnaugh map examples A C B G(A,B,C) = A * exercises A C F(A,B,C) = Σm(,4,5,7) = AC + B C B C B A F' simply replace 's with 's and vice versa F'(A,B,C) = Σ m(,2,3,6) = BC + A C The first example shows a single group, which includes all the elements when A is. The second and third examples are complementary. The off-set of the 2 nd example becomes the on-set of the 3 rd example. II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 5

52 Karnaugh map: 4-variable example F(A,B,C,D) = Σm(,2,3,5,6,7,8,,,4,5) F = C + A BD + B D A C B D C D find the smallest number of the largest possible subcubes to cover the ON-set (fewer terms with fewer inputs per term) Remember what we need to do is to find out the minimum set of subcubes, which covers all the s, or all the elements of the on-set. The subset of 8 minterms is expressed by a green cube on the right in Boolean cube techniques. Likewise, the four minterms at all 4 corners are represented by sky blue plane. The last two terms in the middle is the brownish oval. II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 52 B A

53 Karnaugh maps: don t cares (DCs) f(a,b,c,d) = Σ m(,3,5,7,9) + d(6,2,3) without don't cares f = A D + B C D A X X D C X B Now let s see how we can utilize DC terms in the Karnaugh map technique. If we don t use DC terms, the logic function f is A D +B C D II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 53

54 Karnaugh maps: don t cares (cont d) f(a,b,c,d) = m(,3,5,7,9) + d(6,2,3) f = A'D + B'C'D without don't cares f = A'D + C'D with don't cares C X B A X X D by using don't care as a "" a 2-cube can be formed rather than a -cube to cover this node don't cares can be treated as s or s depending on which is more advantageous Let s check the power of DC terms here. By interpreting DCs as s opportunistically, we can make greater adjacency as shown here. Opportunistically means that we utilize only the DC terms that maximize the size of the on-set. II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 54

55 Combinational logic summary Logic functions, truth tables, and switches NOT, AND, OR, NAND, NOR, XOR,..., minimal set Axioms and theorems of Boolean algebra proofs by re-writing and perfect induction Gate logic networks of Boolean functions and their time behavior Canonical forms two-level and incompletely specified functions Simplification a start at understanding two-level simplification Later automation of simplification multi-level logic time behavior hardware description languages design case studies In chapter 2, we learned the basics for logic functions and its simplification techniques II - Combinational Logic Copyright 24, Gaetano Borriello and Randy H. Katz 55