Large-scale neural modeling

Transcription

1 Large-scale neural modeling We re acquiring brain data at an unprecedented rate Dendritic recording Serial Scanning EM Ca ++ imaging Kwabena Boahen Stanford Bioengineering Goal: Link structure to function by developing multi-level level computational models of neural systems. Hausser et al 1997 Computational primitives Denk et al 2005 Now all we have to is connect the dots + Microcircuitry Reid et al 2005 Functional behavior Multi-level level simulations can link structure to function The problem is one of scale 7 7 levels of investigation 10 orders of magnitude Option 1: Experiment Difficult to control Option 2: Theory Ignores details Option 3: Simulation Include all details Complements theory Control all parameters Complements experiment Levels of Investigation Churchland & Sejnowski

2 3GHz Dell Precision 100Mz Compaq Presario Brunsviga Model 20 Ray Kurzweil 2001 The fastest supercomputers can simulate only 10,000 neurons in real-time Cell Shenoy et al Compartment Ion-channel α ( V ) 1 u u β ( V ) du u ( V) u dt τ ( V ) 1 τ ( V ) α V + β V α ( V ) u ( V) α V + β V ( ) ( ) ( ) ( ) 8M neurons connected by 4B synapses 9 visual field in V1 1sec of activity took 1hr 20mins to simulate 4750 slower then real-time Blue Gene supercomputer Lansner et al. used one 2048-processor rack (3Tflops, $2M) Had to perform 38 trillion evaluations 8M neurons 6 comp. 8 eq steps/sec Physicists revolutionized astrophysics by building their own supercomputer Two spiral galaxies Hubble Telescope Univ. of Tokyo astrophysicist Jun Makino Point mass approx. Law of gravity mi Fj Gmj 2 r GRAPE6 supercomputer Hardwired to calculate gravitational force A third as fast as Blue Gene rack (1Tflop) Sixteen times more cost-effective ($42K) First to show gravothermal oscillations Resulted in 40 papers in 2000 alone i ij Neurogrid an affordable supercomputer for neuroscientists Neurogrid: : Board with grid of chips Programmable connections One chip per cortical cell-layer layer or type Neurocore: Chip with array of neurons Programmable ion-channel properties Multiple compartments per neuron Neurogrid (chips) Neurocore (neurons) Total (neurons) Speed (TF) 2008 (!) M K 1K 64M 18,200 RAM post pre Chip Chip 1 2

3 Don Don t evaluate equations equations emulate physics Ion channel V1: Parts Bulk V1 Backward e- Exploit physical analogy Analog VLSI MT projects to V1 Aggregates parts into coherent object Society for Neuroscience 2005 Essen & Fellerman 1991 ¾ Very Large Scale Integration MT: Object Anatomy has feedback Hypotheses about feedback: ¾ Including stochastic behavior Forward Drain Source Emulate ionic currents with electronic currents Feedforward view of motion MT Gate β (V ) Multi-area cortical models Transistor α (V ) 1 u R u du u (V ) u τ (V ) dt 1 τ (V ) α (V ) + β (V ) α (V ) u (V ) α (V ) + β (V ) isual areas Composes cues into unambiguous percept Runs in realreal-time Sillito 06 ¾ Takes 1sec instead of 1hr and 20mins Mead 1989 The chip: SpikeSpike-timing dependent plasticity BioE332 s thousand-neuron baby STDP Chip 750,000 transistors PRINCIPLE CELLS 60µm RAM CPLD USB 1024 excitatory principle cells ¾ 21 plastic synapses each 256 inhibitory interneurons 10.2mm2PRINCIPLE in 0.25μ 0.25μm CMOS INTERNEURON CELLS Computer 95µm 3

4 The GUI: Memorizing patterns Lab 1: Synapse Model Before learning After learning Neuron array Spike trains Neuron array Spike trains Sum Synaptic strengths LTP Synaptic strengths LTD Lab 2: Neuron Model Lab 3: Adaptation and Bursting 4

5 Lab 4: Phase Response Lab 5: Synchrony Lab 6: Binding Lab 7: Synaptic Plasticity 5

6 Lab 8: Plasticity and Synchrony Lab 9: Associative memory Before learning After learning Lab 10: Attention 6