Lecture 12: Datapath Functional Units
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1 Lecture 2: Datapath Functional Unit Slide courtey of Deming Chen Slide baed on the initial et from David Harri CMOS VLSI Deign
2 Outline Comparator Shifter Multi-input Adder Multiplier Reading:.3-4;.8-9 Datapath Functional Unit CMOS VLSI Deign 2
3 Comparator 0 detector: A = detector: A = Equality comparator: A = B Magnitude comparator: A < B Datapath Functional Unit CMOS VLSI Deign 3
4 & 0 Detector detector: N-input AND gate 0 detector: NOT + detector (N-input NOR) A 7 A 6 A 5 A 4 A 3 A 2 allone A 3 A 2 A A 0 allzero A A 0 A 7 A 6 A 5 A 4 A 3 A 2 allone A A 0 Datapath Functional Unit CMOS VLSI Deign 4
5 Equality Comparator Check if each bit i equal (XNOR, aka equality gate) detect on bitwie equality B[3] A[3] B[2] A[2] B[] A[] A = B B[0] A[0] Datapath Functional Unit CMOS VLSI Deign 5
6 Magnitude Comparator Compute B A and look at ign B A = B + ~A + For unigned number, carry out i ign bit B 3 A B C N A B A 3 B 2 A 2 B Z A = B A B 0 A 0 Datapath Functional Unit CMOS VLSI Deign 6
7 Signed v. Unigned For igned number, comparion i harder C: carry out Z: zero (all bit of B A are 0) N: negative (MSB of reult) V: overflow (input had different ign, output ign B) S: N xor V (ign of reult) Datapath Functional Unit CMOS VLSI Deign 7
8 Shifter Logical Shift: Shift number left or right and fill with 0 0 LSR = 00 0 LSL = 00 Arithmetic Shift: Shift number left or right. Rt hift ign extend 0 ASR = 0 0 ASL = 00 Rotate: Shift number left or right and fill with lot bit 0 ROR = 0 0 ROL = 0 Datapath Functional Unit CMOS VLSI Deign 8
9 Funnel Shifter A funnel hifter can do all ix type of hift Select N-bit field Y from 2N -bit input Shift by k bit (0 k < N) Logically involve N N: multiplexer Datapath Functional Unit CMOS VLSI Deign 9
10 Funnel Source Generator Rotate Right Logical Right Arithmetic Right Rotate Left Logical/Arithmetic Left Datapath Functional Unit CMOS VLSI Deign 0
11 Array Funnel Shifter N N-input multiplexer Ue -of-n hot elect ignal for hift amount nmos pa tranitor deign (V t drop!) k[:0] left Inverter & Decoder Y 3 Y 2 Z 6 Y Z 5 Y 0 Z 4 Z 3 Z 2 Z Z 0 Datapath Functional Unit CMOS VLSI Deign
12 Logarithmic Funnel Shifter Log N tage of 2-input muxe No elect decoding needed Datapath Functional Unit CMOS VLSI Deign 2
13 32-bit Logarithmic Funnel Wider multiplexer reduce delay and power Operand > 32 bit introduce datapath irregularity Datapath Functional Unit CMOS VLSI Deign 3
14 Barrel Shifter Barrel hifter perform right rotation uing wraparound wire. Left rotation are right rotation by N k = k + bit. Shift are rotation with the end bit maked off. Datapath Functional Unit CMOS VLSI Deign 4
15 Logarithmic Barrel Shifter Right hift only Right/Left hift Right/Left Shift & Rotate Datapath Functional Unit CMOS VLSI Deign 5
16 32-bit Logarithmic Barrel Datapath never wider than 32 bit Firt tage prehift by to handle left hift Datapath Functional Unit CMOS VLSI Deign 6
17 Multi-input Adder Suppoe we want to add k N-bit word Ex: = 0 Straightforward olution: k- N-input CPA Large and low Datapath Functional Unit CMOS VLSI Deign 7
18 Carry Save Addition A full adder um 3 input and produce 2 output Carry output ha twice weight of um output N full adder in parallel are called carry ave adder Produce N um and N carry out X 4 Y 4 Z 4 X 3 Y 3 Z 3 X 2 Y 2 Z 2 X Y Z C 4 S 4 C 3 S 3 C 2 S 2 C S X N... Y N... Z N... n-bit CSA C N... S N... Datapath Functional Unit CMOS VLSI Deign 8
19 CSA Application Ue k-2 tage of CSA Keep reult in carry-ave redundant form Final CPA compute actual reult _ 4-bit CSA 0 5-bit CSA 000_ _ 00_ _ 000_ X Y Z S C X Y Z S C A B S Datapath Functional Unit CMOS VLSI Deign 9
20 Multiplication Example: 00 : : : 60 0 multiplicand multiplier partial product product M x N-bit multiplication Produce N M-bit partial product Sum thee to produce M+N-bit product Datapath Functional Unit CMOS VLSI Deign 20
21 General Form Multiplicand: Y = (y M-, y M-2,, y, y 0 ) Multiplier: X = (x N-, x N-2,, x, x 0 ) Product: P y x x y M N N M j 2 i i j j i2 i j2 j 0 i 0 i 0 j 0 y 5 y 4 y 3 y 2 y y 0 x 5 x 4 x 3 x 2 x x 0 multiplicand multiplier x 0 y 5 x 0 y 4 x 0 y 3 x 0 y 2 x 0 y x 0 y 0 p x y 5 x y 4 x y 3 x y 2 x y x y 0 x 2 y 5 x 2 y 4 x 2 y 3 x 2 y 2 x 2 y x 2 y 0 x 3 y 5 x 3 y 4 x 3 y 3 x 3 y 2 x 3 y x 3 y 0 x 4 y 5 x 4 y 4 x 4 y 3 x 4 y 2 x 4 y x 4 y 0 x 5 y 5 x 5 y 4 x 5 y 3 x 5 y 2 x 5 y x 5 y 0 p0 p 0 p 9 p 8 p 7 p 6 p 5 p 4 p 3 p 2 p partial product product Datapath Functional Unit CMOS VLSI Deign 2
22 multiplier x Dot Diagram Each dot repreent a bit x 0 partial product x 5 Datapath Functional Unit CMOS VLSI Deign 22
23 Array Multiplier y 3 y 2 y y 0 x 0 x CSA Array x 2 x 3 CPA p 7 p 6 p 5 p 4 p 3 p 2 p p 0 Sin A Cin A B critical path A B A B B Cout Sout = Cout Sin Cin Sout Cout Sout Cin = Cout Sout Cin Datapath Functional Unit CMOS VLSI Deign 23
24 Rectangular Array Squah array to fit rectangular floorplan y 3 y 2 y y 0 x 0 x p 0 x 2 p x 3 p 2 p 3 p 7 p 6 p 5 p 4 Datapath Functional Unit CMOS VLSI Deign 24
25 Fewer Partial Product Array multiplier require N partial product If we looked at group of r bit, we could form N/r partial product. Fater and maller? Called radix-2 r encoding Ex: r = 2: look at pair of bit Form partial product of 0, Y, 2Y, 3Y Firt three are eay, but 3Y require adder Datapath Functional Unit CMOS VLSI Deign 25
26 Booth Encoding Intead of 3Y, try Y, then increment next partial product to add 4Y Similarly, for 2Y, try 2Y + 4Y in next partial product Datapath Functional Unit CMOS VLSI Deign 26
27 Booth Hardware Booth encoder generate control line for each PP Booth elector chooe PP bit Datapath Functional Unit CMOS VLSI Deign 27
28 multiplier x Sign Extenion Partial product can be negative Require ign extenion, which i cumberome High fanout on mot ignificant bit 0 PP 0 PP PP 2 PP 3 PP 4 x - x 0 PP 5 PP 6 PP 7 PP x 5 x 6 x 7 Datapath Functional Unit CMOS VLSI Deign 28
29 CMOS VLSI Deign CMOS VLSI Deign Datapath Functional Unit 29 Simplified Sign Ext. Sign bit are either all 0 or all Note that all 0 i all + in proper column Ue thi to reduce loading on MSB PP 0 PP PP 2 PP 3 PP 4 PP 5 PP 6 PP 7 PP 8
30 Even Simpler Sign Ext. No need to add all the in hardware Precompute the anwer! PP 0 PP PP 2 PP 3 PP 4 PP 5 PP 6 PP 7 PP 8 Datapath Functional Unit CMOS VLSI Deign 30
31 Advanced Multiplication Signed v. unigned input Higher radix Booth encoding Array v. tree CSA network Datapath Functional Unit CMOS VLSI Deign 3
32 Summary Variou type of functional unit that are eential for datapath Carry-ave adder break the carry propagation cure Epecially ueful for multiplier deign Multiplier and Booth encoding Next lecture SRAM Reading: Chapter and 2.5 Datapath Functional Unit CMOS VLSI Deign 32
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